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authorThierry Reding <treding@nvidia.com>2019-09-09 15:28:46 +0300
committerThierry Reding <treding@nvidia.com>2019-10-28 13:18:08 +0300
commitd98914ebc2af4504e2abc266610c29b4131598a3 (patch)
treead7fd4beb40ea15f2b6567bcba05637445ecbc94 /drivers/gpu/host1x/bus.c
parent004e822a6faa807f4413ac066fa29ea433550070 (diff)
downloadlinux-d98914ebc2af4504e2abc266610c29b4131598a3.tar.xz
gpu: host1x: Do not limit DMA segment size
host1x nor any its clients have any limitations on the DMA segment size, so don't pretend that they do. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/host1x/bus.c')
-rw-r--r--drivers/gpu/host1x/bus.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus.c
index 742aa9ff21b8..2c8559ff3481 100644
--- a/drivers/gpu/host1x/bus.c
+++ b/drivers/gpu/host1x/bus.c
@@ -445,7 +445,7 @@ static int host1x_device_add(struct host1x *host1x,
of_dma_configure(&device->dev, host1x->dev->of_node, true);
device->dev.dma_parms = &device->dma_parms;
- dma_set_max_seg_size(&device->dev, SZ_4M);
+ dma_set_max_seg_size(&device->dev, UINT_MAX);
err = host1x_device_parse_dt(device, driver);
if (err < 0) {