diff options
| author | Vikash Chandola <vikash.chandola@linux.intel.com> | 2022-02-22 16:12:53 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2022-03-21 05:54:32 +0300 |
| commit | 6f7b3b6368f95822756e280ce0d01ef4bbf49294 (patch) | |
| tree | 4cf1bc5d0bca0e6ae95d784596dcd63d4085bf64 /drivers/hwmon | |
| parent | c1d6a701f54aaf27b81ccbcac866a5872335915f (diff) | |
| download | linux-6f7b3b6368f95822756e280ce0d01ef4bbf49294.tar.xz | |
hwmon: (pmbus) Clear pmbus fault/warning bits after read
Almost all fault/warning bits in pmbus status registers remain set even
after fault/warning condition are removed. As per pmbus specification
these faults must be cleared by user.
Modify hwmon behavior to clear fault/warning bit after fetching data if
fault/warning bit was set. This allows to get fresh data in next read.
OpenBMC-Staging-Count: 1
Signed-off-by: Vikash Chandola <vikash.chandola@linux.intel.com>
Link: https://lore.kernel.org/r/20220222131253.2426834-1-vikash.chandola@linux.intel.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
(cherry picked from commit 35f165f08950a876f1b95a61d79c93678fba2fd6)
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'drivers/hwmon')
| -rw-r--r-- | drivers/hwmon/pmbus/pmbus_core.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c index f9896872390d..1b16c03f7f2e 100644 --- a/drivers/hwmon/pmbus/pmbus_core.c +++ b/drivers/hwmon/pmbus/pmbus_core.c @@ -921,6 +921,11 @@ static int pmbus_get_boolean(struct i2c_client *client, struct pmbus_boolean *b, pmbus_update_sensor_data(client, s2); regval = status & mask; + if (regval) { + ret = pmbus_write_byte_data(client, page, reg, regval); + if (ret) + goto unlock; + } if (s1 && s2) { s64 v1, v2; |