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authorSudeep Holla <sudeep.holla@arm.com>2016-08-26 00:19:09 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-08-31 14:05:43 +0300
commit3224dcc5a6ce919ddef2a387dcb4c47666480ed0 (patch)
tree4e58bcd819e6238755770f99a020b5146642a005 /drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
parent46a3d5cdb029471247b7be050332df399eca3ee1 (diff)
downloadlinux-3224dcc5a6ce919ddef2a387dcb4c47666480ed0.tar.xz
coresight: fix handling of ETM trace register access via sysfs
The ETM registers are classified into 2 categories: trace and management. The core power domain contains most of the trace unit logic including all(except TRCOSLAR and TRCOSLSR) the trace registers. The debug power domain contains the external debugger interface including all management registers. This patch adds coresight unit specific function coresight_simple_func which can be used for ETM trace registers by providing a ETM specific read function which does smp cross call to ensure the trace core is powered up before the register is accessed. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-etm3x-sysfs.c')
-rw-r--r--drivers/hwtracing/coresight/coresight-etm3x-sysfs.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
index 02d4b629891f..4856c8098416 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
@@ -1222,7 +1222,7 @@ static struct attribute *coresight_etm_attrs[] = {
};
#define coresight_etm3x_simple_func(name, offset) \
- coresight_simple_func(struct etm_drvdata, name, offset)
+ coresight_simple_func(struct etm_drvdata, NULL, name, offset)
coresight_etm3x_simple_func(etmccr, ETMCCR);
coresight_etm3x_simple_func(etmccer, ETMCCER);