diff options
| author | Thierry Reding <treding@nvidia.com> | 2021-06-02 19:32:58 +0300 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | 2021-06-03 22:49:41 +0300 |
| commit | e474b3a15db6023dca4424fd7ad941fe9de6d6d2 (patch) | |
| tree | beba1c3748de0773e1b1cfe91cd9f2249afb38b9 /drivers/memory | |
| parent | 1079a66bc32ff04eaab792152a9ed9c7585b5efc (diff) | |
| download | linux-e474b3a15db6023dca4424fd7ad941fe9de6d6d2.tar.xz | |
memory: tegra: Make IRQ support opitonal
Make IRQ support optional to help unify the Tegra186 memory controller
driver with this one.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-9-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Diffstat (limited to 'drivers/memory')
| -rw-r--r-- | drivers/memory/tegra/mc.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index e6c928633b12..68c6797f2707 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -750,20 +750,22 @@ static int tegra_mc_probe(struct platform_device *pdev) return err; } - mc->irq = platform_get_irq(pdev, 0); - if (mc->irq < 0) - return mc->irq; + if (mc->soc->ops && mc->soc->ops->handle_irq) { + mc->irq = platform_get_irq(pdev, 0); + if (mc->irq < 0) + return mc->irq; - WARN(!mc->soc->client_id_mask, "missing client ID mask for this SoC\n"); + WARN(!mc->soc->client_id_mask, "missing client ID mask for this SoC\n"); - mc_writel(mc, mc->soc->intmask, MC_INTMASK); + mc_writel(mc, mc->soc->intmask, MC_INTMASK); - err = devm_request_irq(&pdev->dev, mc->irq, mc->soc->ops->handle_irq, 0, - dev_name(&pdev->dev), mc); - if (err < 0) { - dev_err(&pdev->dev, "failed to request IRQ#%u: %d\n", mc->irq, - err); - return err; + err = devm_request_irq(&pdev->dev, mc->irq, mc->soc->ops->handle_irq, 0, + dev_name(&pdev->dev), mc); + if (err < 0) { + dev_err(&pdev->dev, "failed to request IRQ#%u: %d\n", mc->irq, + err); + return err; + } } err = tegra_mc_reset_setup(mc); |