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authorMichael Grzeschik <m.grzeschik@pengutronix.de>2017-06-28 19:32:21 +0300
committerDavid S. Miller <davem@davemloft.net>2017-06-29 22:26:14 +0300
commita356ab1c3d46513067dddf9484c9f05e10279312 (patch)
tree36f17d77e3208436129409d5224ac634f5ca325a /drivers/net/arcnet
parent52ab12e4f99437a046962e6486b0efded52846af (diff)
downloadlinux-a356ab1c3d46513067dddf9484c9f05e10279312.tar.xz
arcnet: com20020-pci: add support for PCIFB2 card
We add support for the PCIFB2 card from EAE. Beside other cards, this card has the backplane mode enabled by default. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/arcnet')
-rw-r--r--drivers/net/arcnet/com20020-pci.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/net/arcnet/com20020-pci.c b/drivers/net/arcnet/com20020-pci.c
index f5854ab7dc32..24deb88a37f0 100644
--- a/drivers/net/arcnet/com20020-pci.c
+++ b/drivers/net/arcnet/com20020-pci.c
@@ -201,6 +201,9 @@ static int com20020pci_probe(struct pci_dev *pdev,
lp->backplane = (inb(priv->misc) >> (2 + i)) & 0x1;
+ if (!strncmp(ci->name, "EAE PLX-PCI FB2", 15))
+ lp->backplane = 1;
+
/* Get the dev_id from the PLX rotary coder */
if (!strncmp(ci->name, "EAE PLX-PCI MA1", 15))
dev->dev_id = 0xc;
@@ -385,6 +388,31 @@ static struct com20020_pci_card_info card_info_eae_ma1 = {
.flags = ARC_CAN_10MBIT,
};
+static struct com20020_pci_card_info card_info_eae_fb2 = {
+ .name = "EAE PLX-PCI FB2",
+ .devcount = 1,
+ .chan_map_tbl = {
+ {
+ .bar = 2,
+ .offset = 0x00,
+ .size = 0x08,
+ },
+ },
+ .misc_map = {
+ .bar = 2,
+ .offset = 0x10,
+ .size = 0x04,
+ },
+ .leds = {
+ {
+ .green = 0x0,
+ .red = 0x1,
+ },
+ },
+ .rotary = 0x0,
+ .flags = ARC_CAN_10MBIT,
+};
+
static const struct pci_device_id com20020pci_id_table[] = {
{
0x1571, 0xa001,
@@ -531,6 +559,12 @@ static const struct pci_device_id com20020pci_id_table[] = {
(kernel_ulong_t)&card_info_eae_ma1
},
{
+ 0x10B5, 0x9050,
+ 0x10B5, 0x3294,
+ 0, 0,
+ (kernel_ulong_t)&card_info_eae_fb2
+ },
+ {
0x14BA, 0x6000,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,