diff options
author | Ariel Levkovich <lariel@mellanox.com> | 2019-08-30 02:42:30 +0300 |
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committer | Saeed Mahameed <saeedm@mellanox.com> | 2019-09-02 09:44:41 +0300 |
commit | c9b9dcb430b3cd0ad2b04c360c4e528d73430481 (patch) | |
tree | ffbbfc9522ccfbd64d101c2f24fabe914464c51e /drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h | |
parent | 00679b631eddaa0aa0ceba719fcb1f60c65da5a3 (diff) | |
download | linux-c9b9dcb430b3cd0ad2b04c360c4e528d73430481.tar.xz |
net/mlx5: Move device memory management to mlx5_core
Move the device memory allocation and deallocation commands
SW ICM memory to mlx5_core to expose this API for all
mlx5_core users.
This comes as preparation for supporting SW steering in kernel
where it will be required to allocate and register device
memory for direct rule insertion.
In addition, an API to register this device memory for future
remote access operations is introduced using the create_mkey
commands.
Signed-off-by: Ariel Levkovich <lariel@mellanox.com>
Reviewed-by: Mark Bloch <markb@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h index 471bbc48bc1f..bbcf4ee40ad5 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h @@ -198,6 +198,9 @@ int mlx5_set_mtpps(struct mlx5_core_dev *mdev, u32 *mtpps, u32 mtpps_size); int mlx5_query_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 *arm, u8 *mode); int mlx5_set_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 arm, u8 mode); +struct mlx5_dm *mlx5_dm_create(struct mlx5_core_dev *dev); +void mlx5_dm_cleanup(struct mlx5_core_dev *dev); + #define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) && \ MLX5_CAP_GEN((mdev), pps_modify) && \ MLX5_CAP_MCAM_FEATURE((mdev), mtpps_fs) && \ |