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authorLucas Stach <l.stach@pengutronix.de>2021-10-02 03:59:37 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2021-11-06 16:13:30 +0300
commit110d5f4421ed8276801a7e10257803d4e5f163e2 (patch)
tree086338da03fa2662e302ae419c1d0a734d41b2f9 /drivers/soc
parentf17dca0ab3f38b19c0f1b935f417f62d4a528723 (diff)
downloadlinux-110d5f4421ed8276801a7e10257803d4e5f163e2.tar.xz
Revert "soc: imx: gpcv2: move reset assert after requesting domain power up"
commit 2b2f106eb55276a60a89ac27a52d0d738b57a546 upstream. This reverts commit a77ebdd9f553. It turns out that the VPU domain has no different requirements, even though the downstream ATF implementation seems to suggest otherwise. Powering on the domain with the reset asserted works fine. As the changed sequence has caused sporadic issues with the GPU domains, just revert the change to go back to the working sequence. Cc: <stable@vger.kernel.org> # 5.14 Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Peng Fan <peng.fan@nxp.com> Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/soc')
-rw-r--r--drivers/soc/imx/gpcv2.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index 34a9ac1f2b9b..8b7a01773aec 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -244,6 +244,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
goto out_regulator_disable;
}
+ reset_control_assert(domain->reset);
+
if (domain->bits.pxx) {
/* request the domain to power up */
regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,
@@ -266,8 +268,6 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
GPC_PGC_CTRL_PCR);
}
- reset_control_assert(domain->reset);
-
/* delay for reset to propagate */
udelay(5);