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authorHauke Mehrtens <hauke@hauke-m.de>2012-12-05 21:46:03 +0400
committerJohn W. Linville <linville@tuxdriver.com>2012-12-06 23:58:57 +0400
commitf924e1e989b0bdaf6472668400d67a2142cb6b60 (patch)
tree7da7eb703e6c302c50bcc383f32bb576f474c595 /drivers/ssb/driver_chipcommon_pmu.c
parenta4855f39d4eb3f550ca5f4aac79bd999da42dc54 (diff)
downloadlinux-f924e1e989b0bdaf6472668400d67a2142cb6b60.tar.xz
ssb: get alp clock from devices with PMU
If there is a PMU in the device, get the alp clock from that part and do not assume 20000000. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb/driver_chipcommon_pmu.c')
-rw-r--r--drivers/ssb/driver_chipcommon_pmu.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/ssb/driver_chipcommon_pmu.c b/drivers/ssb/driver_chipcommon_pmu.c
index d7d58044b4bc..a43415a7fbed 100644
--- a/drivers/ssb/driver_chipcommon_pmu.c
+++ b/drivers/ssb/driver_chipcommon_pmu.c
@@ -618,6 +618,33 @@ void ssb_pmu_set_ldo_paref(struct ssb_chipcommon *cc, bool on)
EXPORT_SYMBOL(ssb_pmu_set_ldo_voltage);
EXPORT_SYMBOL(ssb_pmu_set_ldo_paref);
+static u32 ssb_pmu_get_alp_clock_clk0(struct ssb_chipcommon *cc)
+{
+ u32 crystalfreq;
+ const struct pmu0_plltab_entry *e = NULL;
+
+ crystalfreq = chipco_read32(cc, SSB_CHIPCO_PMU_CTL) &
+ SSB_CHIPCO_PMU_CTL_XTALFREQ >> SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT;
+ e = pmu0_plltab_find_entry(crystalfreq);
+ BUG_ON(!e);
+ return e->freq * 1000;
+}
+
+u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc)
+{
+ struct ssb_bus *bus = cc->dev->bus;
+
+ switch (bus->chip_id) {
+ case 0x5354:
+ ssb_pmu_get_alp_clock_clk0(cc);
+ default:
+ ssb_printk(KERN_ERR PFX
+ "ERROR: PMU alp clock unknown for device %04X\n",
+ bus->chip_id);
+ return 0;
+ }
+}
+
u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc)
{
struct ssb_bus *bus = cc->dev->bus;