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authorAlexander Shiyan <shc_work@mail.ru>2013-01-21 19:38:56 +0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-01-22 01:56:46 +0400
commitf548b96de684c86c72cd7ba019c03a7afe94fd53 (patch)
tree3e00af206200172b911ccc8c7b8294230b52a0ad /drivers/tty/serial/sccnxp.c
parentc098020d0368ded1c6ba8d7b612feffe067509a6 (diff)
downloadlinux-f548b96de684c86c72cd7ba019c03a7afe94fd53.tar.xz
serial: sccnxp: Reset break and overrun bits in RX handler
This patch adds a hardware reset the break and overflow bits for these events. Without resetting the bits they will be reported to the core every time, when once occur. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/sccnxp.c')
-rw-r--r--drivers/tty/serial/sccnxp.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/tty/serial/sccnxp.c b/drivers/tty/serial/sccnxp.c
index c5f0e964ec05..c7dec1678f65 100644
--- a/drivers/tty/serial/sccnxp.c
+++ b/drivers/tty/serial/sccnxp.c
@@ -305,14 +305,19 @@ static void sccnxp_handle_rx(struct uart_port *port)
if (unlikely(sr)) {
if (sr & SR_BRK) {
port->icount.brk++;
+ sccnxp_port_write(port, SCCNXP_CR_REG,
+ CR_CMD_BREAK_RESET);
if (uart_handle_break(port))
continue;
} else if (sr & SR_PE)
port->icount.parity++;
else if (sr & SR_FE)
port->icount.frame++;
- else if (sr & SR_OVR)
+ else if (sr & SR_OVR) {
port->icount.overrun++;
+ sccnxp_port_write(port, SCCNXP_CR_REG,
+ CR_CMD_STATUS_RESET);
+ }
sr &= port->read_status_mask;
if (sr & SR_BRK)