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| author | Gevorg Sahakyan <Gevorg.Sahakyan@synopsys.com> | 2018-07-26 17:00:13 +0300 |
|---|---|---|
| committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2018-07-30 10:39:16 +0300 |
| commit | f25c42b8d604fbca6d8d3eff2365a73bbef076d3 (patch) | |
| tree | 7400ccbb88912e79db006043fb0103b7f1359bb3 /drivers/usb/dwc2/core.h | |
| parent | c31d983beaf04e6754918aa1073f053b12efb700 (diff) | |
| download | linux-f25c42b8d604fbca6d8d3eff2365a73bbef076d3.tar.xz | |
usb: dwc2: Modify dwc2_readl/writel functions prototype
Added hsotg argument to dwc2_readl/writel function prototype,
and also instead of address pass offset of register.
hsotg will contain flag field for endianness.
Also customized dwc2_set_bit and dwc2_clear_bit function for
dwc2_readl/writel functions.
Signed-off-by: Gevorg Sahakyan <sahakyan@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc2/core.h')
| -rw-r--r-- | drivers/usb/dwc2/core.h | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h index 8a9272a2c82c..bca8463f00b0 100644 --- a/drivers/usb/dwc2/core.h +++ b/drivers/usb/dwc2/core.h @@ -1172,9 +1172,9 @@ struct dwc2_hsotg { * writes. This set of operations was added specifically for MIPS and * should only be used there. */ -static inline u32 dwc2_readl(const void __iomem *addr) +static inline u32 dwc2_readl(struct dwc2_hsotg *hsotg, u32 offset) { - u32 value = __raw_readl(addr); + u32 value = __raw_readl(hsotg->regs + offset); /* In order to preserve endianness __raw_* operation is used. Therefore * a barrier is needed to ensure IO access is not re-ordered across @@ -1184,9 +1184,9 @@ static inline u32 dwc2_readl(const void __iomem *addr) return value; } -static inline void dwc2_writel(u32 value, void __iomem *addr) +static inline void dwc2_writel(struct dwc2_hsotg *hsotg, u32 value, u32 offset) { - __raw_writel(value, addr); + __raw_writel(value, hsotg->regs + offset); /* * In order to preserve endianness __raw_* operation is used. Therefore @@ -1195,22 +1195,23 @@ static inline void dwc2_writel(u32 value, void __iomem *addr) */ mb(); #ifdef DWC2_LOG_WRITES - pr_info("INFO:: wrote %08x to %p\n", value, addr); + pr_info("INFO:: wrote %08x to %p\n", value, hsotg->regs + offset); #endif } #else + /* Normal architectures just use readl/write */ -static inline u32 dwc2_readl(const void __iomem *addr) +static inline u32 dwc2_readl(struct dwc2_hsotg *hsotg, u32 offset) { - return readl(addr); + return readl(hsotg->regs + offset); } -static inline void dwc2_writel(u32 value, void __iomem *addr) +static inline void dwc2_writel(struct dwc2_hsotg *hsotg, u32 value, u32 offset) { - writel(value, addr); + writel(value, hsotg->regs + offset); #ifdef DWC2_LOG_WRITES - pr_info("info:: wrote %08x to %p\n", value, addr); + pr_info("info:: wrote %08x to %p\n", value, hsotg->regs + offset); #endif } #endif @@ -1320,12 +1321,12 @@ bool dwc2_hw_is_device(struct dwc2_hsotg *hsotg); */ static inline int dwc2_is_host_mode(struct dwc2_hsotg *hsotg) { - return (dwc2_readl(hsotg->regs + GINTSTS) & GINTSTS_CURMODE_HOST) != 0; + return (dwc2_readl(hsotg, GINTSTS) & GINTSTS_CURMODE_HOST) != 0; } static inline int dwc2_is_device_mode(struct dwc2_hsotg *hsotg) { - return (dwc2_readl(hsotg->regs + GINTSTS) & GINTSTS_CURMODE_HOST) == 0; + return (dwc2_readl(hsotg, GINTSTS) & GINTSTS_CURMODE_HOST) == 0; } /* |