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authorThomas Gleixner <tglx@linutronix.de>2008-05-02 22:10:09 +0400
committerIngo Molnar <mingo@elte.hu>2008-05-12 23:28:05 +0400
commit9b7dc567d03d74a1fbae84e88949b6a60d922d82 (patch)
tree7b59581c40ea13373574daeb53a01e90729ddc7f /include/asm-x86/irq_64.h
parent2e0884362d1fe36ef2d673d763d6ce35e2044e66 (diff)
downloadlinux-9b7dc567d03d74a1fbae84e88949b6a60d922d82.tar.xz
x86: unify interrupt vector defines
The interrupt vector defines are copied 4 times around with minimal differences. Move them all into asm-x86/irq_vectors.h Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/irq_64.h')
-rw-r--r--include/asm-x86/irq_64.h29
1 files changed, 1 insertions, 28 deletions
diff --git a/include/asm-x86/irq_64.h b/include/asm-x86/irq_64.h
index 7608176590b6..3037ec667bfb 100644
--- a/include/asm-x86/irq_64.h
+++ b/include/asm-x86/irq_64.h
@@ -11,34 +11,7 @@
*/
#include <asm/apicdef.h>
-
-#define TIMER_IRQ 0
-
-/*
- * 16 8259A IRQ's, 208 potential APIC interrupt sources.
- * Right now the APIC is mostly only used for SMP.
- * 256 vectors is an architectural limit. (we can have
- * more than 256 devices theoretically, but they will
- * have to use shared interrupts)
- * Since vectors 0x00-0x1f are used/reserved for the CPU,
- * the usable vector space is 0x20-0xff (224 vectors)
- */
-
-/*
- * The maximum number of vectors supported by x86_64 processors
- * is limited to 256. For processors other than x86_64, NR_VECTORS
- * should be changed accordingly.
- */
-#define NR_VECTORS 256
-
-#define FIRST_SYSTEM_VECTOR 0xef /* duplicated in hw_irq.h */
-
-#if NR_CPUS < MAX_IO_APICS
-#define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
-#else
-#define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
-#endif
-#define NR_IRQ_VECTORS NR_IRQS
+#include <asm/irq_vectors.h>
static inline int irq_canonicalize(int irq)
{