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authorRomain Perier <romain.perier@collabora.com>2017-09-04 11:51:16 +0300
committerHeiko Stuebner <heiko@sntech.de>2017-10-14 22:26:51 +0300
commit8c04f7a3e347cb2a00074d197f5cd5b25c6fe383 (patch)
treead15bbc5e44a47e45b24818c93f69e06bf2930e7 /include/dt-bindings/clock
parent2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e (diff)
downloadlinux-8c04f7a3e347cb2a00074d197f5cd5b25c6fe383.tar.xz
clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs
Signed-off-by: Romain Perier <romain.perier@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/rk3368-cru.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/rk3368-cru.h b/include/dt-bindings/clock/rk3368-cru.h
index aeb83e581a11..a0063ed7284a 100644
--- a/include/dt-bindings/clock/rk3368-cru.h
+++ b/include/dt-bindings/clock/rk3368-cru.h
@@ -156,6 +156,7 @@
#define PCLK_ISP 366
#define PCLK_VIP 367
#define PCLK_WDT 368
+#define PCLK_EFUSE256 369
/* hclk gates */
#define HCLK_SFC 448