summaryrefslogtreecommitdiff
path: root/include/dt-bindings
diff options
context:
space:
mode:
authorStephen Boyd <sboyd@codeaurora.org>2016-04-20 21:41:37 +0300
committerStephen Boyd <sboyd@codeaurora.org>2016-04-20 21:41:37 +0300
commit0f05db651dc50c2a6f45794de2567fbf64a4df75 (patch)
tree6f72791401b1cae3c9d5c6dd2be88a212ca1017f /include/dt-bindings
parente708b383f4b94feca2e0d5d06e1cfc13cdfea100 (diff)
parent03ae1747869437a8e4d0d4e79d4c88c25c6df39c (diff)
downloadlinux-0f05db651dc50c2a6f45794de2567fbf64a4df75.tar.xz
Merge tag 'v4.7-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull some checkpatch silencers from Heiko Stuebner: Fix quite some checkpatch warnings in the newly added rk3399 header and also in the clock code itself. * tag 'v4.7-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: fix checkpatch warning in core code clk: rockchip: drop unnecessary header comment clk: rockchip: reign in some overly long lines in the rk3399 controller clk: rockchip: fix checkpatch errors in rk3399 dt-binding header
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/rk3399-cru.h24
1 files changed, 12 insertions, 12 deletions
diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
index 244746e7dc4c..f60fe6e4b16e 100644
--- a/include/dt-bindings/clock/rk3399-cru.h
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -136,7 +136,7 @@
#define DCLK_VOP1_DIV 183
#define DCLK_M0_PERILP 184
-#define FCLK_CM0S 190
+#define FCLK_CM0S 190
/* aclk gates */
#define ACLK_PERIHP 192
@@ -207,11 +207,11 @@
#define ACLK_CORE_ADB400_CORE_B_2_CCI500 257
#define ACLK_ADB400M_PD_CORE_L 258
#define ACLK_ADB400M_PD_CORE_B 259
-#define ACLK_PERF_CORE_L 260
-#define ACLK_PERF_CORE_B 261
-#define ACLK_GIC_PRE 262
-#define ACLK_VOP0_PRE 263
-#define ACLK_VOP1_PRE 264
+#define ACLK_PERF_CORE_L 260
+#define ACLK_PERF_CORE_B 261
+#define ACLK_GIC_PRE 262
+#define ACLK_VOP0_PRE 263
+#define ACLK_VOP1_PRE 264
/* pclk gates */
#define PCLK_PERIHP 320
@@ -279,12 +279,12 @@
#define PCLK_EFUSE1024S 382
#define PCLK_PMU_INTR_ARB 383
#define PCLK_MAILBOX0 384
-#define PCLK_USBPHY_MUX_G 385
-#define PCLK_UPHY0_TCPHY_G 386
-#define PCLK_UPHY0_TCPD_G 387
-#define PCLK_UPHY1_TCPHY_G 388
-#define PCLK_UPHY1_TCPD_G 389
-#define PCLK_ALIVE 390
+#define PCLK_USBPHY_MUX_G 385
+#define PCLK_UPHY0_TCPHY_G 386
+#define PCLK_UPHY0_TCPD_G 387
+#define PCLK_UPHY1_TCPHY_G 388
+#define PCLK_UPHY1_TCPD_G 389
+#define PCLK_ALIVE 390
/* hclk gates */
#define HCLK_PERIHP 448