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authorTero Kristo <t-kristo@ti.com>2014-10-03 17:57:13 +0400
committerPaul Walmsley <paul@pwsan.com>2014-11-13 19:26:33 +0300
commite3ab6013ab06d3a861ed00c1f8d32aa4e6b66ddd (patch)
tree7d7a4cf6ab47a690ddde45dadaa6efe0d8f36f4d /include/linux/clk
parent83501ff0a5032dfbd63ab1ca9d9d25b97ec49fb9 (diff)
downloadlinux-e3ab6013ab06d3a861ed00c1f8d32aa4e6b66ddd.tar.xz
ARM: OMAP3: clock: add support for dpll4_set_rate_and_parent
Expand the support of omap4 per-dpll to provide set_rate_and_parent. This is required for proper behavior of clk_change_rate with determine_rate support. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'include/linux/clk')
-rw-r--r--include/linux/clk/ti.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index abc702a73aca..74e5341463c9 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -291,6 +291,8 @@ int omap2_clk_disable_autoidle_all(void);
void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks);
int omap3_dpll4_set_rate(struct clk_hw *clk, unsigned long rate,
unsigned long parent_rate);
+int omap3_dpll4_set_rate_and_parent(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate, u8 index);
int omap2_dflt_clk_enable(struct clk_hw *hw);
void omap2_dflt_clk_disable(struct clk_hw *hw);
int omap2_dflt_clk_is_enabled(struct clk_hw *hw);