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| author | Andi Kleen <ak@linux.intel.com> | 2018-06-14 01:48:25 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-06-20 20:10:00 +0300 |
| commit | 10a70416e1f067f6c4efda6ffd8ea96002ac4223 (patch) | |
| tree | b1b04186a22b14b84ac5511f1e40b2969048af3d /include/linux/cpu.h | |
| parent | 6b28baca9b1f0d4a42b865da7a05b1c81424bd5c (diff) | |
| download | linux-10a70416e1f067f6c4efda6ffd8ea96002ac4223.tar.xz | |
x86/speculation/l1tf: Make sure the first page is always reserved
The L1TF workaround doesn't make any attempt to mitigate speculate accesses
to the first physical page for zeroed PTEs. Normally it only contains some
data from the early real mode BIOS.
It's not entirely clear that the first page is reserved in all
configurations, so add an extra reservation call to make sure it is really
reserved. In most configurations (e.g. with the standard reservations)
it's likely a nop.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Acked-by: Dave Hansen <dave.hansen@intel.com>
Diffstat (limited to 'include/linux/cpu.h')
0 files changed, 0 insertions, 0 deletions