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authorNicolas Pitre <nicolas.pitre@linaro.org>2012-07-06 05:33:26 +0400
committerNicolas Pitre <nicolas.pitre@linaro.org>2013-07-30 17:02:16 +0400
commited96762e3241f57aa812977cf1920d3ee0363f4d (patch)
tree18849feb3008c15c4affc370119821a4b1c72458 /include/linux/irqchip
parent9797a0e95ead7bfe52260c369ee9fe6ba445afaf (diff)
downloadlinux-ed96762e3241f57aa812977cf1920d3ee0363f4d.tar.xz
ARM: bL_switcher: do not hardcode GIC IDs in the code
Currently, GIC IDs are hardcoded making the code dependent on the 4+4 b.L configuration. Let's allow for GIC IDs to be discovered upon switcher initialization to support other b.L configurations such as the 1+1 one, or 2+3 as on the VExpress TC2. Signed-off-by: Nicolas Pitre <nico@linaro.org>
Diffstat (limited to 'include/linux/irqchip')
-rw-r--r--include/linux/irqchip/arm-gic.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 40bfcac95940..2d7d47e8dfaf 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -75,6 +75,7 @@ static inline void gic_init(unsigned int nr, int start,
gic_init_bases(nr, start, dist, cpu, 0, NULL);
}
+int gic_get_cpu_id(unsigned int cpu);
void gic_migrate_target(unsigned int new_cpu_id);
#endif /* __ASSEMBLY */