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authorRuss Weight <russell.h.weight@intel.com>2021-01-15 02:16:48 +0300
committerLee Jones <lee.jones@linaro.org>2021-02-08 16:54:25 +0300
commit296f5568c6ee906e2a8db00adc751674f1745bd8 (patch)
tree5ba9bdf7057b50b420349d087b69406153ee8f8c /include/linux/mfd/intel-m10-bmc.h
parent92eba6802c2b1ffb30f1454e9d99ef980b94bbbf (diff)
downloadlinux-296f5568c6ee906e2a8db00adc751674f1745bd8.tar.xz
mfd: intel-m10-bmc: Expose MAC address and count
Create two sysfs entries for exposing the MAC address and count from the MAX10 BMC register space. The MAC address is the first in a sequential block of MAC addresses reserved for the FPGA card. The MAC count is the number of MAC addresses in the reserved block. Signed-off-by: Russ Weight <russell.h.weight@intel.com> Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'include/linux/mfd/intel-m10-bmc.h')
-rw-r--r--include/linux/mfd/intel-m10-bmc.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
index c8ef2f1654a4..74d4e193966a 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -15,6 +15,15 @@
/* Register offset of system registers */
#define NIOS2_FW_VERSION 0x0
+#define M10BMC_MAC_LOW 0x10
+#define M10BMC_MAC_BYTE4 GENMASK(7, 0)
+#define M10BMC_MAC_BYTE3 GENMASK(15, 8)
+#define M10BMC_MAC_BYTE2 GENMASK(23, 16)
+#define M10BMC_MAC_BYTE1 GENMASK(31, 24)
+#define M10BMC_MAC_HIGH 0x14
+#define M10BMC_MAC_BYTE6 GENMASK(7, 0)
+#define M10BMC_MAC_BYTE5 GENMASK(15, 8)
+#define M10BMC_MAC_COUNT GENMASK(23, 16)
#define M10BMC_TEST_REG 0x3c
#define M10BMC_BUILD_VER 0x68
#define M10BMC_VER_MAJOR_MSK GENMASK(23, 16)