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authorYangbo Lu <yangbo.lu@nxp.com>2020-04-20 05:46:47 +0300
committerDavid S. Miller <davem@davemloft.net>2020-04-22 01:38:33 +0300
commit3007bc7321e3c37de9d7d965cb9fb95aaa00113b (patch)
treeb51b4841bcae1537c1dc6c6a6ee369fb68ceed21 /include/soc
parentd2b09a8e7bcbfa47e7161b20d6387ac968834c21 (diff)
downloadlinux-3007bc7321e3c37de9d7d965cb9fb95aaa00113b.tar.xz
net: mscc: ocelot: redefine PTP pins
There are 5 PTP_PINS register groups on Ocelot switch. Except the one used for TOD operations, there are still 4 register groups for programmable pins. So redefine the 4 programmable pins. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/soc')
-rw-r--r--include/soc/mscc/ocelot.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/include/soc/mscc/ocelot.h b/include/soc/mscc/ocelot.h
index 6fd88ee622cf..7d44d3508869 100644
--- a/include/soc/mscc/ocelot.h
+++ b/include/soc/mscc/ocelot.h
@@ -440,10 +440,11 @@ enum ocelot_regfield {
REGFIELD_MAX
};
-enum ocelot_clk_pins {
- ALT_PPS_PIN = 1,
- EXT_CLK_PIN,
- ALT_LDST_PIN,
+enum ocelot_ptp_pins {
+ PTP_PIN_0,
+ PTP_PIN_1,
+ PTP_PIN_2,
+ PTP_PIN_3,
TOD_ACC_PIN
};