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| author | Mark Brown <broonie@kernel.org> | 2021-08-30 14:30:33 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2021-08-30 14:30:33 +0300 |
| commit | 38b7673000949ca784fcb8a9feb70d2a802befa6 (patch) | |
| tree | a5d23c2784c2825c680b840ff8eb0653bdb5625e /sound/soc/sof/intel/tgl.c | |
| parent | a617f7d45c499b56689cdcef37dfa86fdeb99940 (diff) | |
| parent | 3202e2f5fac0032cb1128fb8d5b7f3368902c8d8 (diff) | |
| download | linux-38b7673000949ca784fcb8a9feb70d2a802befa6.tar.xz | |
Merge remote-tracking branch 'asoc/for-5.15' into asoc-linus
Diffstat (limited to 'sound/soc/sof/intel/tgl.c')
| -rw-r--r-- | sound/soc/sof/intel/tgl.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/sound/soc/sof/intel/tgl.c b/sound/soc/sof/intel/tgl.c index 2ed788304414..199d41a7dc9b 100644 --- a/sound/soc/sof/intel/tgl.c +++ b/sound/soc/sof/intel/tgl.c @@ -137,6 +137,9 @@ const struct sof_intel_dsp_desc tgl_chip_info = { .rom_init_timeout = 300, .ssp_count = ICL_SSP_COUNT, .ssp_base_offset = CNL_SSP_BASE_OFFSET, + .sdw_shim_base = SDW_SHIM_BASE, + .sdw_alh_base = SDW_ALH_BASE, + .check_sdw_irq = hda_common_check_sdw_irq, }; EXPORT_SYMBOL_NS(tgl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON); @@ -153,6 +156,9 @@ const struct sof_intel_dsp_desc tglh_chip_info = { .rom_init_timeout = 300, .ssp_count = ICL_SSP_COUNT, .ssp_base_offset = CNL_SSP_BASE_OFFSET, + .sdw_shim_base = SDW_SHIM_BASE, + .sdw_alh_base = SDW_ALH_BASE, + .check_sdw_irq = hda_common_check_sdw_irq, }; EXPORT_SYMBOL_NS(tglh_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON); @@ -169,6 +175,9 @@ const struct sof_intel_dsp_desc ehl_chip_info = { .rom_init_timeout = 300, .ssp_count = ICL_SSP_COUNT, .ssp_base_offset = CNL_SSP_BASE_OFFSET, + .sdw_shim_base = SDW_SHIM_BASE, + .sdw_alh_base = SDW_ALH_BASE, + .check_sdw_irq = hda_common_check_sdw_irq, }; EXPORT_SYMBOL_NS(ehl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON); @@ -185,5 +194,8 @@ const struct sof_intel_dsp_desc adls_chip_info = { .rom_init_timeout = 300, .ssp_count = ICL_SSP_COUNT, .ssp_base_offset = CNL_SSP_BASE_OFFSET, + .sdw_shim_base = SDW_SHIM_BASE, + .sdw_alh_base = SDW_ALH_BASE, + .check_sdw_irq = hda_common_check_sdw_irq, }; EXPORT_SYMBOL_NS(adls_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON); |