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-rw-r--r--arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts295
-rw-r--r--arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts293
-rw-r--r--arch/arm/boot/dts/ast2400.dtsi349
-rw-r--r--drivers/i2c/busses/i2c-aspeed.c1
-rw-r--r--drivers/i2c/i2c-core.c1
5 files changed, 353 insertions, 586 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts b/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
index c4f4076dcec3..b663dd84da42 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
@@ -1,109 +1,14 @@
/dts-v1/;
-#include "skeleton.dtsi"
+#include "ast2400.dtsi"
/ {
model = "Barrelye BMC";
compatible = "rackspace,barreleye-bmc", "aspeed,ast2400";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&vic>;
-
- aliases {
- serial0 = &uart5;
- };
-
- chosen {
- stdout-path = &uart5;
- bootargs = "console=ttyS4,38400";
- };
-
- memory {
- reg = < 0x40000000 0x10000000 >;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "arm,arm926ej-s";
- device_type = "cpu";
- reg = <0>;
- };
- };
-
- // FIXME
- clocks {
- // Do a proper driver... for now, we know the straps
- // and uboot config on palmetto are:
- // - CLKIN is 48Mhz
- // - HPLL is 384Mhz
- // - CPU:AHB is strapped 2:1
- // - PCLK is HPLL/8 = 48Mhz
- clk_apb: clk_apb {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <48000000>;
- };
- clk_hpll: clk_hpll {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <384000000>;
- };
- };
-
ahb {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- vic: interrupt-controller@1e6c0080 {
- compatible = "aspeed,new-vic";
- interrupt-controller;
- #interrupt-cells = <1>;
- valid-sources = < 0xffffffff 0x0007ffff>;
- reg = <0x1e6c0080 0x80>;
- };
-
- mac0: ethernet@1e660000 {
- compatible = "faraday,ftgmac100", "aspeed,ast2400-mac";
- reg = <0x1e660000 0x180>;
- interrupts = <2>;
- use-nc-si;
- no-hw-checksum;
- };
-
apb {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- sram@1e72000 {
- compatible = "mmio-sram";
- reg = <0x1e72000 0x8000>; // 32K
- };
-
- ibt@1e789140 {
- compatible = "aspeed,bt-host";
- reg = <0x1e789140 0x18>;
- };
-
i2c: i2c@1e78a040 {
- compatible = "aspeed,ast2400-i2c-common";
- reg = <0x1e78a000 0x40>;
- ranges = <0 0x1e78a000 0x1000>;
- interrupts = <12>;
- clocks = <&clk_apb>;
-
i2c0: i2c-bus@0x40 {
- reg = <0x40 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <0>;
- clock-frequency = <100000>;
- status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
@@ -120,52 +25,7 @@
};
};
- i2c1: i2c-bus@0x80 {
- reg = <0x80 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <1>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c2: i2c-bus@0xC0 {
- reg = <0xC0 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <2>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c3: i2c-bus@0x100 {
- reg = <0x100 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <3>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c4: i2c-bus@0x140 {
- reg = <0x140 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <4>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c5: i2c-bus@0x180 {
- reg = <0x180 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <5>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
i2c6: i2c-bus@0x1C0 {
- reg = <0x1C0 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <6>;
- clock-frequency = <100000>;
- status = "okay";
nct7904@2d {
compatible = "nuvoton,nct7904";
reg = <0x2d>;
@@ -175,159 +35,8 @@
reg = <0x2e>;
};
};
-
- i2c7: i2c-bus@0x300 {
- reg = <0x300 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <7>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c8: i2c-bus@0x340 {
- reg = <0x340 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <8>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c9: i2c-bus@0x380 {
- reg = <0x380 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <9>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- i2c10: i2c-bus@0x3C0 {
- reg = <0x380 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <10>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- i2c11: i2c-bus@0x400 {
- reg = <0x400 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <11>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- i2c12: i2c-bus@0x440 {
- reg = <0x400 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <12>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- i2c13: i2c-bus@0x480 {
- reg = <0x480 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <13>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- };
-
- syscon: syscon@1e6e2000 {
- compatible = "aspeed,syscon", "syscon";
- reg = <0x1e6e2000 0x1a8>;
- interrupts = <19>;
- clocks = <&clk_apb>;
- status = "okay";
- };
-
- wdt: wdt@1e785000 {
- compatible = "aspeed,wdt", "wdt";
- reg = <0x1e785000 0x1c4>;
- interrupts = <27>;
- clocks = <&clk_apb>;
- };
-
- rtc: rtc@1e781000 {
- compatible = "aspeed,rtc";
- reg = <0x1e781000 0x18>;
- };
-
- timer: timer@98400000 {
- compatible = "aspeed,timer";
- reg = <0x1e782000 0x90>;
- // The moxart_timer driver registers only one interrupt
- // and assumes it's for timer 1
- //interrupts = <16 17 18 35 36 37 38 39>;
- interrupts = <16>;
- clocks = <&clk_apb>;
- };
-
- gpio: gpio@1e780000 {
- compatible = "aspeed,ast2400-gpio";
- reg = <0x1e780000 0x1000>;
- interrupts = <20>;
- };
-
- uart1: serial@1e783000 {
- compatible = "ns16550a";
- reg = <0x1e783000 0x1000>;
- reg-shift = <2>;
- interrupts = <9>;
- clock-frequency = < 1843200 >;
- no-loopback-test;
- };
- uart2: serial@1e78d000 {
- compatible = "ns16550a";
- reg = <0x1e78d000 0x1000>;
- reg-shift = <2>;
- interrupts = <32>;
- clock-frequency = < 1843200 >;
- no-loopback-test;
- };
- /* APSS UART */
- uart3: serial@1e78e000 {
- compatible = "ns16550a";
- reg = <0x1e78e000 0x1000>;
- reg-shift = <2>;
- interrupts = <33>;
- clock-frequency = < 1843200 >;
- no-loopback-test;
- };
-
- /* Host UART */
- uart4: serial@1e78f000 {
- compatible = "ns16550a";
- reg = <0x1e78f000 0x1000>;
- reg-shift = <2>;
- interrupts = <34>;
- clock-frequency = < 1843200 >;
- current-speed = < 115200 >;
- no-loopback-test;
- };
-#if 1
- /* BMC UART */
- uart5: serial@1e784000 {
- compatible = "ns16550a";
- reg = <0x1e784000 0x1000>;
- reg-shift = <2>;
- interrupts = <10>;
- clock-frequency = < 1843200 >;
- current-speed = < 38400 >;
- no-loopback-test;
- };
-#endif
-
- uart6: serial@1e787000 {
- compatible = "ns16550a";
- reg = <0x1e787000 0x1000>;
- reg-shift = <2>;
- interrupts = <10>;
- clock-frequency = < 1843200 >;
- current-speed = < 38400 >;
- no-loopback-test;
};
};
};
};
+
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
index d55096b576c7..5b25fdad1ff9 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
@@ -1,109 +1,15 @@
/dts-v1/;
-#include "skeleton.dtsi"
+#include "ast2400.dtsi"
/ {
model = "Palmetto BMC";
compatible = "tyan,palmetto-bmc", "aspeed,ast2400";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&vic>;
-
- aliases {
- serial0 = &uart5;
- };
-
- chosen {
- stdout-path = &uart5;
- bootargs = "console=ttyS4,38400";
- };
-
- memory {
- reg = < 0x40000000 0x10000000 >;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "arm,arm926ej-s";
- device_type = "cpu";
- reg = <0>;
- };
- };
-
- // FIXME
- clocks {
- // Do a proper driver... for now, we know the straps
- // and uboot config on palmetto are:
- // - CLKIN is 48Mhz
- // - HPLL is 384Mhz
- // - CPU:AHB is strapped 2:1
- // - PCLK is HPLL/8 = 48Mhz
- clk_apb: clk_apb {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <48000000>;
- };
- clk_hpll: clk_hpll {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <384000000>;
- };
- };
ahb {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- vic: interrupt-controller@1e6c0080 {
- compatible = "aspeed,new-vic";
- interrupt-controller;
- #interrupt-cells = <1>;
- valid-sources = < 0xffffffff 0x0007ffff>;
- reg = <0x1e6c0080 0x80>;
- };
-
- mac0: ethernet@1e660000 {
- compatible = "faraday,ftgmac100", "aspeed,ast2400-mac";
- reg = <0x1e660000 0x180>;
- interrupts = <2>;
- use-nc-si;
- no-hw-checksum;
- };
-
apb {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- sram@1e72000 {
- compatible = "mmio-sram";
- reg = <0x1e72000 0x8000>; // 32K
- };
-
- ibt@1e789140 {
- compatible = "aspeed,bt-host";
- reg = <0x1e789140 0x18>;
- };
-
i2c: i2c@1e78a040 {
- compatible = "aspeed,ast2400-i2c-common";
- reg = <0x1e78a000 0x40>;
- ranges = <0 0x1e78a000 0x1000>;
- interrupts = <12>;
- clocks = <&clk_apb>;
-
i2c0: i2c-bus@0x40 {
- reg = <0x40 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <0>;
- clock-frequency = <100000>;
- status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
@@ -116,209 +22,12 @@
};
};
- i2c1: i2c-bus@0x80 {
- reg = <0x80 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <1>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
i2c2: i2c-bus@0xC0 {
- reg = <0xC0 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <2>;
- clock-frequency = <100000>;
- status = "okay";
tmp423@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
};
-
- i2c3: i2c-bus@0x100 {
- reg = <0x100 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <3>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c4: i2c-bus@0x140 {
- reg = <0x140 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <4>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c5: i2c-bus@0x180 {
- reg = <0x180 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <5>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c6: i2c-bus@0x1C0 {
- reg = <0x1C0 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <6>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c7: i2c-bus@0x300 {
- reg = <0x300 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <7>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c8: i2c-bus@0x340 {
- reg = <0x340 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <8>;
- clock-frequency = <100000>;
- status = "okay";
- };
-
- i2c9: i2c-bus@0x380 {
- reg = <0x380 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <9>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- i2c10: i2c-bus@0x3C0 {
- reg = <0x380 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <10>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- i2c11: i2c-bus@0x400 {
- reg = <0x400 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <11>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- i2c12: i2c-bus@0x440 {
- reg = <0x400 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <12>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- i2c13: i2c-bus@0x480 {
- reg = <0x480 0x40>;
- compatible = "aspeed,ast2400-i2c-bus";
- bus = <13>;
- clock-frequency = <100000>;
- status = "disabled";
- };
-
- };
-
- syscon: syscon@1e6e2000 {
- compatible = "aspeed,syscon", "syscon";
- reg = <0x1e6e2000 0x1a8>;
- interrupts = <19>;
- clocks = <&clk_apb>;
- status = "okay";
- };
-
- wdt: wdt@1e785000 {
- compatible = "aspeed,wdt", "wdt";
- reg = <0x1e785000 0x1c4>;
- interrupts = <27>;
- clocks = <&clk_apb>;
- };
-
- rtc: rtc@1e781000 {
- compatible = "aspeed,rtc";
- reg = <0x1e781000 0x18>;
- };
-
- timer: timer@98400000 {
- compatible = "aspeed,timer";
- reg = <0x1e782000 0x90>;
- // The moxart_timer driver registers only one interrupt
- // and assumes it's for timer 1
- //interrupts = <16 17 18 35 36 37 38 39>;
- interrupts = <16>;
- clocks = <&clk_apb>;
- };
-
- gpio: gpio@1e780000 {
- compatible = "aspeed,ast2400-gpio";
- reg = <0x1e780000 0x1000>;
- interrupts = <20>;
- };
-
- uart1: serial@1e783000 {
- compatible = "ns16550a";
- reg = <0x1e783000 0x1000>;
- reg-shift = <2>;
- interrupts = <9>;
- clock-frequency = < 1843200 >;
- no-loopback-test;
- };
- uart2: serial@1e78d000 {
- compatible = "ns16550a";
- reg = <0x1e78d000 0x1000>;
- reg-shift = <2>;
- interrupts = <32>;
- clock-frequency = < 1843200 >;
- no-loopback-test;
- };
- /* APSS UART */
- uart3: serial@1e78e000 {
- compatible = "ns16550a";
- reg = <0x1e78e000 0x1000>;
- reg-shift = <2>;
- interrupts = <33>;
- clock-frequency = < 1843200 >;
- no-loopback-test;
- };
-
- /* Host UART */
- uart4: serial@1e78f000 {
- compatible = "ns16550a";
- reg = <0x1e78f000 0x1000>;
- reg-shift = <2>;
- interrupts = <34>;
- clock-frequency = < 1843200 >;
- current-speed = < 115200 >;
- no-loopback-test;
- };
-#if 1
- /* BMC UART */
- uart5: serial@1e784000 {
- compatible = "ns16550a";
- reg = <0x1e784000 0x1000>;
- reg-shift = <2>;
- interrupts = <10>;
- clock-frequency = < 1843200 >;
- current-speed = < 38400 >;
- no-loopback-test;
- };
-#endif
-
- uart6: serial@1e787000 {
- compatible = "ns16550a";
- reg = <0x1e787000 0x1000>;
- reg-shift = <2>;
- interrupts = <10>;
- clock-frequency = < 1843200 >;
- current-speed = < 38400 >;
- no-loopback-test;
};
};
};
diff --git a/arch/arm/boot/dts/ast2400.dtsi b/arch/arm/boot/dts/ast2400.dtsi
new file mode 100644
index 000000000000..d924ac1e191a
--- /dev/null
+++ b/arch/arm/boot/dts/ast2400.dtsi
@@ -0,0 +1,349 @@
+#include "skeleton.dtsi"
+
+/ {
+ model = "Palmetto BMC";
+ compatible = "tyan,palmetto-bmc", "aspeed,ast2400";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&vic>;
+
+ aliases {
+ serial0 = &uart5;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,38400";
+ };
+
+ memory {
+ reg = < 0x40000000 0x10000000 >;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "arm,arm926ej-s";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ // FIXME
+ clocks {
+ // Do a proper driver... for now, we know the straps
+ // and uboot config on palmetto are:
+ // - CLKIN is 48Mhz
+ // - HPLL is 384Mhz
+ // - CPU:AHB is strapped 2:1
+ // - PCLK is HPLL/8 = 48Mhz
+ clk_apb: clk_apb {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <48000000>;
+ };
+ clk_hpll: clk_hpll {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <384000000>;
+ };
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ vic: interrupt-controller@1e6c0080 {
+ compatible = "aspeed,new-vic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ valid-sources = < 0xffffffff 0x0007ffff>;
+ reg = <0x1e6c0080 0x80>;
+ };
+
+ mac0: ethernet@1e660000 {
+ compatible = "faraday,ftgmac100", "aspeed,ast2400-mac";
+ reg = <0x1e660000 0x180>;
+ interrupts = <2>;
+ use-nc-si;
+ no-hw-checksum;
+ };
+
+ apb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram@1e72000 {
+ compatible = "mmio-sram";
+ reg = <0x1e72000 0x8000>; // 32K
+ };
+
+ ibt@1e789140 {
+ compatible = "aspeed,bt-host";
+ reg = <0x1e789140 0x18>;
+ };
+
+ i2c: i2c@1e78a040 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "aspeed,ast2400-i2c-common";
+ reg = <0x1e78a000 0x40>;
+ ranges = <0 0x1e78a000 0x1000>;
+ interrupts = <12>;
+ clocks = <&clk_apb>;
+
+ i2c0: i2c-bus@0x40 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x40 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <0>;
+ clock-frequency = <100000>;
+ status = "okay";
+ eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+ pagesize = <64>;
+ };
+ rtc@68 {
+ compatible = "dallas,ds3231";
+ reg = <0x68>;
+ // interrupts = <GPIOF0>
+ };
+ };
+
+ i2c1: i2c-bus@0x80 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x80 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <1>;
+ clock-frequency = <100000>;
+ status = "okay";
+ };
+
+ i2c2: i2c-bus@0xC0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xC0 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <2>;
+ clock-frequency = <100000>;
+ status = "okay";
+ tmp423@4c {
+ compatible = "ti,tmp423";
+ reg = <0x4c>;
+ };
+ };
+
+ i2c3: i2c-bus@0x100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x100 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <3>;
+ clock-frequency = <100000>;
+ status = "okay";
+ };
+
+ i2c4: i2c-bus@0x140 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x140 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <4>;
+ clock-frequency = <100000>;
+ status = "okay";
+ };
+
+ i2c5: i2c-bus@0x180 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x180 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <5>;
+ clock-frequency = <100000>;
+ status = "okay";
+ };
+
+ i2c6: i2c-bus@0x1C0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1C0 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <6>;
+ clock-frequency = <100000>;
+ status = "okay";
+ };
+
+ i2c7: i2c-bus@0x300 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x300 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <7>;
+ clock-frequency = <100000>;
+ status = "okay";
+ };
+
+ i2c8: i2c-bus@0x340 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x340 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <8>;
+ clock-frequency = <100000>;
+ status = "okay";
+ };
+
+ i2c9: i2c-bus@0x380 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x380 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <9>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c10: i2c-bus@0x3C0 {
+ reg = <0x380 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <10>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c11: i2c-bus@0x400 {
+ reg = <0x400 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <11>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c12: i2c-bus@0x440 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x400 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <12>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c13: i2c-bus@0x480 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x480 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <13>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ };
+
+ syscon: syscon@1e6e2000 {
+ compatible = "aspeed,syscon", "syscon";
+ reg = <0x1e6e2000 0x1a8>;
+ interrupts = <19>;
+ clocks = <&clk_apb>;
+ status = "okay";
+ };
+
+ wdt: wdt@1e785000 {
+ compatible = "aspeed,wdt", "wdt";
+ reg = <0x1e785000 0x1c4>;
+ interrupts = <27>;
+ clocks = <&clk_apb>;
+ };
+
+ rtc: rtc@1e781000 {
+ compatible = "aspeed,rtc";
+ reg = <0x1e781000 0x18>;
+ };
+
+ timer: timer@98400000 {
+ compatible = "aspeed,timer";
+ reg = <0x1e782000 0x90>;
+ // The moxart_timer driver registers only one interrupt
+ // and assumes it's for timer 1
+ //interrupts = <16 17 18 35 36 37 38 39>;
+ interrupts = <16>;
+ clocks = <&clk_apb>;
+ };
+
+ gpio: gpio@1e780000 {
+ compatible = "aspeed,ast2400-gpio";
+ reg = <0x1e780000 0x1000>;
+ interrupts = <20>;
+ };
+
+ uart1: serial@1e783000 {
+ compatible = "ns16550a";
+ reg = <0x1e783000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <9>;
+ clock-frequency = < 1843200 >;
+ no-loopback-test;
+ };
+ uart2: serial@1e78d000 {
+ compatible = "ns16550a";
+ reg = <0x1e78d000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <32>;
+ clock-frequency = < 1843200 >;
+ no-loopback-test;
+ };
+ /* APSS UART */
+ uart3: serial@1e78e000 {
+ compatible = "ns16550a";
+ reg = <0x1e78e000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <33>;
+ clock-frequency = < 1843200 >;
+ no-loopback-test;
+ };
+
+ /* Host UART */
+ uart4: serial@1e78f000 {
+ compatible = "ns16550a";
+ reg = <0x1e78f000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <34>;
+ clock-frequency = < 1843200 >;
+ current-speed = < 115200 >;
+ no-loopback-test;
+ };
+#if 1
+ /* BMC UART */
+ uart5: serial@1e784000 {
+ compatible = "ns16550a";
+ reg = <0x1e784000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <10>;
+ clock-frequency = < 1843200 >;
+ current-speed = < 38400 >;
+ no-loopback-test;
+ };
+#endif
+
+ uart6: serial@1e787000 {
+ compatible = "ns16550a";
+ reg = <0x1e787000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <10>;
+ clock-frequency = < 1843200 >;
+ current-speed = < 38400 >;
+ no-loopback-test;
+ };
+ };
+ };
+};
diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c
index 395e965c46a6..551d454197ac 100644
--- a/drivers/i2c/busses/i2c-aspeed.c
+++ b/drivers/i2c/busses/i2c-aspeed.c
@@ -1257,6 +1257,7 @@ static int aspeed_i2c_add_bus(struct device_node *np,
bus->adap.algo = &i2c_ast_algorithm;
bus->adap.algo_data = bus;
bus->adap.dev.parent = &pdev->dev;
+ bus->adap.dev.of_node = np;
snprintf(bus->adap.name, sizeof(bus->adap.name), "Aspeed i2c at %p",
bus->base);
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index c83e4d13cfc5..de2c22bd0399 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -496,7 +496,6 @@ static int i2c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
if (add_uevent_var(env, "MODALIAS=%s%s",
I2C_MODULE_PREFIX, client->name))
return -ENOMEM;
- dev_dbg(dev, "uevent\n");
return 0;
}
generated by cgit v1.2.3 (git 2.39.0) at 2024-06-11 11:35:48 +0300