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-rw-r--r--arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts517
-rw-r--r--arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts975
-rw-r--r--arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts362
-rw-r--r--arch/arm/boot/dts/aspeed-g4.dtsi108
-rw-r--r--arch/arm/boot/dts/aspeed-g5.dtsi132
-rw-r--r--arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi10
-rw-r--r--arch/arm/boot/dts/aspeed-g6.dtsi250
-rw-r--r--arch/arm/boot/dts/openbmc-flash-layout-intel-128MB.dtsi69
-rw-r--r--arch/arm/boot/dts/openbmc-flash-layout-intel-64MB.dtsi38
-rw-r--r--arch/arm/configs/intel_bmc_defconfig314
10 files changed, 2682 insertions, 93 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts b/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts
new file mode 100644
index 000000000000..a460169e1b7b
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts
@@ -0,0 +1,517 @@
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/i2c/i2c.h>
+
+/ {
+ model = "Intel AST2500 BMC";
+ compatible = "intel,ast2500-bmc", "aspeed,ast2500";
+
+ aliases {
+ serial4 = &uart5;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200 earlyprintk";
+ };
+
+ memory@80000000 {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ vga_memory: framebuffer@7f000000 {
+ no-map;
+ reg = <0x7f000000 0x01000000>;
+ };
+
+ gfx_memory: framebuffer {
+ size = <0x01000000>;
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+
+ video_engine_memory: jpegbuffer {
+ size = <0x02000000>; /* 32M */
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+
+ ramoops@9eff0000{
+ compatible = "ramoops";
+ reg = <0x9eff0000 0x10000>;
+ record-size = <0x2000>;
+ console-size = <0x2000>;
+ };
+ };
+
+ vga-shared-memory {
+ compatible = "aspeed,ast2500-vga-sharedmem";
+ reg = <0x9ff00000 0x100000>;
+ };
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
+ <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
+ <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
+ <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ identify {
+ default-state = "on";
+ gpios = <&gpio ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>;
+ };
+
+ status_amber {
+ default-state = "off";
+ gpios = <&gpio ASPEED_GPIO(S, 5) GPIO_ACTIVE_LOW>;
+ };
+
+ status_green {
+ default-state = "keep";
+ gpios = <&gpio ASPEED_GPIO(S, 4) GPIO_ACTIVE_LOW>;
+ };
+
+ fan1_fault {
+ default-state = "off";
+ gpios = <&sgpio ASPEED_GPIO(C, 4) GPIO_ACTIVE_HIGH>;
+ };
+
+ fan2_fault {
+ default-state = "off";
+ gpios = <&sgpio ASPEED_GPIO(C, 5) GPIO_ACTIVE_HIGH>;
+ };
+
+ fan3_fault {
+ default-state = "off";
+ gpios = <&sgpio ASPEED_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
+ };
+
+ fan4_fault {
+ default-state = "off";
+ gpios = <&sgpio ASPEED_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
+ };
+
+ fan5_fault {
+ default-state = "off";
+ gpios = <&sgpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
+ };
+
+ fan6_fault {
+ default-state = "off";
+ gpios = <&sgpio ASPEED_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
+ };
+
+ fan7_fault {
+ default-state = "off";
+ gpios = <&sgpio ASPEED_GPIO(D, 2) GPIO_ACTIVE_HIGH>;
+ };
+
+ fan8_fault {
+ default-state = "off";
+ gpios = <&sgpio ASPEED_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ beeper {
+ compatible = "pwm-beeper";
+ pwms = <&timer 6 1000000 0>;
+ };
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+#include "openbmc-flash-layout-intel-64MB.dtsi"
+ };
+};
+
+&espi {
+ status = "okay";
+};
+
+&jtag {
+ status = "okay";
+};
+
+&peci0 {
+ status = "okay";
+ gpios = <&gpio ASPEED_GPIO(F, 6) 0>;
+};
+
+&syscon {
+ uart-clock-high-speed;
+ status = "okay";
+
+ misc_control {
+ compatible = "aspeed,bmc-misc";
+ uart_port_debug {
+ offset = <0x2c>;
+ bit-mask = <0x1>;
+ bit-shift = <10>;
+ read-only;
+ };
+ p2a-bridge {
+ offset = <0x180>;
+ bit-mask = <0x1>;
+ bit-shift = <1>;
+ read-only;
+ };
+ boot-2nd-flash {
+ offset = <0x70>;
+ bit-mask = <0x1>;
+ bit-shift = <17>;
+ read-only;
+ };
+ chip_id {
+ offset = <0x150>;
+ bit-mask = <0x0fffffff 0xffffffff>;
+ bit-shift = <0>;
+ read-only;
+ reg-width = <64>;
+ hash-data = "d44f9b804976fa23c2e25d62f16154d26520a7e24c5555095fd1b55c027804f1570dcd16189739c640cd7d9a6ce14944a2c4eaf1dc429eed6940e8a83498a474";
+ };
+ silicon_id {
+ offset = <0x7c>;
+ bit-mask = <0xffffffff>;
+ bit-shift = <0>;
+ read-only;
+ reg-width = <32>;
+ };
+ };
+};
+
+&adc {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+ gpio-line-names =
+ /*A0-A7*/ "","","","","","","","",
+ /*B0-B7*/ "FM_BMC_BOARD_SKU_ID0_N","FM_BMC_BOARD_SKU_ID1_N","FM_BMC_BOARD_SKU_ID2_N","FM_BMC_BOARD_SKU_ID3_N","FM_BMC_BOARD_SKU_ID4_N","","","",
+ /*C0-C7*/ "","","","","","","","",
+ /*D0-D7*/ "","","","","","","","",
+ /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","DEBUG_EN_N","","",
+ /*F0-F7*/ "NMI_OUT","","","","CPU_ERR0","CPU_ERR1","PLTRST_N","PRDY_N",
+ /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","LCP_ENTER_BUTTON","LCP_LEFT_BUTTON","FM_BMC_BOARD_SKU_ID5_N","","",
+ /*H0-H7*/ "","","","FM_NODE_ID_1","FM_NODE_ID_2","FM_NODE_ID_3","FM_NODE_ID_4","FM_240VA_STATUS",
+ /*I0-I7*/ "FM_SYS_FAN0_PRSNT_D_N","FM_SYS_FAN1_PRSNT_D_N","FM_SYS_FAN2_PRSNT_D_N","FM_SYS_FAN3_PRSNT_D_N","FM_SYS_FAN4_PRSNT_D_N","FM_SYS_FAN5_PRSNT_D_N","","",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","","",
+ /*M0-M7*/ "","","","","","","","",
+ /*N0-N7*/ "","","","","","","","",
+ /*O0-O7*/ "","","","","","","","",
+ /*P0-P7*/ "","","","","","","","",
+ /*Q0-Q7*/ "","","","","","","","PWR_DEBUG_N",
+ /*R0-R7*/ "","XDP_PRST_N","","","","","","CHASSIS_INTRUSION",
+ /*S0-S7*/ "REMOTE_DEBUG_ENABLE","SYSPWROK","RSMRST_N","","","","","",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","","","","","","",
+ /*V0-V7*/ "","","","","","","","",
+ /*W0-W7*/ "","","","","","","","",
+ /*X0-X7*/ "","","","","","","","",
+ /*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","",
+ /*Z0-Z7*/ "","SIO_POWER_GOOD","","","","","","",
+ /*AA0-AA7*/ "P3VBAT_BRIDGE_EN","","","","PREQ_N","TCK_MUX_SEL","SMI","POST_COMPLETE",
+ /*AB0-AB7*/ "","NMI_BUTTON","ID_BUTTON","PS_PWROK","","","","",
+ /*AC0-AC7*/ "","","","","","","","";
+};
+
+&sgpio {
+ ngpios = <80>;
+ bus-frequency = <2000000>;
+ status = "okay";
+ /* SGPIO lines. even: input, odd: output */
+ gpio-line-names =
+ /*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_ABCD_VRHOT","","CPU1_MEM_EFGH_VRHOT","","","","","",
+ /*B0-B7*/ "CPU1_MISMATCH","LED_CPU1_CH1_DIMM1_FAULT","CPU1_MEM_THERM_EVENT","LED_CPU1_CH1_DIMM2_FAULT","CPU2_PRESENCE","LED_CPU1_CH2_DIMM1_FAULT","CPU2_THERMTRIP","LED_CPU1_CH2_DIMM2_FAULT","CPU2_VRHOT","LED_CPU1_CH3_DIMM1_FAULT","CPU2_FIVR_FAULT","LED_CPU1_CH3_DIMM2_FAULT","CPU2_MEM_ABCD_VRHOT","LED_CPU1_CH4_DIMM1_FAULT","CPU2_MEM_EFGH_VRHOT","LED_CPU1_CH4_DIMM2_FAULT",
+ /*C0-C7*/ "","LED_CPU1_CH5_DIMM1_FAULT","","LED_CPU1_CH5_DIMM2_FAULT","CPU2_MISMATCH","LED_CPU1_CH6_DIMM1_FAULT","CPU2_MEM_THERM_EVENT","LED_CPU1_CH6_DIMM2_FAULT","","LED_FAN1_FAULT","","LED_FAN2_FAULT","","LED_FAN3_FAULT","","LED_FAN4_FAULT",
+ /*D0-D7*/ "","LED_FAN5_FAULT","","LED_FAN6_FAULT","","LED_FAN7_FAULT","","LED_FAN8_FAULT","","LED_CPU2_CH1_DIMM1_FAULT","","LED_CPU2_CH1_DIMM2_FAULT","","LED_CPU2_CH2_DIMM1_FAULT","","LED_CPU2_CH2_DIMM2_FAULT",
+ /*E0-E7*/ "","LED_CPU2_CH3_DIMM1_FAULT","","LED_CPU2_CH3_DIMM2_FAULT","","LED_CPU2_CH4_DIMM1_FAULT","","LED_CPU2_CH4_DIMM2_FAULT","","LED_CPU2_CH5_DIMM1_FAULT","","LED_CPU2_CH5_DIMM2_FAULT","","LED_CPU2_CH6_DIMM1_FAULT","","LED_CPU2_CH6_DIMM2_FAULT",
+ /*F0-F7*/ "SGPIO_PLD_MINOR_REV_BIT0","LED_CPU3_CH1_DIMM1_FAULT","SGPIO_PLD_MINOR_REV_BIT1","LED_CPU3_CH1_DIMM2_FAULT","SGPIO_PLD_MINOR_REV_BIT2","LED_CPU3_CH2_DIMM1_FAULT","SGPIO_PLD_MINOR_REV_BIT3","LED_CPU3_CH2_DIMM2_FAULT","SGPIO_PLD_MAJOR_REV_BIT0","LED_CPU3_CH3_DIMM1_FAULT","SGPIO_PLD_MAJOR_REV_BIT1","LED_CPU3_CH3_DIMM2_FAULT","SGPIO_PLD_MAJOR_REV_BIT2","LED_CPU3_CH4_DIMM1_FAULT","SGPIO_PLD_MAJOR_REV_BIT3","LED_CPU3_CH4_DIMM2_FAULT",
+ /*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","LED_CPU3_CH5_DIMM1_FAULT","MAIN_PLD_MINOR_REV_BIT1","LED_CPU3_CH5_DIMM2_FAULT","MAIN_PLD_MINOR_REV_BIT2","LED_CPU3_CH6_DIMM1_FAULT","MAIN_PLD_MINOR_REV_BIT3","LED_CPU3_CH6_DIMM2_FAULT","MAIN_PLD_MAJOR_REV_BIT0","LED_CPU4_CH1_DIMM1_FAULT","MAIN_PLD_MAJOR_REV_BIT1","LED_CPU4_CH1_DIMM2_FAULT","MAIN_PLD_MAJOR_REV_BIT2","LED_CPU4_CH2_DIMM1_FAULT","MAIN_PLD_MAJOR_REV_BIT3","LED_CPU4_CH2_DIMM2_FAULT",
+ /*H0-H7*/ "","LED_CPU4_CH3_DIMM1_FAULT","","LED_CPU4_CH3_DIMM2_FAULT","","LED_CPU4_CH4_DIMM1_FAULT","","LED_CPU4_CH4_DIMM2_FAULT","","LED_CPU4_CH5_DIMM1_FAULT","","LED_CPU4_CH5_DIMM2_FAULT","","LED_CPU4_CH6_DIMM1_FAULT","","LED_CPU4_CH6_DIMM2_FAULT",
+ /*I0-I7*/ "","","","","","","","","","","","","","","","",
+ /*J0-J7*/ "","","","","","","","","","","","","","","","";
+};
+
+&kcs3 {
+ aspeed,lpc-io-reg = <0xCA2>;
+ status = "okay";
+};
+
+&kcs4 {
+ aspeed,lpc-io-reg = <0xCA4>;
+ status = "okay";
+};
+
+&sio_regs {
+ status = "okay";
+ sio_status {
+ offset = <0x10C>;
+ bit-mask = <0x1F>;
+ bit-shift = <4>;
+ };
+};
+
+&lpc_sio {
+ status = "okay";
+};
+
+&lpc_snoop {
+ snoop-ports = <0x80>;
+ status = "okay";
+};
+
+&mbox {
+ status = "okay";
+};
+
+&uart_routing {
+ status = "okay";
+};
+
+/**
+ * SAFS through SPI1 is available only on Wilson Point.
+ * These pins are used as fan presence checking gpios in WFP
+ * so commenting it out for now.
+ * &spi1 {
+ * status = "okay";
+ *
+ * flash@0 {
+ * m25p,fast-read;
+ * status = "okay";
+ * };
+ *};
+ */
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default
+ &pinctrl_nrts1_default
+ &pinctrl_ndtr1_default
+ &pinctrl_ndsr1_default
+ &pinctrl_ncts1_default
+ &pinctrl_ndcd1_default
+ &pinctrl_nri1_default>;
+};
+
+&uart2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd2_default
+ &pinctrl_rxd2_default
+ &pinctrl_nrts2_default
+ &pinctrl_ndtr2_default
+ &pinctrl_ndsr2_default
+ &pinctrl_ncts2_default
+ &pinctrl_ndcd2_default
+ &pinctrl_nri2_default>;
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&uart4 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart5 {
+ status = "okay";
+};
+
+&mac1 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
+};
+
+&mac0 {
+ status = "okay";
+ use-ncsi;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii1_default>;
+};
+
+&i2c0 {
+ multi-master;
+ general-call;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c1 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c2 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c3 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+
+ rtc-pch@44 {
+ compatible = "rtc,pchc620";
+ reg = <0x44>;
+ };
+};
+
+&i2c4 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c5 {
+ bus-frequency = <1000000>;
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c6 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c7 {
+ multi-master;
+ #retries = <3>;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c9 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c11 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c13 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&gfx {
+ status = "okay";
+ memory-region = <&gfx_memory>;
+};
+
+&vuart {
+ status = "okay";
+};
+
+&pwm_tacho {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
+ &pinctrl_pwm2_default &pinctrl_pwm3_default
+ &pinctrl_pwm4_default &pinctrl_pwm5_default
+ &pinctrl_pwm6_default &pinctrl_pwm7_default>;
+
+ fan@0 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
+ };
+ fan@1 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
+ };
+ fan@2 {
+ reg = <0x02>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
+ };
+ fan@3 {
+ reg = <0x03>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
+ };
+ fan@4 {
+ reg = <0x04>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
+ };
+ fan@5 {
+ reg = <0x05>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0A 0x0B>;
+ };
+ fan@6 {
+ reg = <0x06>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0C 0x0D>;
+ };
+ fan@7 {
+ reg = <0x07>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0E 0x0F>;
+ };
+
+};
+
+&timer {
+/*
+ * Available settings:
+ * fttmr010,pwm-outputs = <5>, <6>, <7>, <8>;
+ * pinctrl-0 = <&pinctrl_timer5_default &pinctrl_timer6_default
+ * &pinctrl_timer7_default &pinctrl_timer8_default>;
+ */
+ fttmr010,pwm-outputs = <6>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_timer6_default>;
+ #pwm-cells = <3>;
+ status = "okay";
+};
+
+&video {
+ status = "okay";
+ memory-region = <&video_engine_memory>;
+};
+
+&vhub {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts
new file mode 100644
index 000000000000..11af2ae99f67
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts
@@ -0,0 +1,975 @@
+// SPDX-License-Identifier: GPL-2.0+
+/dts-v1/;
+
+#include "aspeed-g6.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/i2c/i2c.h>
+
+/ {
+ model = "AST2600 EVB";
+ compatible = "aspeed,ast2600";
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200n8 root=/dev/ram rw init=/linuxrc earlyprintk";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gfx_memory: framebuffer {
+ size = <0x01000000>;
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+
+ video_engine_memory: jpegbuffer {
+ size = <0x02000000>; /* 32M */
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ video_memory: video {
+ size = <0x04000000>;
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ no-map;
+ };
+ };
+
+ vga-shared-memory {
+ compatible = "aspeed,ast2500-vga-sharedmem";
+ reg = <0x9f700000 0x100000>;
+ };
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
+ <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
+ <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
+ <&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ identify {
+ default-state = "off";
+ gpios = <&gpio0 ASPEED_GPIO(B, 7) GPIO_ACTIVE_LOW>;
+ };
+
+ status_amber {
+ default-state = "off";
+ gpios = <&gpio0 ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
+ };
+
+ status_green {
+ default-state = "keep";
+ gpios = <&gpio0 ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>;
+ };
+
+ status_susack {
+ default-state = "off";
+ gpios = <&gpio0 ASPEED_GPIO(V, 6) GPIO_ACTIVE_LOW>;
+ };
+
+ fan1_fault {
+ default-state = "off";
+ gpios = <&sgpiom0 41 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan2_fault {
+ default-state = "off";
+ gpios = <&sgpiom0 43 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan3_fault {
+ default-state = "off";
+ gpios = <&sgpiom0 45 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan4_fault {
+ default-state = "off";
+ gpios = <&sgpiom0 47 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan5_fault {
+ default-state = "off";
+ gpios = <&sgpiom0 49 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan6_fault {
+ default-state = "off";
+ gpios = <&sgpiom0 51 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan7_fault {
+ default-state = "off";
+ gpios = <&sgpiom0 53 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan8_fault {
+ default-state = "off";
+ gpios = <&sgpiom0 55 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ beeper {
+ compatible = "pwm-beeper";
+ pwms = <&pwm_tacho 7 1000000 0>;
+ };
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ m25p,fast-read;
+#include "openbmc-flash-layout-intel-64MB.dtsi"
+ };
+};
+
+&espi {
+ status = "okay";
+ oob,dma-mode;
+ oob,dma-tx-desc-num = <0x2>;
+ oob,dma-rx-desc-num = <0x8>;
+};
+
+&mctp {
+ status = "okay";
+};
+
+&peci0 {
+ status = "okay";
+ gpios = <&gpio0 ASPEED_GPIO(F, 6) 0>;
+};
+
+&syscon {
+ uart-clock-high-speed;
+ status = "okay";
+
+ misc_control {
+ compatible = "aspeed,bmc-misc";
+ uart_port_debug {
+ offset = <0xc8>;
+ bit-mask = <0x1>;
+ bit-shift = <1>;
+ read-only;
+ };
+
+ uart1_port_debug {
+ offset = <0xd8>;
+ bit-mask = <0x1>;
+ bit-shift = <3>;
+ read-only;
+ };
+
+ p2a-bridge {
+ offset = <0xC20>;
+ bit-mask = <0x1>;
+ bit-shift = <1>;
+ read-only;
+ };
+
+ boot-2nd-flash {
+ offset = <0x500>;
+ bit-mask = <0x1>;
+ bit-shift = <31>;
+ read-only;
+ };
+
+ chip_id {
+ offset = <0x5b0>;
+ bit-mask = <0xffffffff 0xffffffff>;
+ bit-shift = <0>;
+ read-only;
+ reg-width = <64>;
+ hash-data = "d44f9b804976fa23c2e25d62f16154d26520a7e24c5555095fd1b55c027804f1570dcd16189739c640cd7d9a6ce14944a2c4eaf1dc429eed6940e8a83498a474";
+ };
+ silicon_id {
+ offset = <0x14>;
+ bit-mask = <0xffffffff>;
+ bit-shift = <0>;
+ read-only;
+ reg-width = <32>;
+ };
+ };
+};
+
+#if 0
+ GPIO Alias: (runtime alias -> schematic name)
+ ID_BUTTON -> FP_ID_BTN_N
+ CPU_CATERR -> FM_PLT_BMC_THERMTRIP_N
+ PCH_BMC_THERMTRIP -> FM_PLT_BMC_THERMTRIP_N
+ RESET_BUTTON -> FP_BMC_RST_BTN_N
+ RESET_OUT -> RST_BMC_RSTBTN_OUT_R_N
+ POWER_BUTTON -> FP_BMC_PWR_BTN_R_N
+ POWER_OUT -> FM_BMC_PWR_BTN_N
+ PREQ_N -> DBP_ASD_BMC_PREQ_R_N
+ POST_COMPLETE -> FM_BIOS_POST_CMPLT_BMC_N
+ CPU_ERR0 -> FM_CPU_ERR0_LVT3_N
+ CPU_ERR1 -> FM_CPU_ERR1_LVT3_N
+ CPU_ERR2 -> FM_CPU_ERR2_LVT3_N
+ DEBUG_EN_N -> FM_JTAG_TCK_MUX_SEL_R
+ NMI_OUT -> IRQ_BMC_CPU_NMI_R
+ PLTRST_N -> RST_PLTRST_BMC_N
+ PRDY_N -> DBP_ASD_BMC_PRDY_R_N
+ PWR_DEBUG_N ->
+ XDP_PRST_N ->
+ SYSPWROK ->
+ RSMRST_N ->
+ SIO_S3 -> FM_SLPS3_R_N
+ SIO_S5 -> FM_SLPS4_R_N
+ SIO_ONCONTROL -> FM_BMC_ONCTL_R_N
+ SIO_POWER_GOOD -> PWRGD_CPU0_LVC3_R
+ PS_PWROK -> PWRGD_BMC_PS_PWROK_R
+ P3VBAT_BRIDGE_EN ->
+ TCK_MUX_SEL ->
+ SMI -> IRQ_SMI_ACTIVE_BMC_N
+ NMI_BUTTON -> FP_NMI_BTN_N
+#endif
+&gpio0 {
+ status = "okay";
+ gpio-line-names =
+ /*A0-A7*/ "","","","","SMB_CPU_PIROM_SCL","SMB_CPU_PIROM_SDA","SMB_IPMB_STBY_LVC3_R_SCL","SMB_IPMB_STBY_LVC3_R_SDA",
+ /*B0-B7*/ "FM_1200VA_OC","NMI_OUT","IRQ_SMB3_M2_ALERT_N","","RGMII_BMC_RMM4_LVC3_R_MDC","RGMII_BMC_RMM4_LVC3_R_MDIO","FM_BMC_BMCINIT_R","FP_ID_LED_N",
+ /*C0-C7*/ "FM_FORCE_BMC_UPDATE_N","RST_RGMII_PHYRST_N","FM_TPM_EN_PULSE","FM_BMC_CRASHLOG_TRIG_N","IRQ_BMC_PCH_NMI_R","FM_CPU1_DISABLE_COD_N","FM_4S_8S_N_MODE","FM_STANDALONE_MODE_N",
+ /*D0-D7*/ "CPU_ERR0","CPU_ERR1","CPU_ERR2","PRDY_N","FM_SPD_SWITCH_CTRL_N","","","",
+ /*E0-E7*/ "FM_SKT1_FAULT_LED","FM_SKT0_FAULT_LED","CLK_50M_CKMNG_BMCB","FM_BMC_BOARD_REV_ID2_N","","","","",
+ /*F0-F7*/ "FM_BMC_BOARD_SKU_ID0_N","FM_BMC_BOARD_SKU_ID1_N","FM_BMC_BOARD_SKU_ID2_N","FM_BMC_BOARD_SKU_ID3_N","FM_BMC_BOARD_SKU_ID4_N","FM_BMC_BOARD_SKU_ID5_N","ID_BUTTON","PS_PWROK",
+ /*G0-G7*/ "FM_SMB_BMC_NVME_LVC3_ALERT_N","RST_BMC_I2C_M2_R_N","FP_LED_STATUS_GREEN_N","FP_LED_STATUS_AMBER_N","FM_BMC_BOARD_REV_ID0_N","FM_BMC_BOARD_REV_ID1_N","FM_BMC_CPU_FBRK_OUT_R_N","DBP_PRESENT_IN_R2_N",
+ /*H0-H7*/ "SGPIO_BMC_CLK_R","SGPIO_BMC_LD_R","SGPIO_BMC_DOUT_R","SGPIO_BMC_DIN","PLTRST_N","CPU_CATERR","PCH_BMC_THERMTRIP","",
+ /*I0-I7*/ "JTAG_ASD_NTRST_R_N","JTAG_ASD_TDI_R","JTAG_ASD_TCK_R","JTAG_ASD_TMS_R","JTAG_ASD_TDO","FM_BMC_PWRBTN_OUT_R_N","FM_BMC_PWR_BTN_N","",
+ /*J0-J7*/ "SMB_CHASSENSOR_STBY_LVC3_SCL","SMB_CHASSENSOR_STBY_LVC3_SDA","FM_NODE_ID0","FM_NODE_ID1","","","","",
+ /*K0-K7*/ "SMB_HSBP_STBY_LVC3_R_SCL","SMB_HSBP_STBY_LVC3_R_SDA","SMB_SMLINK0_STBY_LVC3_R2_SCL","SMB_SMLINK0_STBY_LVC3_R2_SDA","SMB_TEMPSENSOR_STBY_LVC3_R_SCL","SMB_TEMPSENSOR_STBY_LVC3_R_SDA","SMB_PMBUS_SML1_STBY_LVC3_R_SCL","SMB_PMBUS_SML1_STBY_LVC3_R_SDA",
+ /*L0-L7*/ "SMB_PCIE_STBY_LVC3_R_SCL","SMB_PCIE_STBY_LVC3_R_SDA","SMB_HOST_STBY_BMC_LVC3_R_SCL","SMB_HOST_STBY_BMC_LVC3_R_SDA","PREQ_N","TCK_MUX_SEL","V_BMC_GFX_HSYNC_R","V_BMC_GFX_VSYNC_R",
+ /*M0-M7*/ "SPA_CTS_N","SPA_DCD_N","SPA_DSR_N","PU_SPA_RI_N","SPA_DTR_N","SPA_RTS_N","SPA_SOUT","SPA_SIN",
+ /*N0-N7*/ "SPB_CTS_N","SPB_DCD_N","SPB_DSR_N","PU_SPB_RI_N","SPB_DTR_N","SPB_RTS_N","SPB_SOUT","SPB_SIN",
+ /*O0-O7*/ "FAN_BMC_PWM0","FAN_BMC_PWM1","FAN_BMC_PWM2","FAN_BMC_PWM3","FAN_BMC_PWM4","FAN_BMC_PWM5","NMI_BUTTON","SPEAKER_BMC_R",
+ /*P0-P7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","FAN_BMC_PWM6","FAN_BMC_PWM7","FAN_BMC_PWM8","FAN_BMC_PWM9",
+ /*Q0-Q7*/ "FAN_BMC_TACH0","FAN_BMC_TACH1","FAN_BMC_TACH2","FAN_BMC_TACH3","FAN_BMC_TACH4","FAN_BMC_TACH5","FAN_BMC_TACH6","FAN_BMC_TACH7",
+ /*R0-R7*/ "FAN_BMC_TACH8","FAN_BMC_TACH9","","","","","","",
+ /*S0-S7*/ "RST_BMC_PCIE_MUX_N","FM_BMC_EUP_LOT6_N","","","","A_P3V_BAT_SCALED_EN","REMOTE_DEBUG_ENABLE","FM_PCHHOT_N",
+ /*T0-T7*/ "A_P12V_PSU_SCALED","A_P12V_AUX_SCALED","A_P3V3_SCALED","A_P5V_SCALED","A_PVNN_PCH_AUX_SENSOR","A_P1V05_PCH_AUX_SENSOR","A_P1V8_AUX_SENSOR","A_P3V_BAT_SCALED",
+ /*U0-U7*/ "A_PVCCIN_CPU0_SENSOR","A_PVCCIN_CPU1_SENSOR","A_PVCCINFAON_CPU0_SENSOR","A_PVCCINFAON_CPU1_SENSOR","A_PVCCFA_EHV_FIVRA_CPU0_SENSOR","A_PVCCFA_EHV_FIVRA_CPU1_SENSOR","A_PVCCD_HV_CPU0_SENSOR","A_PVCCD_HV_CPU1_SENSOR",
+ /*V0-V7*/ "SIO_S3","SIO_S5","TP_BMC_SIO_PWREQ_N","SIO_ONCONTROL","SIO_POWER_GOOD","LED_BMC_HB_LED_N","FM_BMC_SUSACK_N","",
+ /*W0-W7*/ "LPC_LAD0_ESPI_R_IO0","LPC_LAD1_ESPI_R_IO1","LPC_LAD2_ESPI_R_IO2","LPC_LAD3_ESPI_R_IO3","CLK_24M_66M_LPC0_ESPI_BMC","LPC_LFRAME_N_ESPI_CS0_BMC_N","IRQ_LPC_SERIRQ_ESPI_ALERT_N","RST_LPC_LRST_ESPI_RST_BMC_R_N",
+ /*X0-X7*/ "","SMI","POST_COMPLETE","","","","","",
+ /*Y0-Y7*/ "","IRQ_SML0_ALERT_BMC_R2_N","","IRQ_SML1_PMBUS_BMC_ALERT_N","SPI_BMC_BOOT_R_IO2","SPI_BMC_BOOT_R_IO3","PU_SPI_BMC_BOOT_ABR","PU_SPI_BMC_BOOT_WP_N",
+ /*Z0-Z7*/ "PWRGD_P3V3_RISER1","PWRGD_P3V3_RISER2","","HW_STRAP_5","HW_STRAP_6","HW_STRAP_7","HW_STRAP_2","HW_STRAP_3";
+};
+
+&gpio1 {
+ status = "okay";
+ gpio-line-names = /* GPIO18 A-E */
+ /*A0-A7*/ "","","RST_EMMC_BMC_R_N","FM_SYS_FAN6_PRSNT_D_N","FM_SYS_FAN0_PRSNT_D_N","FM_SYS_FAN1_PRSNT_D_N","FM_SYS_FAN2_PRSNT_D_N","FM_SYS_FAN3_PRSNT_D_N",
+ /*B0-B7*/ "FM_SYS_FAN4_PRSNT_D_N","FM_SYS_FAN5_PRSNT_D_N","","FM_SYS_FAN7_PRSNT_D_N","RGMII_BMC_RMM4_TX_R_CLK","RGMII_BMC_RMM4_TX_R_CTRL","RGMII_BMC_RMM4_R_TXD0","RGMII_BMC_RMM4_R_TXD1",
+ /*C0-C7*/ "RGMII_BMC_RMM4_R_TXD2","RGMII_BMC_RMM4_R_TXD3","RGMII_BMC_RMM4_RX_CLK","RGMII_BMC_RMM4_RX_CTRL","RGMII_BMC_RMM4_RXD0","RGMII_BMC_RMM4_RXD1","RGMII_BMC_RMM4_RXD2","RGMII_BMC_RMM4_RXD3",
+ /*D0-D7*/ "EMMC_BMC_R_CLK","EMMC_BMC_R_CMD","EMMC_BMC_R_DATA0","EMMC_BMC_R_DATA1","EMMC_BMC_R_DATA2","EMMC_BMC_R_DATA3","EMMC_BMC_CD_N","EMMC_BMC_WP_N",
+ /*E0-E3*/ "EMMC_BMC_R_DATA4","EMMC_BMC_R_DATA5","EMMC_BMC_R_DATA6","EMMC_BMC_R_DATA7";
+};
+
+&sgpiom0 {
+ ngpios = <80>;
+ bus-frequency = <2000000>;
+ status = "okay";
+#if 0
+ SGPIO Alias: (runtime alias -> net name)
+ CPU1_PRESENCE -> FM_CPU0_SKTOCC_LVT3_N
+ CPU1_THERMTRIP -> H_CPU0_THERMTRIP_LVC1_N
+ CPU1_VRHOT -> IRQ_CPU0_VRHOT_N
+ CPU1_FIVR_FAULT -> H_CPU0_MON_FAIL_LVC1_N
+ CPU1_MEM_VRHOT -> IRQ_CPU0_MEM_VRHOT_N
+ CPU1_MEM_THERM_EVENT -> H_CPU0_MEMHOT_OUT_LVC1_N
+ CPU1_MISMATCH -> FM_CPU0_MISMATCH
+ CPU2_PRESENCE -> FM_CPU1_SKTOCC_LVT3_N
+ CPU2_THERMTRIP -> H_CPU1_THERMTRIP_LVC1_N
+ CPU2_VRHOT -> IRQ_CPU1_VRHOT_N
+ CPU2_FIVR_FAULT -> H_CPU1_MON_FAIL_LVC1_N
+ CPU2_MEM_VRHOT -> IRQ_CPU1_MEM_VRHOT_N
+ CPU2_MEM_THERM_EVENT -> H_CPU1_MEMHOT_OUT_LVC1_N
+ CPU2_MISMATCH -> FM_CPU1_MISMATCH
+#endif
+ /* SGPIO lines. even: input, odd: output */
+ gpio-line-names =
+ /*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_VRHOT","","CPU1_MEM_THERM_EVENT","","FM_CPU0_PROC_ID0","","FM_CPU0_PROC_ID1","",
+ /*B0-B7*/ "CPU1_MISMATCH","LED_CPU1_CH1_DIMM1_FAULT","","LED_CPU1_CH1_DIMM2_FAULT","CPU2_PRESENCE","LED_CPU1_CH2_DIMM1_FAULT","CPU2_THERMTRIP","LED_CPU1_CH2_DIMM2_FAULT","CPU2_VRHOT","LED_CPU1_CH3_DIMM1_FAULT","CPU2_FIVR_FAULT","LED_CPU1_CH3_DIMM2_FAULT","CPU2_MEM_VRHOT","LED_CPU1_CH4_DIMM1_FAULT","CPU2_MEM_THERM_EVENT","LED_CPU1_CH4_DIMM2_FAULT",
+ /*C0-C7*/ "FM_CPU1_PROC_ID0","LED_CPU1_CH5_DIMM1_FAULT","FM_CPU1_PROC_ID1","LED_CPU1_CH5_DIMM2_FAULT","CPU2_MISMATCH","LED_CPU1_CH6_DIMM1_FAULT","","LED_CPU1_CH6_DIMM2_FAULT","","LED_FAN1_FAULT","","LED_FAN2_FAULT","","LED_FAN3_FAULT","","LED_FAN4_FAULT",
+ /*D0-D7*/ "","LED_FAN5_FAULT","","LED_FAN6_FAULT","","LED_FAN7_FAULT","","LED_FAN8_FAULT","","LED_CPU2_CH1_DIMM1_FAULT","","LED_CPU2_CH1_DIMM2_FAULT","","LED_CPU2_CH2_DIMM1_FAULT","","LED_CPU2_CH2_DIMM2_FAULT",
+ /*E0-E7*/ "","LED_CPU2_CH3_DIMM1_FAULT","","LED_CPU2_CH3_DIMM2_FAULT","","LED_CPU2_CH4_DIMM1_FAULT","","LED_CPU2_CH4_DIMM2_FAULT","","LED_CPU2_CH5_DIMM1_FAULT","","LED_CPU2_CH5_DIMM2_FAULT","","LED_CPU2_CH6_DIMM1_FAULT","","LED_CPU2_CH6_DIMM2_FAULT",
+ /*F0-F7*/ "CPU1_CPLD_CRC_ERROR","","CPU2_CPLD_CRC_ERROR","","","","","","","","","","","","","",
+ /*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","",
+ /*H0-H7*/ "","","WMEMX_PWR_FLT","","WCPUX_MEM_PWR_FLT","","PWRGD_P3V3_FF","","WPSU_PWR_FLT","","","","","","WPCH_PWR_FLT","",
+ /*I0-I7*/ "FM_CPU0_PKGID0","LED_CPU1_CH7_DIMM1_FAULT","FM_CPU0_PKGID1","LED_CPU1_CH7_DIMM2_FAULT","FM_CPU0_PKGID2","LED_CPU1_CH8_DIMM1_FAULT","H_CPU0_MEMTRIP_LVC1_N","LED_CPU1_CH8_DIMM2_FAULT","FM_CPU1_PKGID0","LED_CPU2_CH7_DIMM1_FAULT","FM_CPU1_PKGID1","LED_CPU2_CH7_DIMM2_FAULT","FM_CPU1_PKGID2","LED_CPU2_CH8_DIMM1_FAULT","H_CPU1_MEMTRIP_LVC1_N","LED_CPU2_CH8_DIMM2_FAULT",
+ /*J0-J7*/ "","","","","","","","","","","","","","","","";
+};
+
+&kcs3 {
+ aspeed,lpc-io-reg = <0xCA2>;
+ status = "okay";
+};
+
+&kcs4 {
+ aspeed,lpc-io-reg = <0xCA4>;
+ status = "okay";
+};
+
+&sio_regs {
+ status = "okay";
+ sio_status {
+ offset = <0x10C>;
+ bit-mask = <0x1F>;
+ bit-shift = <4>;
+ };
+};
+
+&lpc_sio {
+ status = "okay";
+};
+
+&lpc_snoop {
+ snoop-ports = <0x80>;
+ status = "okay";
+};
+
+&mbox {
+ status = "okay";
+};
+
+&mdio1 {
+ status = "okay";
+
+ ethphy1: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+};
+
+&mac1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii2_default>;
+ clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>,
+ <&syscon ASPEED_CLK_MAC2RCLK>;
+ clock-names = "MACCLK", "RCLK";
+ phy-mode = "rgmii";
+ phy-handle = <&ethphy1>;
+};
+
+&mdio2 {
+ status = "okay";
+
+ ethphy2: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+};
+
+&adc0 {
+ aspeed,int-vref-microvolt = <2500000>;
+ aspeed,battery-sensing;
+ status = "okay";
+};
+
+&adc1 {
+ aspeed,int-vref-microvolt = <2500000>;
+ aspeed,battery-sensing;
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default
+ &pinctrl_nrts1_default
+ &pinctrl_ndtr1_default
+ &pinctrl_ndsr1_default
+ &pinctrl_ncts1_default
+ &pinctrl_ndcd1_default
+ &pinctrl_nri1_default>;
+};
+
+&uart2 {
+ status = "okay";
+ pinctrl-0 = <&pinctrl_txd2_default
+ &pinctrl_rxd2_default
+ &pinctrl_nrts2_default
+ &pinctrl_ndtr2_default
+ &pinctrl_ndsr2_default
+ &pinctrl_ncts2_default
+ &pinctrl_ndcd2_default
+ &pinctrl_nri2_default>;
+};
+
+&uart3 {
+ status = "okay";
+ pinctrl-0 = <>;
+};
+
+&uart4 {
+ status = "okay";
+ pinctrl-0 = <>;
+};
+
+&uart5 {
+ status = "okay";
+ // Workaround for A0
+ compatible = "snps,dw-apb-uart";
+};
+
+&uart_routing {
+ status = "okay";
+};
+
+&emmc_controller{
+ status = "okay";
+};
+
+&emmc {
+ non-removable;
+ bus-width = <4>;
+ max-frequency = <52000000>;
+};
+
+&i2c0 {
+ /* SMB_CHASSENSOR_STBY_LVC3 */
+ multi-master;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c4 {
+ /* SMB_HSBP_STBY_LVC3_R */
+ multi-master;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c5 {
+ /* SMB_SMLINK0_STBY_LVC3_R2 */
+ bus-frequency = <1000000>;
+ multi-master;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c6 {
+ /* SMB_TEMPSENSOR_STBY_LVC3_R */
+ multi-master;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c7 {
+ /* SMB_PMBUS_SML1_STBY_LVC3_R */
+ multi-master;
+ #retries = <3>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c8 {
+ /* SMB_PCIE_STBY_LVC3_R */
+ multi-master;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c9 {
+ /* SMB_HOST_STBY_BMC_LVC3_R */
+ multi-master;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+
+ rtc-pch@44 {
+ compatible = "rtc,pchc620";
+ reg = <0x44>;
+ };
+};
+
+&i2c12 {
+ /* SMB_CPU_PIROM */
+ multi-master;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i2c13 {
+ /* SMB_IPMB_STBY_LVC3_R */
+ multi-master;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
+&i3c0 {
+ /* I3C_SPD_DDRABCD_CPU0_BMC */
+ status = "okay";
+ jdec-spd;
+
+ /* Renesas SPD5118 */
+ spd5118_0_0: spd@50,3C000000000 {
+ reg = <0x50 0x3C0 0x00000000>;
+ assigned-address = <0x50>;
+ };
+
+ nvdimm_0_0: nvm@58,3C0000000008 {
+ reg = <0x58 0x3C0 0x00000008>;
+ assigned-address = <0x58>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_0_1: spd@51,3C000000001 {
+ reg = <0x51 0x3C0 0x00000001>;
+ assigned-address = <0x51>;
+ };
+
+ nvdimm_0_1: nvm@59,3C0000000009 {
+ reg = <0x59 0x3C0 0x00000009>;
+ assigned-address = <0x59>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_0_2: spd@52,3C000000002 {
+ reg = <0x52 0x3C0 0x00000002>;
+ assigned-address = <0x52>;
+ };
+
+ nvdimm_0_2: nvm@5A,3C000000000A {
+ reg = <0x5A 0x3C0 0x0000000A>;
+ assigned-address = <0x5A>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_0_3: spd@53,3C000000003 {
+ reg = <0x53 0x3C0 0x00000003>;
+ assigned-address = <0x53>;
+ };
+
+ nvdimm_0_3: nvm@5B,3C000000000B {
+ reg = <0x5B 0x3C0 0x0000000B>;
+ assigned-address = <0x5B>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_0_4: spd@54,3C000000004 {
+ reg = <0x54 0x3C0 0x00000004>;
+ assigned-address = <0x54>;
+ };
+
+ nvdimm_0_4: nvm@5C,3C000000000C {
+ reg = <0x5C 0x3C0 0x0000000C>;
+ assigned-address = <0x5C>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_0_5: spd@55,3C000000005 {
+ reg = <0x55 0x3C0 0x00000005>;
+ assigned-address = <0x55>;
+ };
+
+ nvdimm_0_5: nvm@5D,3C000000000D {
+ reg = <0x5D 0x3C0 0x0000000D>;
+ assigned-address = <0x5D>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_0_6: spd@56,3C000000006 {
+ reg = <0x56 0x3C0 0x00000006>;
+ assigned-address = <0x56>;
+ };
+
+ nvdimm_0_6: nvm@5E,3C000000000E {
+ reg = <0x5E 0x3C0 0x0000000E>;
+ assigned-address = <0x5E>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_0_7: spd@57,3C000000007 {
+ reg = <0x57 0x3C0 0x00000007>;
+ assigned-address = <0x57>;
+ };
+
+ nvdimm_0_7: nvm@5F,3C000000000F {
+ reg = <0x5F 0x3C0 0x0000000F>;
+ assigned-address = <0x5F>;
+ };
+};
+
+&i3c1 {
+ /* I3C_SPD_DDREFGH_CPU0_BMC */
+ status = "okay";
+ jdec-spd;
+
+ /* Renesas SPD5118 */
+ spd5118_1_0: spd@50,3C000000000 {
+ reg = <0x50 0x3C0 0x00000000>;
+ assigned-address = <0x50>;
+ };
+
+ nvdimm_1_0: nvm@58,3C0000000008 {
+ reg = <0x58 0x3C0 0x00000008>;
+ assigned-address = <0x58>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_1_1: spd@51,3C000000001 {
+ reg = <0x51 0x3C0 0x00000001>;
+ assigned-address = <0x51>;
+ };
+
+ nvdimm_1_1: nvm@59,3C0000000009 {
+ reg = <0x59 0x3C0 0x00000009>;
+ assigned-address = <0x59>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_1_2: spd@52,3C000000002 {
+ reg = <0x52 0x3C0 0x00000002>;
+ assigned-address = <0x52>;
+ };
+
+ nvdimm_1_2: nvm@5A,3C000000000A {
+ reg = <0x5A 0x3C0 0x0000000A>;
+ assigned-address = <0x5A>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_1_3: spd@53,3C000000003 {
+ reg = <0x53 0x3C0 0x00000003>;
+ assigned-address = <0x53>;
+ };
+
+ nvdimm_1_3: nvm@5B,3C000000000B {
+ reg = <0x5B 0x3C0 0x0000000B>;
+ assigned-address = <0x5B>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_1_4: spd@54,3C000000004 {
+ reg = <0x54 0x3C0 0x00000004>;
+ assigned-address = <0x54>;
+ };
+
+ nvdimm_1_4: nvm@5C,3C000000000C {
+ reg = <0x5C 0x3C0 0x0000000C>;
+ assigned-address = <0x5C>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_1_5: spd@55,3C000000005 {
+ reg = <0x55 0x3C0 0x00000005>;
+ assigned-address = <0x55>;
+ };
+
+ nvdimm_1_5: nvm@5D,3C000000000D {
+ reg = <0x5D 0x3C0 0x0000000D>;
+ assigned-address = <0x5D>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_1_6: spd@56,3C000000006 {
+ reg = <0x56 0x3C0 0x00000006>;
+ assigned-address = <0x56>;
+ };
+
+ nvdimm_1_6: nvm@5E,3C000000000E {
+ reg = <0x5E 0x3C0 0x0000000E>;
+ assigned-address = <0x5E>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_1_7: spd@57,3C000000007 {
+ reg = <0x57 0x3C0 0x00000007>;
+ assigned-address = <0x57>;
+ };
+
+ nvdimm_1_7: nvm@5F,3C000000000F {
+ reg = <0x5F 0x3C0 0x0000000F>;
+ assigned-address = <0x5F>;
+ };
+};
+
+&i3c2 {
+ /* I3C_SPD_DDRABCD_CPU1_BMC */
+ status = "okay";
+ jdec-spd;
+
+ /* Renesas SPD5118 */
+ spd5118_2_0: spd@50,3C000000000 {
+ reg = <0x50 0x3C0 0x00000000>;
+ assigned-address = <0x50>;
+ };
+
+ nvdimm_2_0: nvm@58,3C0000000008 {
+ reg = <0x58 0x3C0 0x00000008>;
+ assigned-address = <0x58>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_2_1: spd@51,3C000000001 {
+ reg = <0x51 0x3C0 0x00000001>;
+ assigned-address = <0x51>;
+ };
+
+ nvdimm_2_1: nvm@59,3C0000000009 {
+ reg = <0x59 0x3C0 0x00000009>;
+ assigned-address = <0x59>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_2_2: spd@52,3C000000002 {
+ reg = <0x52 0x3C0 0x00000002>;
+ assigned-address = <0x52>;
+ };
+
+ nvdimm_2_2: nvm@5A,3C000000000A {
+ reg = <0x5A 0x3C0 0x0000000A>;
+ assigned-address = <0x5A>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_2_3: spd@53,3C000000003 {
+ reg = <0x53 0x3C0 0x00000003>;
+ assigned-address = <0x53>;
+ };
+
+ nvdimm_2_3: nvm@5B,3C000000000B {
+ reg = <0x5B 0x3C0 0x0000000B>;
+ assigned-address = <0x5B>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_2_4: spd@54,3C000000004 {
+ reg = <0x54 0x3C0 0x00000004>;
+ assigned-address = <0x54>;
+ };
+
+ nvdimm_2_4: nvm@5C,3C000000000C {
+ reg = <0x5C 0x3C0 0x0000000C>;
+ assigned-address = <0x5C>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_2_5: spd@55,3C000000005 {
+ reg = <0x55 0x3C0 0x00000005>;
+ assigned-address = <0x55>;
+ };
+
+ nvdimm_2_5: nvm@5D,3C000000000D {
+ reg = <0x5D 0x3C0 0x0000000D>;
+ assigned-address = <0x5D>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_2_6: spd@56,3C000000006 {
+ reg = <0x56 0x3C0 0x00000006>;
+ assigned-address = <0x56>;
+ };
+
+ nvdimm_2_6: nvm@5E,3C000000000E {
+ reg = <0x5E 0x3C0 0x0000000E>;
+ assigned-address = <0x5E>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_2_7: spd@57,3C000000007 {
+ reg = <0x57 0x3C0 0x00000007>;
+ assigned-address = <0x57>;
+ };
+
+ nvdimm_2_7: nvm@5F,3C000000000F {
+ reg = <0x5F 0x3C0 0x0000000F>;
+ assigned-address = <0x5F>;
+ };
+};
+
+&i3c3 {
+ /* I3C_SPD_DDREFGH_CPU1_BMC */
+ status = "okay";
+ jdec-spd;
+
+ /* Renesas SPD5118 */
+ spd5118_3_0: spd@50,3C000000000 {
+ reg = <0x50 0x3C0 0x00000000>;
+ assigned-address = <0x50>;
+ };
+
+ nvdimm_3_0: nvm@58,3C0000000008 {
+ reg = <0x58 0x3C0 0x00000008>;
+ assigned-address = <0x58>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_3_1: spd@51,3C000000001 {
+ reg = <0x51 0x3C0 0x00000001>;
+ assigned-address = <0x51>;
+ };
+
+ nvdimm_3_1: nvm@59,3C0000000009 {
+ reg = <0x59 0x3C0 0x00000009>;
+ assigned-address = <0x59>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_3_2: spd@52,3C000000002 {
+ reg = <0x52 0x3C0 0x00000002>;
+ assigned-address = <0x52>;
+ };
+
+ nvdimm_3_2: nvm@5A,3C000000000A {
+ reg = <0x5A 0x3C0 0x0000000A>;
+ assigned-address = <0x5A>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_3_3: spd@53,3C000000003 {
+ reg = <0x53 0x3C0 0x00000003>;
+ assigned-address = <0x53>;
+ };
+
+ nvdimm_3_3: nvm@5B,3C000000000B {
+ reg = <0x5B 0x3C0 0x0000000B>;
+ assigned-address = <0x5B>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_3_4: spd@54,3C000000004 {
+ reg = <0x54 0x3C0 0x00000004>;
+ assigned-address = <0x54>;
+ };
+
+ nvdimm_3_4: nvm@5C,3C000000000C {
+ reg = <0x5C 0x3C0 0x0000000C>;
+ assigned-address = <0x5C>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_3_5: spd@55,3C000000005 {
+ reg = <0x55 0x3C0 0x00000005>;
+ assigned-address = <0x55>;
+ };
+
+ nvdimm_3_5: nvm@5D,3C000000000D {
+ reg = <0x5D 0x3C0 0x0000000D>;
+ assigned-address = <0x5D>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_3_6: spd@56,3C000000006 {
+ reg = <0x56 0x3C0 0x00000006>;
+ assigned-address = <0x56>;
+ };
+
+ nvdimm_3_6: nvm@5E,3C000000000E {
+ reg = <0x5E 0x3C0 0x0000000E>;
+ assigned-address = <0x5E>;
+ };
+
+ /* Renesas SPD5118 */
+ spd5118_3_7: spd@57,3C000000007 {
+ reg = <0x57 0x3C0 0x00000007>;
+ assigned-address = <0x57>;
+ };
+
+ nvdimm_3_7: nvm@5F,3C000000000F {
+ reg = <0x5F 0x3C0 0x0000000F>;
+ assigned-address = <0x5F>;
+ };
+};
+
+&pcieh {
+ status = "okay";
+};
+
+&pwm_tacho {
+ status = "okay";
+ #pwm-cells = <3>;
+ aspeed,pwm-outputs = <7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_tach0_default
+ &pinctrl_pwm1_default &pinctrl_tach1_default
+ &pinctrl_pwm2_default &pinctrl_tach2_default
+ &pinctrl_pwm3_default &pinctrl_tach3_default
+ &pinctrl_pwm4_default &pinctrl_tach4_default
+ &pinctrl_pwm5_default &pinctrl_tach5_default
+ &pinctrl_pwm12g1_default &pinctrl_tach6_default
+ &pinctrl_pwm13g1_default &pinctrl_tach7_default
+ &pinctrl_pwm14g1_default &pinctrl_tach8_default
+ &pinctrl_pwm15g1_default &pinctrl_tach9_default
+ &pinctrl_pwm7_default>;
+
+ fan@0 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x00>;
+ };
+ fan@1 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x01>;
+ };
+ fan@2 {
+ reg = <0x02>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02>;
+ };
+ fan@3 {
+ reg = <0x03>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x03>;
+ };
+ fan@4 {
+ reg = <0x04>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x04>;
+ };
+ fan@5 {
+ reg = <0x05>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x05>;
+ };
+ fan@6 {
+ reg = <0x0c>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x06>;
+ };
+ fan@7 {
+ reg = <0x0d>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x07>;
+ };
+ fan@8 {
+ reg = <0x0e>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x08>;
+ };
+ fan@9 {
+ reg = <0x0f>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x09>;
+ };
+};
+
+&video {
+ status = "okay";
+ memory-region = <&video_engine_memory>;
+};
+
+&vhub {
+ status = "okay";
+};
+
+&jtag1 {
+ status = "okay";
+};
+
+&wdt2 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts b/arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts
index d5b7d28cda88..635571f8c0c3 100644
--- a/arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts
@@ -3,14 +3,20 @@
/dts-v1/;
#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/i2c/i2c.h>
/ {
- model = "S2600WF BMC";
+ model = "Intel S2600WF BMC";
compatible = "intel,s2600wf-bmc", "aspeed,ast2500";
+ aliases {
+ serial4 = &uart5;
+ };
+
chosen {
stdout-path = &uart5;
- bootargs = "earlycon";
+ bootargs = "console=ttyS4,115200 earlycon";
};
memory@80000000 {
@@ -26,6 +32,32 @@
no-map;
reg = <0x9f000000 0x01000000>; /* 16M */
};
+
+ gfx_memory: framebuffer {
+ size = <0x01000000>;
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+
+ video_engine_memory: jpegbuffer {
+ size = <0x02000000>; /* 32M */
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+
+ ramoops@9eff0000{
+ compatible = "ramoops";
+ reg = <0x9eff0000 0x10000>;
+ record-size = <0x2000>;
+ console-size = <0x2000>;
+ };
+ };
+
+ vga-shared-memory {
+ compatible = "aspeed,ast2500-vga-sharedmem";
+ reg = <0x9ff00000 0x100000>;
};
iio-hwmon {
@@ -36,6 +68,29 @@
<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
};
+ leds {
+ compatible = "gpio-leds";
+
+ identify {
+ default-state = "on";
+ gpios = <&gpio ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>;
+ };
+
+ status_amber {
+ default-state = "off";
+ gpios = <&gpio ASPEED_GPIO(S, 5) GPIO_ACTIVE_LOW>;
+ };
+
+ status_green {
+ default-state = "keep";
+ gpios = <&gpio ASPEED_GPIO(S, 4) GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ beeper {
+ compatible = "pwm-beeper";
+ pwms = <&timer 5 1000000 0>;
+ };
};
&fmc {
@@ -44,35 +99,204 @@
status = "okay";
m25p,fast-read;
label = "bmc";
-#include "openbmc-flash-layout.dtsi"
+#include "openbmc-flash-layout-intel-64MB.dtsi"
};
};
-&spi1 {
+&espi {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_spi1_default>;
+};
- flash@0 {
- status = "okay";
- m25p,fast-read;
- label = "pnor";
+&jtag {
+ status = "okay";
+};
+
+&peci0 {
+ status = "okay";
+ gpios = <&gpio ASPEED_GPIO(F, 6) 0>;
+};
+
+&syscon {
+ uart-clock-high-speed;
+ status = "okay";
+
+ misc_control {
+ compatible = "aspeed,bmc-misc";
+ uart_port_debug {
+ offset = <0x2c>;
+ bit-mask = <0x1>;
+ bit-shift = <10>;
+ read-only;
+ };
+ p2a-bridge {
+ offset = <0x180>;
+ bit-mask = <0x1>;
+ bit-shift = <1>;
+ read-only;
+ };
+ boot-2nd-flash {
+ offset = <0x70>;
+ bit-mask = <0x1>;
+ bit-shift = <17>;
+ read-only;
+ };
+ chip_id {
+ offset = <0x150>;
+ bit-mask = <0x0fffffff 0xffffffff>;
+ bit-shift = <0>;
+ read-only;
+ reg-width = <64>;
+ hash-data = "d44f9b804976fa23c2e25d62f16154d26520a7e24c5555095fd1b55c027804f1570dcd16189739c640cd7d9a6ce14944a2c4eaf1dc429eed6940e8a83498a474";
+ };
};
};
-&uart5 {
+&adc {
status = "okay";
};
-&mac0 {
+&gpio {
+ status = "okay";
+ /* Enable GPIOE0 and GPIOE2 pass-through by default */
+ pinctrl-names = "pass-through";
+ pinctrl-0 = <&pinctrl_gpie0_default
+ &pinctrl_gpie2_default>;
+ gpio-line-names =
+ /*A0-A7*/ "","","","","","","","",
+ /*B0-B7*/ "","","","","","","","",
+ /*C0-C7*/ "","","","","","","","",
+ /*D0-D7*/ "","","","","","","","",
+ /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","","","",
+ /*F0-F7*/ "NMI_OUT","","","","CPU_ERR0","CPU_ERR1","","",
+ /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","LCP_ENTER_BUTTON","LCP_LEFT_BUTTON","FM_BMC_BOARD_SKU_ID5_N","","",
+ /*H0-H7*/ "","","","FM_NODE_ID_1","FM_NODE_ID_2","FM_NODE_ID_3","FM_NODE_ID_4","FM_240VA_STATUS",
+ /*I0-I7*/ "FM_SYS_FAN0_PRSNT_D_N","FM_SYS_FAN1_PRSNT_D_N","FM_SYS_FAN2_PRSNT_D_N","FM_SYS_FAN3_PRSNT_D_N","FM_SYS_FAN4_PRSNT_D_N","FM_SYS_FAN5_PRSNT_D_N","","",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","","",
+ /*M0-M7*/ "","","","","","","","",
+ /*N0-N7*/ "","","","","","","","",
+ /*O0-O7*/ "","","","","","","","",
+ /*P0-P7*/ "","","","","","","","",
+ /*Q0-Q7*/ "","","","","","","","PWR_DEBUG_N",
+ /*R0-R7*/ "","XDP_PRST_N","","","","","","CHASSIS_INTRUSION",
+ /*S0-S7*/ "REMOTE_DEBUG_ENABLE","SYSPWROK","RSMRST_N","","","","","",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","","","","","","",
+ /*V0-V7*/ "","","","","","","","",
+ /*W0-W7*/ "","","","","","","","",
+ /*X0-X7*/ "","","","","","","","",
+ /*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","",
+ /*Z0-Z7*/ "","SIO_POWER_GOOD","","","","","","",
+ /*AA0-AA7*/ "P3VBAT_BRIDGE_EN","","","","PREQ_N","TCK_MUX_SEL","SMI","POST_COMPLETE",
+ /*AB0-AB7*/ "","NMI_BUTTON","ID_BUTTON","PS_PWROK","","","","",
+ /*AC0-AC7*/ "","","","","","","","";
+};
+
+&sgpio {
status = "okay";
+ gpio-line-names =
+ /* SGPIO output lines */
+ /*OA0-OA7*/ "","","","","","","","",
+ /*OB0-OB7*/ "LED_CPU1_CH1_DIMM1_FAULT","LED_CPU1_CH1_DIMM2_FAULT","LED_CPU1_CH2_DIMM1_FAULT","LED_CPU1_CH2_DIMM2_FAULT","LED_CPU1_CH3_DIMM1_FAULT","LED_CPU1_CH3_DIMM2_FAULT","LED_CPU1_CH4_DIMM1_FAULT","LED_CPU1_CH4_DIMM2_FAULT",
+ /*OC0-OC7*/ "LED_CPU1_CH5_DIMM1_FAULT","LED_CPU1_CH5_DIMM2_FAULT","LED_CPU1_CH6_DIMM1_FAULT","LED_CPU1_CH6_DIMM2_FAULT","LED_FAN1_FAULT","LED_FAN2_FAULT","LED_FAN3_FAULT","LED_FAN4_FAULT",
+ /*OD0-OD7*/ "LED_FAN5_FAULT","LED_FAN6_FAULT","LED_FAN7_FAULT","LED_FAN8_FAULT","LED_CPU2_CH1_DIMM1_FAULT","LED_CPU1_CH1_DIMM2_FAULT","LED_CPU2_CH2_DIMM1_FAULT","LED_CPU2_CH2_DIMM2_FAULT",
+ /*OE0-OE7*/ "LED_CPU2_CH3_DIMM1_FAULT","LED_CPU2_CH3_DIMM2_FAULT","LED_CPU2_CH4_DIMM1_FAULT","LED_CPU2_CH4_DIMM2_FAULT","LED_CPU2_CH5_DIMM1_FAULT","LED_CPU2_CH5_DIMM2_FAULT","LED_CPU2_CH6_DIMM1_FAULT","LED_CPU2_CH6_DIMM2_FAULT",
+ /*OF0-OF7*/ "LED_CPU3_CH1_DIMM1_FAULT","LED_CPU3_CH1_DIMM2_FAULT","LED_CPU3_CH2_DIMM1_FAULT","LED_CPU3_CH2_DIMM2_FAULT","LED_CPU3_CH3_DIMM1_FAULT","LED_CPU3_CH3_DIMM2_FAULT","LED_CPU3_CH4_DIMM1_FAULT","LED_CPU3_CH4_DIMM2_FAULT",
+ /*OG0-OG7*/ "LED_CPU3_CH5_DIMM1_FAULT","LED_CPU3_CH5_DIMM2_FAULT","LED_CPU3_CH6_DIMM1_FAULT","LED_CPU3_CH6_DIMM2_FAULT","LED_CPU4_CH1_DIMM1_FAULT","LED_CPU4_CH1_DIMM2_FAULT","LED_CPU4_CH2_DIMM1_FAULT","LED_CPU4_CH2_DIMM2_FAULT",
+ /*OH0-OH7*/ "LED_CPU4_CH3_DIMM1_FAULT","LED_CPU4_CH3_DIMM2_FAULT","LED_CPU4_CH4_DIMM1_FAULT","LED_CPU4_CH4_DIMM2_FAULT","LED_CPU4_CH5_DIMM1_FAULT","LED_CPU4_CH5_DIMM2_FAULT","LED_CPU4_CH6_DIMM1_FAULT","LED_CPU4_CH6_DIMM2_FAULT",
+ /*OI0-OI7*/ "","","","","","","","",
+ /*OJ0-OJ7*/ "","","","","","","","",
+ /*DUMMY*/ "","","","","","","","",
+ /*DUMMY*/ "","","","","","","","",
+ /* SGPIO input lines */
+ /*IA0-IA7*/ "CPU1_PRESENCE","CPU1_THERMTRIP","CPU1_VRHOT","CPU1_FIVR_FAULT","CPU1_MEM_ABCD_VRHOT","CPU1_MEM_EFGH_VRHOT","","",
+ /*IB0-IB7*/ "CPU1_MISMATCH","CPU1_MEM_THERM_EVENT","CPU2_PRESENCE","CPU2_THERMTRIP","CPU2_VRHOT","CPU2_FIVR_FAULT","CPU2_MEM_ABCD_VRHOT","CPU2_MEM_EFGH_VRHOT",
+ /*IC0-IC7*/ "","","CPU2_MISMATCH","CPU2_MEM_THERM_EVENT","","","","",
+ /*ID0-ID7*/ "","","","","","","","",
+ /*IE0-IE7*/ "","","","","","","","",
+ /*IF0-IF7*/ "SGPIO_PLD_MINOR_REV_BIT0","SGPIO_PLD_MINOR_REV_BIT1","SGPIO_PLD_MINOR_REV_BIT2","SGPIO_PLD_MINOR_REV_BIT3","SGPIO_PLD_MAJOR_REV_BIT0","SGPIO_PLD_MAJOR_REV_BIT1","SGPIO_PLD_MAJOR_REV_BIT2","SGPIO_PLD_MAJOR_REV_BIT3",
+ /*IG0-IG7*/ "MAIN_PLD_MINOR_REV_BIT0","MAIN_PLD_MINOR_REV_BIT1","MAIN_PLD_MINOR_REV_BIT2","MAIN_PLD_MINOR_REV_BIT3","MAIN_PLD_MAJOR_REV_BIT0","MAIN_PLD_MAJOR_REV_BIT1","MAIN_PLD_MAJOR_REV_BIT2","MAIN_PLD_MAJOR_REV_BIT3",
+ /*IH0-IH7*/ "","","","","","","","",
+ /*II0-II7*/ "","","","","","","","",
+ /*IJ0-IJ7*/ "","","","","","","","";
+};
+
+&kcs3 {
+ kcs_addr = <0xCA2>;
+ status = "okay";
+};
+
+&kcs4 {
+ kcs_addr = <0xCA4>;
+ status = "okay";
+};
+
+&sio_regs {
+ status = "okay";
+ sio_status {
+ offset = <0x10C>;
+ bit-mask = <0x1F>;
+ bit-shift = <4>;
+ };
+};
+
+&lpc_sio {
+ status = "okay";
+};
+
+&lpc_snoop {
+ snoop-ports = <0x80>;
+ status = "okay";
+};
+
+&mbox {
+ status = "okay";
+};
+
+&uart_routing {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_rmii1_default>;
- clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
- <&syscon ASPEED_CLK_MAC1RCLK>;
- clock-names = "MACCLK", "RCLK";
- use-ncsi;
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default
+ &pinctrl_nrts1_default
+ &pinctrl_ndtr1_default
+ &pinctrl_ndsr1_default
+ &pinctrl_ncts1_default
+ &pinctrl_ndcd1_default
+ &pinctrl_nri1_default>;
+};
+
+&uart2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd2_default
+ &pinctrl_rxd2_default
+ &pinctrl_nrts2_default
+ &pinctrl_ndtr2_default
+ &pinctrl_ndsr2_default
+ &pinctrl_ncts2_default
+ &pinctrl_ndcd2_default
+ &pinctrl_nri2_default>;
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&uart4 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart5 {
+ status = "okay";
};
&mac1 {
@@ -82,44 +306,87 @@
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
+&mac0 {
+ status = "okay";
+ use-ncsi;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii1_default>;
+};
+
+&i2c0 {
+ multi-master;
+ general-call;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
+ status = "okay";
+};
+
&i2c1 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
status = "okay";
};
&i2c2 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
status = "okay";
};
&i2c3 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
status = "okay";
};
&i2c4 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
status = "okay";
};
&i2c5 {
+ bus-frequency = <1000000>;
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
status = "okay";
};
&i2c6 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
status = "okay";
};
&i2c7 {
+ multi-master;
+ #retries = <3>;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
status = "okay";
};
&i2c13 {
+ multi-master;
+ aspeed,dma-buf-size = <4095>;
+ aspeed,hw-timeout-ms = <300>;
status = "okay";
};
&gfx {
status = "okay";
+ memory-region = <&gfx_memory>;
};
-&pinctrl {
- aspeed,external-nodes = <&gfx &lhc>;
+&vuart {
+ status = "okay";
};
&pwm_tacho {
@@ -129,4 +396,61 @@
&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default &pinctrl_pwm5_default
&pinctrl_pwm6_default &pinctrl_pwm7_default>;
+
+ fan@0 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
+ };
+ fan@1 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
+ };
+ fan@2 {
+ reg = <0x02>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
+ };
+ fan@3 {
+ reg = <0x03>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
+ };
+ fan@4 {
+ reg = <0x04>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
+ };
+ fan@5 {
+ reg = <0x05>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0A 0x0B>;
+ };
+ fan@6 {
+ reg = <0x06>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0C 0x0D>;
+ };
+ fan@7 {
+ reg = <0x07>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0E 0x0F>;
+ };
+
+};
+
+&timer {
+/*
+ * Available settings:
+ * fttmr010,pwm-outputs = <5>, <6>, <7>, <8>;
+ * pinctrl-0 = <&pinctrl_timer5_default &pinctrl_timer6_default
+ * &pinctrl_timer7_default &pinctrl_timer8_default>;
+ */
+ fttmr010,pwm-outputs = <6>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_timer6_default>;
+ #pwm-cells = <3>;
+ status = "okay";
+};
+
+&video {
+ status = "okay";
+ memory-region = <&video_engine_memory>;
+};
+
+&vhub {
+ status = "okay";
};
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index f14dace34c5a..bf488f61e475 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -120,14 +120,6 @@
reg = <0x1e6c2000 0x80>;
};
- mac0: ethernet@1e660000 {
- compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
- reg = <0x1e660000 0x180>;
- interrupts = <2>;
- clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
- status = "disabled";
- };
-
mac1: ethernet@1e680000 {
compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
reg = <0x1e680000 0x180>;
@@ -136,6 +128,14 @@
status = "disabled";
};
+ mac0: ethernet@1e660000 {
+ compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
+ reg = <0x1e660000 0x180>;
+ interrupts = <2>;
+ clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
+ status = "disabled";
+ };
+
ehci0: usb@1e6a1000 {
compatible = "aspeed,ast2400-ehci", "generic-ehci";
reg = <0x1e6a1000 0x100>;
@@ -390,6 +390,33 @@
reg = <0x9c 0x4>;
status = "disabled";
};
+
+ sio_regs: regs {
+ compatible = "aspeed,bmc-misc";
+ };
+
+ lpc_sio: lpc-sio@180 {
+ compatible = "aspeed,ast2400-lpc-sio";
+ reg = <0x180 0x20>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ status = "disabled";
+ };
+
+ mbox: mbox@200 {
+ compatible = "aspeed,ast2400-mbox";
+ reg = <0x200 0x5c>;
+ interrupts = <46>;
+ #mbox-cells = <1>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ status = "disabled";
+ };
+ };
+
+ peci: bus@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
};
uart2: serial@1e78d000 {
@@ -435,13 +462,40 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2400-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <24000000>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
- i2c_ic: interrupt-controller@0 {
- #interrupt-cells = <1>;
- compatible = "aspeed,ast2400-i2c-ic";
+ i2c_gr: i2c-global-regs@0 {
+ compatible = "aspeed,ast2400-i2c-gr", "syscon";
reg = <0x0 0x40>;
- interrupts = <12>;
- interrupt-controller;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x40>;
+
+ i2c_ic: interrupt-controller@0 {
+ #interrupt-cells = <1>;
+ compatible = "aspeed,ast2400-i2c-ic";
+ reg = <0x0 0x4>;
+ interrupts = <12>;
+ interrupt-controller;
+ };
};
i2c0: i2c-bus@40 {
@@ -449,7 +503,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x40 0x40>;
+ reg = <0x40 0x40>, <0x800 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -465,7 +519,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x80 0x40>;
+ reg = <0x80 0x40>, <0x880 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -481,7 +535,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0xc0 0x40>;
+ reg = <0xc0 0x40>, <0x900 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -498,7 +552,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x100 0x40>;
+ reg = <0x100 0x40>, <0x980 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -515,7 +569,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x140 0x40>;
+ reg = <0x140 0x40>, <0xa00 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -532,7 +586,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x180 0x40>;
+ reg = <0x180 0x40>, <0xa80 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -549,7 +603,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x1c0 0x40>;
+ reg = <0x1c0 0x40>, <0xb00 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -566,7 +620,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x300 0x40>;
+ reg = <0x300 0x40>, <0xb80 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -583,7 +637,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x340 0x40>;
+ reg = <0x340 0x40>, <0xc00 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -600,7 +654,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x380 0x40>;
+ reg = <0x380 0x40>, <0xc80 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -617,7 +671,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x3c0 0x40>;
+ reg = <0x3c0 0x40>, <0xd00 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -634,7 +688,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x400 0x40>;
+ reg = <0x400 0x40>, <0xd80 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -651,7 +705,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x440 0x40>;
+ reg = <0x440 0x40>, <0xe00 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -668,7 +722,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x480 0x40>;
+ reg = <0x480 0x40>, <0xe80 0x80>;
compatible = "aspeed,ast2400-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 7495f93c5069..581e7ad9c615 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -128,7 +128,7 @@
};
vic: interrupt-controller@1e6c0080 {
- compatible = "aspeed,ast2400-vic";
+ compatible = "aspeed,ast2500-vic";
interrupt-controller;
#interrupt-cells = <1>;
valid-sources = <0xfefff7ff 0x0807ffff>;
@@ -142,14 +142,6 @@
reg = <0x1e6c2000 0x80>;
};
- mac0: ethernet@1e660000 {
- compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
- reg = <0x1e660000 0x180>;
- interrupts = <2>;
- clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
- status = "disabled";
- };
-
mac1: ethernet@1e680000 {
compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
reg = <0x1e680000 0x180>;
@@ -158,6 +150,14 @@
status = "disabled";
};
+ mac0: ethernet@1e660000 {
+ compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
+ reg = <0x1e660000 0x180>;
+ interrupts = <2>;
+ clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
+ status = "disabled";
+ };
+
ehci0: usb@1e6a1000 {
compatible = "aspeed,ast2500-ehci", "generic-ehci";
reg = <0x1e6a1000 0x100>;
@@ -342,6 +342,7 @@
clocks = <&syscon ASPEED_CLK_APB>;
interrupt-controller;
#interrupt-cells = <2>;
+ status = "disabled";
};
sgpio: sgpio@1e780200 {
@@ -366,7 +367,7 @@
timer: timer@1e782000 {
/* This timer is a Faraday FTTMR010 derivative */
- compatible = "aspeed,ast2400-timer";
+ compatible = "aspeed,ast2500-timer";
reg = <0x1e782000 0x90>;
interrupts = <16 17 18 35 36 37 38 39>;
clocks = <&syscon ASPEED_CLK_APB>;
@@ -433,6 +434,25 @@
status = "disabled";
};
+ espi: espi@1e6ee000 {
+ compatible = "aspeed,ast2500-espi-slave";
+ reg = <0x1e6ee000 0x100>;
+ interrupts = <23>;
+ status = "disabled";
+ clocks = <&syscon ASPEED_CLK_GATE_ESPICLK>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_espi_default>;
+ };
+
+ jtag: jtag@1e6e4000 {
+ compatible = "aspeed,ast2500-jtag";
+ reg = <0x1e6e4000 0x1c>;
+ clocks = <&syscon ASPEED_CLK_APB>;
+ resets = <&syscon ASPEED_RESET_JTAG_MASTER>;
+ interrupts = <43>;
+ status = "disabled";
+ };
+
lpc: lpc@1e789000 {
compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
reg = <0x1e789000 0x1000>;
@@ -514,6 +534,33 @@
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
+
+ sio_regs: regs {
+ compatible = "aspeed,bmc-misc";
+ };
+
+ lpc_sio: lpc-sio@180 {
+ compatible = "aspeed,ast2500-lpc-sio";
+ reg = <0x180 0x20>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ status = "disabled";
+ };
+
+ mbox: mbox@200 {
+ compatible = "aspeed,ast2500-mbox";
+ reg = <0x200 0x5c>;
+ interrupts = <46>;
+ #mbox-cells = <1>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ status = "disabled";
+ };
+ };
+
+ peci: bus@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
};
uart2: serial@1e78d000 {
@@ -559,13 +606,40 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <24000000>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
- i2c_ic: interrupt-controller@0 {
- #interrupt-cells = <1>;
- compatible = "aspeed,ast2500-i2c-ic";
+ i2c_gr: i2c-global-regs@0 {
+ compatible = "aspeed,ast2500-i2c-gr", "syscon";
reg = <0x0 0x40>;
- interrupts = <12>;
- interrupt-controller;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x40>;
+
+ i2c_ic: interrupt-controller@0 {
+ #interrupt-cells = <1>;
+ compatible = "aspeed,ast2500-i2c-ic";
+ reg = <0x0 0x4>;
+ interrupts = <12>;
+ interrupt-controller;
+ };
};
i2c0: i2c-bus@40 {
@@ -573,7 +647,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x40 0x40>;
+ reg = <0x40 0x40>, <0x200 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -589,7 +663,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x80 0x40>;
+ reg = <0x80 0x40>, <0x210 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -605,7 +679,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0xc0 0x40>;
+ reg = <0xc0 0x40>, <0x220 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -622,7 +696,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x100 0x40>;
+ reg = <0x100 0x40>, <0x230 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -639,7 +713,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x140 0x40>;
+ reg = <0x140 0x40>, <0x240 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -656,7 +730,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x180 0x40>;
+ reg = <0x180 0x40>, <0x250 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -673,7 +747,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x1c0 0x40>;
+ reg = <0x1c0 0x40>, <0x260 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -690,7 +764,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x300 0x40>;
+ reg = <0x300 0x40>, <0x270 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -707,7 +781,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x340 0x40>;
+ reg = <0x340 0x40>, <0x280 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -724,7 +798,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x380 0x40>;
+ reg = <0x380 0x40>, <0x290 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -741,7 +815,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x3c0 0x40>;
+ reg = <0x3c0 0x40>, <0x2a0 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -758,7 +832,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x400 0x40>;
+ reg = <0x400 0x40>, <0x2b0 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -775,7 +849,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x440 0x40>;
+ reg = <0x440 0x40>, <0x2c0 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -792,7 +866,7 @@
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x480 0x40>;
+ reg = <0x480 0x40>, <0x2d0 0x10>;
compatible = "aspeed,ast2500-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_I2C>;
diff --git a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
index 7cd4f075e325..289668f051eb 100644
--- a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
@@ -297,6 +297,16 @@
groups = "I2C9";
};
+ pinctrl_i3c1_default: i3c1_default {
+ function = "I3C1";
+ groups = "I3C1";
+ };
+
+ pinctrl_i3c2_default: i3c2_default {
+ function = "I3C2";
+ groups = "I3C2";
+ };
+
pinctrl_i3c3_default: i3c3_default {
function = "I3C3";
groups = "I3C3";
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 4540958912aa..6e7658b97e5b 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -4,6 +4,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
#include <dt-bindings/clock/ast2600-clock.h>
+#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Aspeed BMC";
@@ -29,6 +30,12 @@
i2c13 = &i2c13;
i2c14 = &i2c14;
i2c15 = &i2c15;
+ i3c0 = &i3c0;
+ i3c1 = &i3c1;
+ i3c2 = &i3c2;
+ i3c3 = &i3c3;
+ i3c4 = &i3c4;
+ i3c5 = &i3c5;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
@@ -318,6 +325,16 @@
#size-cells = <1>;
ranges;
+ pwm_tacho: pwm-tacho-controller@1e610000 {
+ compatible = "aspeed,ast2600-pwm-tacho";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1e610000 0x100>;
+ clocks = <&syscon ASPEED_CLK_AHB>;
+ resets = <&syscon ASPEED_RESET_PWM>;
+ status = "disabled";
+ };
+
syscon: syscon@1e6e2000 {
compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
reg = <0x1e6e2000 0x1000>;
@@ -389,6 +406,41 @@
status = "disabled";
};
+ jtag0: jtag@1e6e4000 {
+ compatible = "aspeed,ast2600-jtag";
+ reg = <0x1e6e4000 0x40>;
+ clocks = <&syscon ASPEED_CLK_APB1>;
+ resets = <&syscon ASPEED_RESET_JTAG_MASTER>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ jtag1: jtag@1e6e4100 {
+ compatible = "aspeed,ast2600-jtag";
+ reg = <0x1e6e4100 0x40>;
+ clocks = <&syscon ASPEED_CLK_APB1>;
+ resets = <&syscon ASPEED_RESET_JTAG_MASTER2>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_jtagm_default>;
+ status = "disabled";
+ };
+
+ pcieh: pcieh@1e6ed000 {
+ compatible = "aspeed,ast2600-pcieh", "syscon";
+ reg = <0x1e6ed000 0x100>;
+ };
+
+ mctp: mctp@1e6e8000 {
+ compatible = "aspeed,ast2600-mctp";
+ reg = <0x1e6e8000 0x1000>;
+ interrupts-extended = <&gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
+ resets = <&syscon ASPEED_RESET_DEV_MCTP>;
+ aspeed,pcieh = <&pcieh>;
+ status = "disabled";
+ };
+
adc0: adc@1e6e9000 {
compatible = "aspeed,ast2600-adc0";
reg = <0x1e6e9000 0x100>;
@@ -418,7 +470,7 @@
#gpio-cells = <2>;
gpio-controller;
compatible = "aspeed,ast2600-gpio";
- reg = <0x1e780000 0x400>;
+ reg = <0x1e780000 0x200>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 0 208>;
ngpios = <208>;
@@ -459,7 +511,7 @@
#gpio-cells = <2>;
gpio-controller;
compatible = "aspeed,ast2600-gpio";
- reg = <0x1e780800 0x800>;
+ reg = <0x1e780800 0x200>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 208 36>;
ngpios = <36>;
@@ -537,6 +589,20 @@
status = "disabled";
};
+ peci: bus@1e78b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x100>;
+ };
+
+ i3c: bus@1e7a0000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x1e7a0000 0x8000>;
+ };
+
lpc: lpc@1e789000 {
compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon";
reg = <0x1e789000 0x1000>;
@@ -618,6 +684,25 @@
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
+
+ sio_regs: regs {
+ compatible = "aspeed,bmc-misc";
+ };
+
+ lpc_sio: lpc-sio@180 {
+ compatible = "aspeed,ast2500-lpc-sio";
+ reg = <0x180 0x20>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ status = "disabled";
+ };
+
+ mbox: mbox@200 {
+ compatible = "aspeed,ast2600-mbox";
+ reg = <0x200 0xc0>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <1>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ };
};
sdc: sdc@1e740000 {
@@ -730,6 +815,19 @@
status = "disabled";
};
+ espi: espi@1e6ee000 {
+ compatible = "aspeed,ast2600-espi-slave";
+ reg = <0x1e6ee000 0x200>;
+ interrupts-extended = <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <&gpio0 ASPEED_GPIO(W, 7) IRQ_TYPE_EDGE_FALLING>;
+ status = "disabled";
+ clocks = <&syscon ASPEED_CLK_GATE_ESPICLK>;
+ resets = <&syscon ASPEED_RESET_ESPI>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_espi_default>,
+ <&pinctrl_espialt_default>;
+ };
+
i2c: bus@1e78a000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -762,12 +860,30 @@
#include "aspeed-g6-pinctrl.dtsi"
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2600-peci";
+ reg = <0x0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>;
+ resets = <&syscon ASPEED_RESET_PECI>;
+ clock-frequency = <24000000>;
+ msg-timing = <1>;
+ addr-timing = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
i2c0: i2c-bus@80 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x80 0x80>;
+ reg = <0x80 0x80>, <0xc00 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -782,7 +898,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x100 0x80>;
+ reg = <0x100 0x80>, <0xc20 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -797,7 +913,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x180 0x80>;
+ reg = <0x180 0x80>, <0xc40 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -812,7 +928,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x200 0x80>;
+ reg = <0x200 0x80>, <0xc60 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -827,7 +943,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x280 0x80>;
+ reg = <0x280 0x80>, <0xc80 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -842,7 +958,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x300 0x80>;
+ reg = <0x300 0x80>, <0xca0 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -857,7 +973,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x380 0x80>;
+ reg = <0x380 0x80>, <0xcc0 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -872,7 +988,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x400 0x80>;
+ reg = <0x400 0x80>, <0xce0 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -887,7 +1003,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x480 0x80>;
+ reg = <0x480 0x80>, <0xd00 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -902,7 +1018,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x500 0x80>;
+ reg = <0x500 0x80>, <0xd20 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -917,7 +1033,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x580 0x80>;
+ reg = <0x580 0x80>, <0xd40 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -932,7 +1048,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x600 0x80>;
+ reg = <0x600 0x80>, <0xd60 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -947,7 +1063,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x680 0x80>;
+ reg = <0x680 0x80>, <0xd80 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -962,7 +1078,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x700 0x80>;
+ reg = <0x700 0x80>, <0xda0 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -977,7 +1093,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x780 0x80>;
+ reg = <0x780 0x80>, <0xdc0 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -992,7 +1108,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
- reg = <0x800 0x80>;
+ reg = <0x800 0x80>, <0xde0 0x20>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
@@ -1003,3 +1119,101 @@
status = "disabled";
};
};
+
+&i3c {
+ i3c0: i3c0@2000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x2000 0x1000>;
+ compatible = "snps,dw-i3c-master-1.00a";
+ clocks = <&syscon ASPEED_CLK_GATE_I3C0CLK>;
+ resets = <&syscon ASPEED_RESET_I3C0>;
+ i2c-scl-hz = <400000>;
+ i3c-scl-hz = <12500000>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i3c1_default>;
+ status = "disabled";
+ };
+
+ i3c1: i3c1@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x3000 0x1000>;
+ compatible = "snps,dw-i3c-master-1.00a";
+ clocks = <&syscon ASPEED_CLK_GATE_I3C1CLK>;
+ resets = <&syscon ASPEED_RESET_I3C1>;
+ i2c-scl-hz = <400000>;
+ i3c-scl-hz = <12500000>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i3c2_default>;
+ status = "disabled";
+ };
+
+ i3c2: i3c2@4000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x4000 0x1000>;
+ compatible = "snps,dw-i3c-master-1.00a";
+ clocks = <&syscon ASPEED_CLK_GATE_I3C2CLK>;
+ resets = <&syscon ASPEED_RESET_I3C2>;
+ i2c-scl-hz = <400000>;
+ i3c-scl-hz = <12500000>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i3c3_default>;
+ status = "disabled";
+ };
+
+ i3c3: i3c3@5000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x5000 0x1000>;
+ compatible = "snps,dw-i3c-master-1.00a";
+ clocks = <&syscon ASPEED_CLK_GATE_I3C3CLK>;
+ resets = <&syscon ASPEED_RESET_I3C3>;
+ i2c-scl-hz = <400000>;
+ i3c-scl-hz = <12500000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i3c4_default>;
+ status = "disabled";
+ };
+
+ i3c4: i3c4@6000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x6000 0x1000>;
+ compatible = "snps,dw-i3c-master-1.00a";
+ clocks = <&syscon ASPEED_CLK_GATE_I3C4CLK>;
+ resets = <&syscon ASPEED_RESET_I3C4>;
+ i2c-scl-hz = <400000>;
+ i3c-scl-hz = <12500000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i3c5_default>;
+ status = "disabled";
+ };
+
+ i3c5: i3c5@7000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x7000 0x1000>;
+ compatible = "snps,dw-i3c-master-1.00a";
+ clocks = <&syscon ASPEED_CLK_GATE_I3C5CLK>;
+ resets = <&syscon ASPEED_RESET_I3C5>;
+ i2c-scl-hz = <400000>;
+ i3c-scl-hz = <12500000>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i3c6_default>;
+ status = "disabled";
+ };
+};
diff --git a/arch/arm/boot/dts/openbmc-flash-layout-intel-128MB.dtsi b/arch/arm/boot/dts/openbmc-flash-layout-intel-128MB.dtsi
new file mode 100644
index 000000000000..ca148cf9a364
--- /dev/null
+++ b/arch/arm/boot/dts/openbmc-flash-layout-intel-128MB.dtsi
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0+
+// 128MB flash layout: PFR (active + tmp1/tmp2 + extra)
+// image with common RW partition
+
+partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ u-boot@0 {
+ reg = <0x0 0x80000>;
+ label = "u-boot";
+ };
+
+ pfm@80000 {
+ reg = <0x80000 0x20000>;
+ label = "pfm";
+ };
+
+ u-boot-env@a0000 {
+ reg = <0xa0000 0x20000>;
+ label = "u-boot-env";
+ };
+
+ sofs@c0000 {
+ reg = <0xc0000 0x200000>;
+ label = "sofs";
+ };
+
+ rwfs@2c0000 {
+ reg = <0x2c0000 0x840000>;
+ label = "rwfs";
+ };
+
+ fit-image-a@b00000 {
+ reg = <0xb00000 0x1f00000>;
+ label = "image-a";
+ };
+
+ rc-image@2a00000 {
+ reg = <0x2a00000 0x2000000>;
+ label = "rc-image";
+ };
+
+ image-staging@4a00000 {
+ reg = <0x4a00000 0x3400000>;
+ label = "image-stg";
+ };
+
+ afm-active@7e00000 {
+ reg = <0x7e00000 0x20000>;
+ label = "afm-active";
+ };
+
+ afm-recovery@7e20000 {
+ reg = <0x7e20000 0x20000>;
+ label = "afm-rcvr";
+ };
+
+ reserved@7e40000 {
+ reg = <0x7e40000 0xc0000>;
+ label = "rsvrd";
+ };
+
+ cpld-gold@7f00000 {
+ reg = <0x7f00000 0x100000>;
+ label = "cpld-gold";
+ };
+};
diff --git a/arch/arm/boot/dts/openbmc-flash-layout-intel-64MB.dtsi b/arch/arm/boot/dts/openbmc-flash-layout-intel-64MB.dtsi
new file mode 100644
index 000000000000..092708f5021f
--- /dev/null
+++ b/arch/arm/boot/dts/openbmc-flash-layout-intel-64MB.dtsi
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0+
+// 64MB flash layout: redundant image with common RW partition
+
+partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ u-boot@0 {
+ reg = <0x0 0x80000>;
+ label = "u-boot";
+ };
+
+ fit-image-a@80000 {
+ reg = <0x80000 0x1b80000>;
+ label = "image-a";
+ };
+
+ sofs@1c00000 {
+ reg = <0x1c00000 0x200000>;
+ label = "sofs";
+ };
+
+ rwfs@1e00000 {
+ reg = <0x1e00000 0x600000>;
+ label = "rwfs";
+ };
+
+ u-boot-env@2400000 {
+ reg = <0x2400000 0x20000>;
+ label = "u-boot-env";
+ };
+
+ fit-image-b@2480000 {
+ reg = <0x2480000 0x1b80000>;
+ label = "image-b";
+ };
+};
diff --git a/arch/arm/configs/intel_bmc_defconfig b/arch/arm/configs/intel_bmc_defconfig
new file mode 100644
index 000000000000..3e9f2915e6f3
--- /dev/null
+++ b/arch/arm/configs/intel_bmc_defconfig
@@ -0,0 +1,314 @@
+CONFIG_KERNEL_XZ=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PSI=y
+CONFIG_PSI_DEFAULT_DISABLED=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=21
+CONFIG_CGROUPS=y
+CONFIG_NAMESPACES=y
+CONFIG_USER_NS=y
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZO is not set
+# CONFIG_RD_LZ4 is not set
+# CONFIG_UID16 is not set
+# CONFIG_SYSFS_SYSCALL is not set
+# CONFIG_AIO is not set
+CONFIG_EMBEDDED=y
+CONFIG_PERF_EVENTS=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB_FREELIST_RANDOM=y
+CONFIG_SLAB_FREELIST_HARDENED=y
+CONFIG_ARCH_ASPEED=y
+CONFIG_MACH_ASPEED_G6=y
+# CONFIG_CACHE_L2X0 is not set
+CONFIG_SMP=y
+# CONFIG_ARM_CPU_TOPOLOGY is not set
+CONFIG_VMSPLIT_2G=y
+CONFIG_NR_CPUS=2
+CONFIG_ARM_PSCI=y
+CONFIG_UACCESS_WITH_MEMCPY=y
+# CONFIG_ATAGS is not set
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_KERNEL_MODE_NEON=y
+# CONFIG_SUSPEND is not set
+CONFIG_JUMP_LABEL=y
+# CONFIG_MQ_IOSCHED_DEADLINE is not set
+# CONFIG_MQ_IOSCHED_KYBER is not set
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_COMPACTION is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_PACKET_DIAG=y
+CONFIG_UNIX=y
+CONFIG_UNIX_DIAG=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+# CONFIG_IPV6_SIT is not set
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_ADVANCED is not set
+CONFIG_VLAN_8021Q=y
+CONFIG_NET_NCSI=y
+# CONFIG_WIRELESS is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FIRMWARE_MEMMAP=y
+CONFIG_MTD=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_PARTITIONED_MASTER=y
+CONFIG_MTD_SPI_NOR=y
+# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
+CONFIG_SPI_ASPEED_SMC=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_NBD=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=49152
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_VERITY=y
+CONFIG_NETDEVICES=y
+CONFIG_NETCONSOLE=y
+# CONFIG_NET_VENDOR_ALACRITECH is not set
+# CONFIG_NET_VENDOR_AMAZON is not set
+# CONFIG_NET_VENDOR_AQUANTIA is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CADENCE is not set
+# CONFIG_NET_VENDOR_CAVIUM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_CORTINA is not set
+# CONFIG_NET_VENDOR_EZCHIP is not set
+CONFIG_FTGMAC100=y
+# CONFIG_NET_VENDOR_HISILICON is not set
+# CONFIG_NET_VENDOR_HUAWEI is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MELLANOX is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_MICROSEMI is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_NETRONOME is not set
+# CONFIG_NET_VENDOR_NI is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_RENESAS is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SOLARFLARE is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_SOCIONEXT is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_SYNOPSYS is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_BROADCOM_PHY=y
+CONFIG_REALTEK_PHY=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_GPIO_POLLED=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_PWM_BEEPER=y
+CONFIG_INPUT_IBM_PANEL=y
+CONFIG_SERIO_RAW=y
+# CONFIG_VT is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_ASPEED_VUART=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_ASPEED_KCS_IPMI_BMC=y
+CONFIG_IPMI_KCS_BMC_CDEV_IPMI=y
+CONFIG_IPMI_KCS_BMC_SERIO=y
+CONFIG_IPMI_KCS_BMC_CDEV_RAW=y
+CONFIG_IPMB_DEVICE_INTERFACE=y
+CONFIG_HW_RANDOM_TIMERIOMEM=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX_GPIO=y
+CONFIG_I2C_MUX_PCA9541=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_ASPEED=y
+CONFIG_I2C_SLAVE=y
+CONFIG_I2C_SLAVE_MQUEUE_MESSAGE_SIZE=256
+CONFIG_I2C_SLAVE_MQUEUE=y
+CONFIG_I3C=y
+CONFIG_I3CDEV=y
+CONFIG_DW_I3C_MASTER=y
+CONFIG_SPI=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_ASPEED=y
+CONFIG_GPIO_ASPEED_SGPIO=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCA953X_IRQ=y
+CONFIG_W1=y
+CONFIG_W1_MASTER_GPIO=y
+CONFIG_W1_SLAVE_THERM=y
+CONFIG_SENSORS_ASPEED_G6=y
+CONFIG_SENSORS_IIO_HWMON=y
+CONFIG_SENSORS_LM75=y
+CONFIG_SENSORS_NCT7904=y
+CONFIG_SENSORS_OCC_P8_I2C=y
+CONFIG_SENSORS_PECI_CPUTEMP=y
+CONFIG_SENSORS_PECI_DIMMTEMP=y
+CONFIG_SENSORS_PECI_CPUPOWER=y
+CONFIG_SENSORS_PECI_DIMMPOWER=y
+CONFIG_PMBUS=y
+CONFIG_SENSORS_ADM1275=y
+CONFIG_SENSORS_IBM_CFFPS=y
+CONFIG_SENSORS_IR35221=y
+CONFIG_SENSORS_IR38064=y
+CONFIG_SENSORS_ISL68137=y
+CONFIG_SENSORS_LM25066=y
+CONFIG_SENSORS_MAX31785=y
+CONFIG_SENSORS_UCD9000=y
+CONFIG_SENSORS_UCD9200=y
+CONFIG_SENSORS_TMP421=y
+CONFIG_SENSORS_W83773G=y
+CONFIG_WATCHDOG_SYSFS=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_SUPPORT_FILTER=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_PLATFORM_SUPPORT=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_ASPEED=y
+CONFIG_DRM=y
+CONFIG_DRM_ASPEED_GFX=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_ASPEED_VHUB=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_HID=y
+CONFIG_USB_MASS_STORAGE=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ASPEED=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_CLASS_FLASH=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PCA955X=y
+CONFIG_LEDS_PCA955X_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_EDAC=y
+# CONFIG_EDAC_LEGACY_SYSFS is not set
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1307=y
+CONFIG_RTC_DRV_PCF8523=y
+CONFIG_RTC_DRV_PCHC620=y
+CONFIG_RTC_DRV_RV8803=y
+CONFIG_RTC_DRV_ASPEED=y
+# CONFIG_VIRTIO_MENU is not set
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_ASPEED_ESPI_SLAVE=y
+# CONFIG_ASPEED_LPC_CTRL is not set
+CONFIG_ASPEED_LPC_MBOX=y
+CONFIG_ASPEED_LPC_SIO=y
+CONFIG_ASPEED_MCTP=y
+# CONFIG_ASPEED_P2A_CTRL is not set
+CONFIG_ASPEED_XDMA=y
+CONFIG_ASPEED_VGA_SHAREDMEM=y
+CONFIG_IIO=y
+CONFIG_ASPEED_ADC=y
+CONFIG_MAX1363=y
+CONFIG_BMP280=y
+CONFIG_DPS310=y
+CONFIG_PWM=y
+CONFIG_PWM_FTTMR010=y
+CONFIG_RAS=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_PECI=y
+CONFIG_PECI_CHARDEV=y
+CONFIG_PECI_ASPEED=y
+CONFIG_PECI_MCTP=y
+CONFIG_JTAG=y
+CONFIG_JTAG_ASPEED=y
+CONFIG_EXT4_FS=y
+CONFIG_FANOTIFY=y
+CONFIG_OVERLAY_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+# CONFIG_JFFS2_FS_WRITEBUFFER is not set
+CONFIG_JFFS2_SUMMARY=y
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_UBIFS_FS=y
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_XZ=y
+CONFIG_SQUASHFS_ZSTD=y
+CONFIG_PSTORE=y
+CONFIG_PSTORE_RAM=y
+CONFIG_CIFS=y
+CONFIG_CIFS_XATTR=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_UTF8=y
+CONFIG_HARDENED_USERCOPY=y
+CONFIG_FORTIFY_SOURCE=y
+CONFIG_CRYPTO_USER_API_HASH=y
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_SPARC is not set
+CONFIG_PRINTK_TIME=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_INFO_REDUCED=y
+CONFIG_DEBUG_INFO_DWARF4=y
+CONFIG_GDB_SCRIPTS=y
+CONFIG_STRIP_ASM_SYMS=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x01
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_WX=y
+CONFIG_SCHED_STACK_END_CHECK=y
+CONFIG_PANIC_ON_OOPS=y
+CONFIG_PANIC_TIMEOUT=-1
+CONFIG_SOFTLOCKUP_DETECTOR=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
+CONFIG_WQ_WATCHDOG=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_DEBUG_LIST=y
+CONFIG_FUNCTION_TRACER=y
+CONFIG_DEBUG_USER=y
+# CONFIG_RUNTIME_TESTING_MENU is not set
generated by cgit v1.2.3 (git 2.39.0) at 2024-06-12 14:05:55 +0300