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path: root/drivers/gpu/drm/amd/pm/inc/hwmgr.h
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Diffstat (limited to 'drivers/gpu/drm/amd/pm/inc/hwmgr.h')
-rw-r--r--drivers/gpu/drm/amd/pm/inc/hwmgr.h26
1 files changed, 16 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/pm/inc/hwmgr.h b/drivers/gpu/drm/amd/pm/inc/hwmgr.h
index 518796a26eda..490371bd2520 100644
--- a/drivers/gpu/drm/amd/pm/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/pm/inc/hwmgr.h
@@ -60,7 +60,7 @@ struct vi_dpm_level {
struct vi_dpm_table {
uint32_t count;
- struct vi_dpm_level dpm_level[1];
+ struct vi_dpm_level dpm_level[];
};
#define PCIE_PERF_REQ_REMOVE_REGISTRY 0
@@ -91,7 +91,7 @@ struct phm_set_power_state_input {
struct phm_clock_array {
uint32_t count;
- uint32_t values[1];
+ uint32_t values[];
};
struct phm_clock_voltage_dependency_record {
@@ -122,8 +122,8 @@ struct phm_acpclock_voltage_dependency_record {
};
struct phm_clock_voltage_dependency_table {
- uint32_t count; /* Number of entries. */
- struct phm_clock_voltage_dependency_record entries[1]; /* Dynamically allocate count entries. */
+ uint32_t count; /* Number of entries. */
+ struct phm_clock_voltage_dependency_record entries[]; /* Dynamically allocate count entries. */
};
struct phm_phase_shedding_limits_record {
@@ -140,7 +140,7 @@ struct phm_uvd_clock_voltage_dependency_record {
struct phm_uvd_clock_voltage_dependency_table {
uint8_t count;
- struct phm_uvd_clock_voltage_dependency_record entries[1];
+ struct phm_uvd_clock_voltage_dependency_record entries[];
};
struct phm_acp_clock_voltage_dependency_record {
@@ -150,7 +150,7 @@ struct phm_acp_clock_voltage_dependency_record {
struct phm_acp_clock_voltage_dependency_table {
uint32_t count;
- struct phm_acp_clock_voltage_dependency_record entries[1];
+ struct phm_acp_clock_voltage_dependency_record entries[];
};
struct phm_vce_clock_voltage_dependency_record {
@@ -161,7 +161,7 @@ struct phm_vce_clock_voltage_dependency_record {
struct phm_phase_shedding_limits_table {
uint32_t count;
- struct phm_phase_shedding_limits_record entries[1];
+ struct phm_phase_shedding_limits_record entries[];
};
struct phm_vceclock_voltage_dependency_table {
@@ -186,7 +186,7 @@ struct phm_acpclock_voltage_dependency_table {
struct phm_vce_clock_voltage_dependency_table {
uint8_t count;
- struct phm_vce_clock_voltage_dependency_record entries[1];
+ struct phm_vce_clock_voltage_dependency_record entries[];
};
@@ -366,6 +366,7 @@ struct pp_hwmgr_func {
int (*disable_power_features_for_compute_performance)(struct pp_hwmgr *hwmgr,
bool disable);
ssize_t (*get_gpu_metrics)(struct pp_hwmgr *hwmgr, void **table);
+ int (*gfx_state_change)(struct pp_hwmgr *hwmgr, uint32_t state);
};
struct pp_table_func {
@@ -394,7 +395,7 @@ union phm_cac_leakage_record {
struct phm_cac_leakage_table {
uint32_t count;
- union phm_cac_leakage_record entries[1];
+ union phm_cac_leakage_record entries[];
};
struct phm_samu_clock_voltage_dependency_record {
@@ -405,7 +406,7 @@ struct phm_samu_clock_voltage_dependency_record {
struct phm_samu_clock_voltage_dependency_table {
uint8_t count;
- struct phm_samu_clock_voltage_dependency_record entries[1];
+ struct phm_samu_clock_voltage_dependency_record entries[];
};
struct phm_cac_tdp_table {
@@ -442,6 +443,7 @@ struct phm_cac_tdp_table {
uint8_t ucPlx_I2C_Line;
uint32_t usBoostPowerLimit;
uint8_t ucCKS_LDO_REFSEL;
+ uint8_t ucHotSpotOnly;
};
struct phm_tdp_table {
@@ -826,5 +828,9 @@ int hwmgr_handle_task(struct pp_hwmgr *hwmgr,
#define PHM_ENTIRE_REGISTER_MASK 0xFFFFFFFFU
+int smu7_init_function_pointers(struct pp_hwmgr *hwmgr);
+int smu8_init_function_pointers(struct pp_hwmgr *hwmgr);
+int vega12_hwmgr_init(struct pp_hwmgr *hwmgr);
+int vega20_hwmgr_init(struct pp_hwmgr *hwmgr);
#endif /* _HWMGR_H_ */