diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_fbc.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_fbc.c | 27 |
1 files changed, 16 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index eee1b02c827e..d7d1ac79c38a 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -492,7 +492,8 @@ static void intel_fbc_schedule_activation(struct intel_crtc *crtc) schedule_work(&work->work); } -static void intel_fbc_deactivate(struct drm_i915_private *dev_priv) +static void intel_fbc_deactivate(struct drm_i915_private *dev_priv, + const char *reason) { struct intel_fbc *fbc = &dev_priv->fbc; @@ -505,6 +506,8 @@ static void intel_fbc_deactivate(struct drm_i915_private *dev_priv) if (fbc->active) intel_fbc_hw_deactivate(dev_priv); + + fbc->no_fbc_reason = reason; } static bool multiple_pipes_ok(struct intel_crtc *crtc, @@ -668,11 +671,13 @@ void intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv) static bool stride_is_valid(struct drm_i915_private *dev_priv, unsigned int stride) { - /* These should have been caught earlier. */ - WARN_ON(stride < 512); - WARN_ON((stride & (64 - 1)) != 0); + /* This should have been caught earlier. */ + if (WARN_ON_ONCE((stride & (64 - 1)) != 0)) + return false; /* Below are the additional FBC restrictions. */ + if (stride < 512) + return false; if (IS_GEN2(dev_priv) || IS_GEN3(dev_priv)) return stride == 4096 || stride == 8192; @@ -920,6 +925,7 @@ void intel_fbc_pre_update(struct intel_crtc *crtc, { struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_fbc *fbc = &dev_priv->fbc; + const char *reason = "update pending"; if (!fbc_supported(dev_priv)) return; @@ -927,7 +933,7 @@ void intel_fbc_pre_update(struct intel_crtc *crtc, mutex_lock(&fbc->lock); if (!multiple_pipes_ok(crtc, plane_state)) { - fbc->no_fbc_reason = "more than one pipe active"; + reason = "more than one pipe active"; goto deactivate; } @@ -937,7 +943,7 @@ void intel_fbc_pre_update(struct intel_crtc *crtc, intel_fbc_update_state_cache(crtc, crtc_state, plane_state); deactivate: - intel_fbc_deactivate(dev_priv); + intel_fbc_deactivate(dev_priv, reason); unlock: mutex_unlock(&fbc->lock); } @@ -970,9 +976,8 @@ static void __intel_fbc_post_update(struct intel_crtc *crtc) intel_fbc_reg_params_equal(&old_params, &fbc->params)) return; - intel_fbc_deactivate(dev_priv); + intel_fbc_deactivate(dev_priv, "FBC enabled (active or scheduled)"); intel_fbc_schedule_activation(crtc); - fbc->no_fbc_reason = "FBC enabled (active or scheduled)"; } void intel_fbc_post_update(struct intel_crtc *crtc) @@ -1013,7 +1018,7 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv, fbc->busy_bits |= intel_fbc_get_frontbuffer_bit(fbc) & frontbuffer_bits; if (fbc->enabled && fbc->busy_bits) - intel_fbc_deactivate(dev_priv); + intel_fbc_deactivate(dev_priv, "frontbuffer write"); mutex_unlock(&fbc->lock); } @@ -1243,7 +1248,7 @@ static void intel_fbc_underrun_work_fn(struct work_struct *work) DRM_DEBUG_KMS("Disabling FBC due to FIFO underrun.\n"); fbc->underrun_detected = true; - intel_fbc_deactivate(dev_priv); + intel_fbc_deactivate(dev_priv, "FIFO underrun"); out: mutex_unlock(&fbc->lock); } @@ -1370,7 +1375,7 @@ void intel_fbc_init(struct drm_i915_private *dev_priv) for_each_pipe(dev_priv, pipe) { fbc->possible_framebuffer_bits |= - INTEL_FRONTBUFFER_PRIMARY(pipe); + INTEL_FRONTBUFFER(pipe, PLANE_PRIMARY); if (fbc_on_pipe_a_only(dev_priv)) break; |