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2021-03-18ARM: dts: add silicon_id misc node into aspeed-bmc-intel-ast2600dev-5.8-intelJae Hyun Yoo1-0/+8
This commit adds silicon_id sub-node into misc_control node. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Change-Id: I60c09b654ca8a8881e5df4be07f062280210e570
2021-03-10fixup! peci: Add support for PECI bus driver coreJason M. Bills2-11/+8
Per recommendation from the CPU team, reduce the first retry delay to 100us. Use usleep instead of schedule_timeout to avoid stretching the delay. Change-Id: I6698b0f05f952aaef737dd09280a17aaec81a2c5 Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>
2021-03-10ASD Prevent TDI remaining bits to be override during JTAG xferErnesto Corona2-1/+20
JTAG xfer length is measured in bits and it is allowed to send non 8-bit aligned xfers. For such xfers we will read the content of the remaining bits in the last byte of tdi buffer and restore those bits along with the xfer readback. Add also linux types to JTAG header to remove external dependencies. Test: SPR ASD Sanity and jtag_test finished successfully. SKX ASD Sanity and jtag_test finished successfully. Change-Id: I6d53349a724c66d08b6cbbaeac166c4857835b55 Signed-off-by: Ernesto Corona <ernesto.corona@intel.com>
2021-03-10pinctrl: aspeed: g6: modify RMII4 groupJae Hyun Yoo1-1/+1
Intel doesn't use transmit clock output of RMII4 module so this commit customize RMII4 pin ctrl group by removing the F24 pin setting from RMII4. This is a downstream customization. Do not upstream it. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Change-Id: Ifcfe2fec82f7b8c2f1bfeacf2d5fe5610cafce73
2021-03-10hwmon: peci: cleanupOlender, Agata3-44/+30
Add cleanup fixes after implementing energy sensor for all modules: cpu, dimm, platform to make all files consistent. Change-Id: I359b3627867df23dc4d80891437c0e53a04c16be Signed-off-by: Olender, Agata <agata.olender@intel.com>
2021-03-09ASD AST26xx HW mode 2 interrupt supportErnesto Corona1-25/+50
Create a low level function to handle xfer interrupts and map corresponding interrupt functions for AST25xx and AST26xx in HW1 and HW2 xfer modes. By default JTAG driver still uses polling. Interrupt support needs to be enabled with USE_INTERRUPTS macro. Remove also unused SCU reference. Test: AST26xx(SPR) ASD Sanity and jtag_test using HW2 polling. AST26xx(SPR) ASD Sanity and jtag_test using HW1 polling. AST26xx(SPR) ASD Sanity and jtag_test using HW2 interrupt. AST26xx(SPR) ASD Sanity and jtag_test using HW1 interrupt. AST26xx(SPR) jtag_test using SW mode. AST25xx(SKX) ASD Sanity and jtag_test using HW polling. AST25xx(SKX) ASD Sanity and jtag_test using HW interrupt. AST25xx(SKX) jtag_test using SW mode. Change-Id: Ib5d3d0ed2f7075195693f8937a16e86ddf3a0f32 Signed-off-by: Ernesto Corona <ernesto.corona@intel.com>
2021-03-02Stop reading DRAM_MIN_PWRZbigniew Lukwinski1-33/+9
This commit is about disabling reading DRAM_MIN_PWR from DRAM_POWER_INFO PCS. Starting from SPR DRAM_MIN_PWR is deprecated. BIOS does not update DRAM min power anymore. Value of 0 shall be reported as DRAM min power. Change-Id: I4c4b3116e5d99989808fb4803740a00aa285a78f Signed-off-by: Zbigniew Lukwinski <zbigniew.lukwinski@linux.intel.com>
2021-02-25hwmon: peci: TDP used for max DRAM powerZbigniew Lukwinski2-30/+4
This commit replaces 'Maximal DRAM Power' (MSR@61Ch - MSR_DRAM_POWER_INFO_HIGH) with the 'Spec DRAM Power'('TDP') (MSR@61Ch - MSR_DRAM_POWER_INFO_LOW) while maximal DRAM power calculation. This is to be compliant with SPS ME Node Manager. In case package power it already works with the same way - TDP is taken as maximal power. Change-Id: Iba55f0aa0ab73b32e4a068bb8bbd11136190fb75 Signed-off-by: Zbigniew Lukwinski <zbigniew.lukwinski@linux.intel.com>
2021-02-19hwmon: (aspeed-pwm-tacho) Add pwm chip driver supportJae Hyun Yoo2-4/+131
This commit adds pwm chip driver support into aspeed-g6-pwm-tacho driver to enable beep speaker driver. The pwm chip driver cannot be added as a separate platform driver because it makes resource conflicts with existing pwm-tacho driver so it uses hacky tweak on the existing driver. Note: Do not try upstream this hacky implementation. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Change-Id: I22ad12be2ae3a061d7942fec813cdb11be321db7
2021-02-19hwmon: peci: add energy sensor to peci-dimmpowerOlender, Agata1-56/+232
Add support for energy consumption of DIMMs sensor. Energy is reported in micro Joules and exposed under energyN_input file. Change-Id: I6fdcfb9873312df837fcaaeeed513b2991c6c8b5 Signed-off-by: Olender, Agata <agata.olender@intel.com>
2021-02-18fixup! ARM: dts: aspeed-bmc-intel-ast2600: Update to latest SGPIOsJason M. Bills1-9/+9
Update based on the latest SGPIO list provided by the Archer City CPLD team. Change-Id: Ia14bcc86171f22b173229d46e1dc2cb9e241ad6f Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>
2021-02-18hwmon: peci: cumulative energy sensorOlender, Agata2-69/+133
Change energy sensor to cumulative energy sensor. Actually energy sensor implementation works as simply translation for value read from PCS register to microjoules. With this change, energy sensor will behave as accumulative sensor> After every read on energyN_input file new energy sample will be gathered, and the difference between new sample and previous one will be added to sensor value. This approach solves problems with counters overflow and interpretation of the energy sensor value. Change-Id: I8ef0e6e52198af0f4a2f96c76589b4e02289ac6a Signed-off-by: Olender, Agata <agata.olender@intel.com>
2021-02-11peci: mctp: Enable PECI over MCTPKarol Wachowski1-10/+0
Remove modparam to enable peci-mctp probe and enable it by default. Tested: Verified that peci-mctp driver probes correctly: peci peci-1: cdev of adapter [peci-mctp] registered as minor 1 Manually verified that applications using PECI work correctly. Signed-off-by: Karol Wachowski <karol.wachowski@intel.com> Change-Id: I0eca81b2437049c6e47ee10405c22bc71744dec1
2021-02-10peci: mctp: Add support for CPU discoveryIwona Winiarska1-16/+69
When peci-mctp finds that there is no discovered CPU, it queries aspeed-mctp to read BDFs for each static EID reserved by CPU socket. If BDF is non-zero, peci-mctp reads CPUNODEID_CFG register to determine CPU represented by this endpoint. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com> Change-Id: I25575ad41cae54bf7fae2eaff6323cb2c29a6170
2021-02-08peci: mctp: Extract communication with MCTPIwona Winiarska1-62/+80
Right now, send and receive API functions are called directly from xfer handler. Let's add a dedicated helper function responsible for send/receive to allow issuing PECI messages originated in peci-mctp driver. Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com> Change-Id: I94e7761f6c4e268455df823976c020f349c83a9b
2021-02-08fixup! peci: mctp: Add peci-mctp adapterIwona Winiarska1-23/+23
Removed unused param, fixed warning: warning: passing argument 1 of 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion] | 234 | if (PTR_ERR(rx_packet != -ERESTARTSYS)) | | ^~ and minor indentation changes. Change-Id: Ibd9247ea16f7649d370c03c6afe929334a8a2fc3 Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2021-02-08fixup! hwmon: peci: add energy sensor to peci-cpupowerJae Hyun Yoo1-1/+1
Fix a kernel crash issue caused by division by zero. Feb 03 21:57:25 intel-obmc kernel: Division by zero in kernel. Feb 03 21:57:25 intel-obmc kernel: CPU: 0 PID: 391 Comm: cpusensor Not tainted 5.8.17-629ba88-dirty-0815a94 #1 Feb 03 21:57:25 intel-obmc kernel: Hardware name: Generic DT based system Feb 03 21:57:25 intel-obmc kernel: Backtrace: Feb 03 21:57:25 intel-obmc kernel: [<80106fb8>] (dump_backtrace) from [<8010720c>] (show_stack+0x20/0x24) Feb 03 21:57:25 intel-obmc kernel: r7:00000000 r6:9e217e80 r5:9e217e20 r4:8090dd9c Feb 03 21:57:25 intel-obmc kernel: [<801071ec>] (show_stack) from [<807a3114>] (dump_stack+0x28/0x30) Feb 03 21:57:25 intel-obmc kernel: [<807a30ec>] (dump_stack) from [<8010739c>] (__div0+0x20/0x28) Feb 03 21:57:25 intel-obmc kernel: r5:9e217e20 r4:00000000 Feb 03 21:57:25 intel-obmc kernel: [<8010737c>] (__div0) from [<807a1d9c>] (Ldiv0+0x8/0x2c) Feb 03 21:57:25 intel-obmc kernel: [<805e6a0c>] (peci_cpupower_get_average_power) from [<805e6764>] (peci_cpupower_read+0xbc/0x104) Feb 03 21:57:25 intel-obmc kernel: r10:977fbf68 r9:9da0c720 r8:9d988c08 r7:977a0000 r6:00000001 r5:9e217e80 Feb 03 21:57:25 intel-obmc kernel: r4:977fbe30 Feb 03 21:57:25 intel-obmc kernel: [<805e66a8>] (peci_cpupower_read) from [<805e0e84>] (hwmon_attr_show+0x50/0xfc) Feb 03 21:57:25 intel-obmc kernel: r7:977a0000 r6:8085a708 r5:805e66a8 r4:9d9d7400 Feb 03 21:57:25 intel-obmc kernel: [<805e0e34>] (hwmon_attr_show) from [<80501224>] (dev_attr_show+0x28/0x58) Feb 03 21:57:25 intel-obmc kernel: r9:9da0c720 r8:9d988c08 r7:977a0000 r6:8085a708 r5:9d9d7400 r4:9d9539d8 Feb 03 21:57:25 intel-obmc kernel: [<805011fc>] (dev_attr_show) from [<802bfad4>] (sysfs_kf_seq_show+0x8c/0x104) Feb 03 21:57:25 intel-obmc kernel: r5:00001000 r4:9d9539d8 Feb 03 21:57:25 intel-obmc kernel: [<802bfa48>] (sysfs_kf_seq_show) from [<802be1ac>] (kernfs_seq_show+0x34/0x38) Feb 03 21:57:25 intel-obmc kernel: r9:00000001 r8:9d9539f0 r7:977fbf68 r6:00000000 r5:00000000 r4:9d9539d8 Feb 03 21:57:26 intel-obmc kernel: [<802be178>] (kernfs_seq_show) from [<8025ea38>] (seq_read+0xd0/0x5dc) Feb 03 21:57:26 intel-obmc kernel: [<8025e968>] (seq_read) from [<802bee9c>] (kernfs_fop_read+0x3c/0x1cc) Feb 03 21:57:26 intel-obmc kernel: r10:00000000 r9:977fbf68 r8:00000001 r7:977fbf68 r6:0245f868 r5:9da0c720 Feb 03 21:57:26 intel-obmc kernel: r4:802bee60 Feb 03 21:57:26 intel-obmc kernel: [<802bee60>] (kernfs_fop_read) from [<80234ccc>] (vfs_read+0xa4/0x158) Feb 03 21:57:26 intel-obmc kernel: r10:00000000 r9:977fbf68 r8:00000001 r7:0245f868 r6:9d929500 r5:00000000 Feb 03 21:57:26 intel-obmc kernel: r4:802bee60 Feb 03 21:57:26 intel-obmc kernel: [<80234c28>] (vfs_read) from [<80235224>] (ksys_read+0x70/0xf8) Feb 03 21:57:26 intel-obmc kernel: r9:977fa000 r8:80100224 r7:00000000 r6:00000000 r5:9d929500 r4:9d929500 Feb 03 21:57:26 intel-obmc kernel: [<802351b4>] (ksys_read) from [<802352c4>] (sys_read+0x18/0x1c) Feb 03 21:57:26 intel-obmc kernel: r7:00000003 r6:7e80c9f0 r5:76f9a840 r4:024584fc Feb 03 21:57:26 intel-obmc kernel: [<802352ac>] (sys_read) from [<80100040>] (ret_fast_syscall+0x0/0x54) Feb 03 21:57:26 intel-obmc kernel: Exception stack(0x977fbfa8 to 0x977fbff0) Feb 03 21:57:26 intel-obmc kernel: bfa0: 024584fc 76f9a840 00000017 0245f868 00000200 00000000 Feb 03 21:57:26 intel-obmc kernel: bfc0: 024584fc 76f9a840 7e80c9f0 00000003 0245f868 00000200 024371f0 7e80ca40 Reported-by: Johnathan Mantey <johnathanx.mantey@intel.com> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Change-Id: I36a047ee8a941f3aba672536894d0df8a4e18c32
2021-02-04soc: aspeed: mctp: Export function used to read BDFIwona Winiarska2-0/+31
Recently, aspeed-mctp driver functionality was extended to store BDF values for already discovered MCTP endpoints on PCIe bus. Let's expose kernel API to read BDF based on endpoint ID. Change-Id: I146e67a8c2f4f541b4c3065c18dcadf531f30670 Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2021-02-04Enable mailbox interruptsYong Li2-52/+93
Support interrupt generation for both 16 and 32 mailbox registers. Tested: After applied this patch, write the mailbox registers from BIOS side, the misc manager can capture the new mailbox data. Change-Id: I4030b6df176a53656aea9cb68ee80b67add8ed14 Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
2021-02-02fixup! peci: Add peci_revision propertyJae Hyun Yoo1-5/+6
When an adapter is registered in CPU power off state, all PECI commands are not available except GetDIB, GetTemp and Ping commands. This commit removes incorrect revision setting to make it retry the revision checking if an adapter doesn't have pre-defined revision value. Change-Id: If405c8127a6db08e92cd8c1b7ef1ff1c3aadb9ef Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
2021-01-27hwmon: peci: adjust energy sensor value to S32 typeOlender, Agata1-2/+2
Adjust energy sensor to be 31 bits counter and return only positive values using S32 type - that is a part of common sensor struct for all hwmon peci sensors. Change-Id: Iae602401f228aa0e8789de8c8cf3a4796c9aadd9 Signed-off-by: Olender, Agata <agata.olender@intel.com>
2021-01-25fixup! soc: aspeed: mctp: Add IOCTL to register default clientAndrzej Kacprowski1-7/+0
Remove temporary workaround to register first user space client as default client. Change-Id: I9e020be0815422c125f38713ce21a6ac3cdba1ad Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2021-01-21usb: gadget: aspeed: fix stop dma register setting.Ryan Chen1-1/+4
The vhub engine has two dma mode, one is descriptor list, another is single stage DMA. Each mode has different stop register setting. Descriptor list operation (bit2) : 0 disable reset, 1: enable reset Single mode operation (bit0) : 0 : disable, 1: enable Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Acked-by: Joel Stanley <joel@jms.id.au> Change-Id: Ie4f4fa3e517580ba090d5fa3aef8729a5c8bb692
2021-01-20ARM: dts: aspeed-bmc-intel-ast2600: add status_susack LED nodeJae Hyun Yoo1-0/+5
This commit adds an LED control node for status_susack. Change-Id: I324ac20ec14cecb4c3ff48ec2964a885ad6a4480 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
2021-01-20i3c: master: dw: Fix out of range writeWludzik, Jozef1-5/+8
Fixed out of range write by ignoring usage of CCC_WORKAROUND when DEVICE_ADDR_TABLE_POINTER register returns 0 value. It allows to use simulation software like QEMU where I3C may not be implemented and all its registers are set to zeros. Signed-off-by: Wludzik, Jozef <jozef.wludzik@intel.com> Change-Id: I06d0faebf370d60251b7ea771236ce7b7d44a98f
2021-01-15Move Aspeed eSPI driver to soc/aspeed treeJae Hyun Yoo5-9/+9
This commit moves Aspeed eSPI driver from misc to soc/aspeed tree to make correct probing order for LPC and eSPI driver. Since LPC runs over eSPI, eSPI driver should be registered ahead of LPC driver. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Change-Id: I6c813c3e29ddb02c86e3266b9fc713a8b410169e
2021-01-13Fix reset index of LPC and eSPIJae Hyun Yoo1-1/+2
AST2600 A1 has separate reset control for LPC and eSPI so this commit fix the index definition to make it work on AST2600 A1. Change-Id: Ied8f96740b6df802a65313fde369e79386557903 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
2021-01-13ASD AST26xx JTAG Controller HW1/HW2 FIFO Read/Write DelayErnesto Corona1-12/+42
There is a data to send/read FIFO used by the AST26xx series JTAG Master Controller when hardware mode 1 and 2 transfer is selected. The proper usage of this FIFO allows AST26xx JTAG peripheral to xfer up to 512 bit without CPU interaction. In this commit we included a delay after FIFO R/W operations to provide enough time for JTAG master controller to handle FIFO transitions. Additionally we included aspeed_jtag_xfer_hw_26xx() to separate AST25xx and AST26xx HW1 xfer handlers and setup the delay only for AST26xx series. These changes doesn't affect Software mode or AST25xx functionality. Tested: ASD Sanity works finished successfully for AST26xx in SW/HW1/HW2 modes 50 times jtag_test -h -t 8 -i 8000000 (HW2) 50 times jtag_test -h -t 8 -i 8000000 (HW1) 50 times jtag_test -i 8000000 (SW) Signed-off-by: Ernesto Corona <ernesto.corona@intel.com> Change-Id: Ief5800db88079a19a948a93cae2e0460ecbe75c6
2021-01-12soc: aspeed: mctp: Register peci_mctp deviceIwona Winiarska1-1/+9
Now that it is possible to send PECI frames via aspeed-mctp driver, let's add aspeed-peci-mctp node to allow bind peci-mctp-aspeed adapter driver. Change-Id: Ie511af2896a6626d7179cd9475ec9ef8c7309496 Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2021-01-12peci: mctp: Add peci-mctp adapterIwona Winiarska3-0/+363
PECI frames can be encapsulated into MCTP PCIe VDM packets. Let's add driver that allows to send PECI frames via aspeed-mctp driver. Change-Id: I70e743661dc6d3905ef2e9ae6ee2624fdf93a388 Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2021-01-08fixup! ARM: dts: aspeed-bmc-intel-ast2600: Fix CPU2_MEM_VRHOT nameJason M. Bills1-1/+1
Change-Id: I91a4b82df13c3e1a5ff826e4d893c970e4a1ae02 Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>
2021-01-08soc: aspeed: mctp: Fix TX hangs and optimize TX logicAndrzej Kacprowski1-58/+42
Currently driver submits 1 (or rarely more than 1) packet then waits until HW signals transmission completion before sending more packets. This logic requires interrupt after each packet, aspeed_mctp_tx_tasklet() is invoked twice per packet. New logic uses TX ring correctly, packets are added to the end of circular ring buffer. The driver does not have to wait for HW to complete transmission of enqueued packets before adding more packets to TX queue. Interrupt is generated only if TX ring if full. This change significantly improves packet transmission performance: PECI GetTemp command takes ~25us instead of ~30us. This change also fixes sporadic TX hangs during host reboot seen with current driver. Change-Id: Ia12f71eb048c10e7aa0dd3821206044698d0c7f9 Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2021-01-08soc: aspeed: mctp: Update source EID in TX packetsAndrzej Kacprowski1-1/+26
If self EID is known then the driver updates source EID in MCTP header of sent packets. For MCTP control packets the source EID is not updated as it may disrupt MCTP discovery flow. Self EID is determined from list of known endpoints provided by ASPEED_MCTP_IOCTL_SET_EID_INFO IOCTL. Change-Id: I8d6d0aebac096859a55694d6d82540aea8264085 Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2021-01-08fixup! aspeed-mctp: Add EID information related ioctlsKarol Wachowski1-4/+16
Fix error when swapping two empty lists. Copy count in ASPEED_MCTP_GET_EID_INFO to userbuf instead of incorrectly returning it by value. Change-Id: I8549a3a988d1f44106582729b9a6eca650ded256 Signed-off-by: Karol Wachowski <karol.wachowski@intel.com>
2021-01-08Update I3C driversDylan Hung9-53/+602
This commit ports I3C updates from Aspeed SDK v00.06.00. Note: Should be refined to get upstreamed. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Change-Id: Ic674bf5d6b5e72b389c739b136710915aabc6324
2021-01-08ARM: dts: aspeed: enable gpio1 nodeJae Hyun Yoo1-1/+1
This commit enables gpio1 node. Change-Id: I63e8731974190e2241db0bc41e3882f9be37cff4 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
2021-01-08Revert "gpio: aspeed: temporary fix for gpiochip range setting"Jae Hyun Yoo2-2/+2
This reverts commit 35900362ee1c3db33dd5637ae824521d9a28a304. All index based implementations were replaced with name based so revert this temporary patch. Change-Id: I52e0759e0fd45865718bcd6bb67f2dc20461470e Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
2021-01-07fixup! soc: aspeed: mctp: Expose internal kernel APIIwona Winiarska2-15/+33
Fixed a missing error handling for case where wait_event_interruptible_timeout() returns -ERESTARTSYS. Renamed the exposed functions to be more consistent with their usage. Added dedicated function to flush client rx queue. Change-Id: I0fd1bfca926b34ae0f4dc18f07e453b3861a4c3e Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2021-01-05hwmon: peci: add energy sensor to peci-cpupowerOlender, Agata4-150/+342
Add support for energy consumption of CPU package sensor. Energy is reported in micro Joules and exposed under energyN_input file. Change-Id: I853e9ba8f7223a3cbfbbdf82719aee78999486da Signed-off-by: Olender, Agata <agata.olender@intel.com>
2020-12-21soc: aspeed: mctp: Fix RX hangs and RX packet missesAndrzej Kacprowski1-76/+133
Under even moderate traffic the driver can miss a lot of received packets and eventually stops receiving packets at all. There is an bug in AST2600 RX logic where HW does not wrap around RX read buffer pointer correctly. Current driver workaround for this bug resets RX HW read pointer to 0 whenever it reaches end of the RX buffer ring - this does not work properly if more than 1 packet is received while RX pointer is close to the end of the RX buffer ring - in such case HW can detect ring full condition and stop RX. The new workaround has different logic: it sets HW buffer count to 4n - 1 and updates driver maintained RX write pointer so it tracks HW read pointer to prevent hardware from stopping. Received packets are located by looking into RX data buffers rather that HW read pointer that contains incorrect value anyway. Driver never resets HW read pointer, HW is receiving packets without any interference form the driver. Also handle RX_CMD_NO_MORE_INT - if RX ring if full then HW will clear RX_CMD_READY bit and we need to re-enable it once we free some space in RX ring. Change-Id: I0a94fd43a91f17677e6df9da7bb71b3254543de0 Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2020-12-18i2c: aspeed: clear slave addresses in probeJae Hyun Yoo1-0/+3
Initial value of I2CD18 is undefined according to the datasheet so this commit adds the I2CD18 register clearing code into bus initialization function to prevent any unexpected slave match events. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Change-Id: I6c6cadeaf6fefcf74eba0d96c49986a810ccbb51
2020-12-17peci: Add peci_revision propertyIwona Winiarska2-13/+23
Right now, PECI revision is determined using a result of GetDIB() PECI command. Because GetDIB() may not be supported by all type of physical media that provides PECI, we need an alternative. Until we figure how to determine PECI revision there (if we can't do that, we'll fallback to device tree), let's allow to hardcode PECI revision as a property of hardware adapter. Change-Id: Iea75ccae9b9f793c67e996064fff3c31c730ad4f Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2020-12-17soc: aspeed: mctp: Expose internal kernel APIIwona Winiarska2-39/+179
Some protocols that are already implemented in kernel can be encapsulated in MCTP packets. To allow use aspeed-mctp internally in kernel space, let's allow to use selected functions outside of aspeed-mctp. Change-Id: I543bfce975dfdd7cf8017899a139f69febbaca8d Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2020-12-17soc: aspeed: mctp: Fix header swapping consistencyIwona Winiarska1-24/+23
Right now, TX ring contains packets with PCIe header already swapped to little endian (byte order expected by HW), while RX ring contains packets with PCIe header already swapped to network order (expected by userspace). Let's keep TX packets in network order and swap before write to HW buffer. To make it more readable, let's extract swapping into a helper function. Change-Id: I6c69ad9b3c9f68b2ef416eaf9259798cf011b8c4 Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2020-12-17fixup! i2c: Add mux hold/unhold msg typesJae Hyun Yoo2-2/+4
This commit fixes a deadlock case by replacing a del_timer_sync call with a del_timer in timer handler function. This issue was not observed in previous platform because the previous UP kernel calls del_timer instead of del_timer_sync but in SMP kernel, it calls del_timer_sync actually. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Change-Id: I0633acafb5023c50494e41c82c65c0acaa3bc068
2020-12-16aspeed-mctp: Add EID information related ioctlsKarol Wachowski2-0/+195
Implement two new ioctls for storing EID related information: * ASPEED_MCTP_IOCTL_GET_EID_INFO * ASPEED_MCTP_IOCTL_SET_EID_INFO Driver stores EID mapping in a list which is traversed when one tries to get information using ASPEED_MCTP_IOCTL_GET_EID_INFO ioctl, when given EID mapping is not found in the list, next entry is returned. When there are no entries with EIDs higher than specified in the IOCTL call -ENODEV is returned. Whenever new information about EID mapping is stored with ASPEED_MCTP_IOCTL_SET_EID_INFO ioctl driver empties exsiting list of mappings and creates new one based on user input. After insertion list is sorted by EID. Invalid input such as duplicated EIDs will cause driver to return -EINVAL. Change-Id: I41e4e4e83f451a8367d58bbf9b67e8e8f7d080f4 Signed-off-by: Karol Wachowski <karol.wachowski@intel.com>
2020-12-08soc: aspeed: mctp: Pick uevents consistentlyIwona Winiarska1-3/+2
Uevent objects are different for PCI_READY=0 and PCI_READY=1. Let's make uevents consistent and use the same object in both cases. Change-Id: I68dbed9b2b552999cf6858975294d570b5522e86 Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2020-12-08fixup! peci: aspeed: add a WA to cover timing negotiation issueIwona Winiarska1-2/+1
No functional changes, just plain warnings removal: drivers/peci/busses/peci-aspeed.c: In function 'aspeed_peci_init_regs': drivers/peci/busses/peci-aspeed.c:163:1: warning: no return statement in function returning non-void [-Wreturn-type] drivers/peci/busses/peci-aspeed.c: In function 'aspeed_peci_check_idle': drivers/peci/busses/peci-aspeed.c:168:6: warning: unused variable 'ret' [-Wunused-variable] Change-Id: I0a99bf598741bbd7ef00cc9995300c7bb6086e62 Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2020-12-08soc: aspeed: mctp: Add API to register client for MCTP typeAndrzej Kacprowski2-2/+214
MCTP client can register for receiving packets with selected MCTP message type or PCIE vendor defined message type. Vendor defined type is 2 bytes but in Intel VDMs the first byte is variable and only the second byte contains constant message type - to support this use case we have to specify 2 byte mask that is applied to packet type before comparing with registered vendor type. When MCTP packet arrives its header is compared with a list of registered (vendor) types. If no client registered for packet's (vendor) type then the packet is dispatched to the default client. Fragmented packets are not considered for type matching. Only one client can register for given (vendor) type. Client can register for multiple (vendor) types. All packet fields must be specified in big endian byte order. This feature allows to support multiple clients simultaneously but only one client per (vendor) message type. For example we can have PECI client in kernel that uses PECI vendor message type, dcpmm daemon in user space that handles NVDIMM vendor type messages and mctpd service that handles MCTP control and PLDM message types. tested with peci_mctp_test application Change-Id: I8a9fed3d4b2f2628782299928abd15bdd7af9387 Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
2020-12-08soc: aspeed: mctp: Add IOCTL to register default clientAndrzej Kacprowski2-1/+27
Add IOCTL to register given client as default client that receives all packets that were not dispatched to other clients. This IOCTL is intended to be used by mctpd service or test application that should receive all packets that are not claimed by other clients. mctpd service might not be the first user space client since dcpmm or telemetry client can start before mctpd or mctpd can crash and be restarted automatically at any time. To preserve backward compatibility with mctpd, the first user space client will be registered automatically as default client - once mctpd is modified to call ASPEED_MCTP_IOCTL_REGISTER_DEFAULT_HANDLER we can remove this workaround. Change-Id: I9e7f48ef0efab1813122daf131ff23476f0fae76 Signed-off-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com>
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