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AgeCommit message (Expand)AuthorFilesLines
2020-05-13drm/i915: Drop I915_RESET_TIMEOUT and friendsChris Wilson1-7/+0
2020-05-13drm/i915: Mark the addition of the initial-breadcrumb in the requestChris Wilson3-9/+30
2020-05-13drm/i915/gem: Remove redundant exec_fenceChris Wilson1-26/+14
2020-05-13drm/i915: Remove duplicate inline specifier on write_pteNathan Chancellor1-1/+1
2020-05-13drm/i915/gt: Suspend tasklets before resume sanitizationChris Wilson1-4/+4
2020-05-13drm/i915: Make active_pipes check skl specificStanislav Lisovskiy2-6/+11
2020-05-13drm/i915: Extract skl SAGV checkingStanislav Lisovskiy1-2/+8
2020-05-13drm/i915: Introduce skl_plane_wm_level accessor.Stanislav Lisovskiy1-2/+21
2020-05-13drm/i915/gt: Reset execlists registers before HWSPChris Wilson1-7/+14
2020-05-13drm/i915/ehl: Restrict w/a 1607087056 for EHL/JSLSwathi Dhanavanthri2-4/+12
2020-05-12drm/i915: Handle idling during i915_gem_evict_something busy loopsChris Wilson1-14/+12
2020-05-11drm/i915/gt: Restore Cherryview back to full-ppgttChris Wilson2-1/+55
2020-05-11drm/i915/gt: Force pte cacheline to main memoryMika Kuoppala1-2/+13
2020-05-11drm/i915: Remove unused HAS_FWTABLE macroPascal Terjan1-5/+0
2020-05-11drm/i915/selftests: Always flush before unpining after writingChris Wilson7-4/+21
2020-05-11drm/i915: Emit await(batch) before MI_BB_STARTChris Wilson4-54/+64
2020-05-11drm/i915: Use stashed away hpd isr bits in intel_digital_port_connected()Ville Syrjälä3-134/+17
2020-05-11drm/i915: Stash hpd status bits under dev_privVille Syrjälä2-89/+116
2020-05-11drm/i915: Turn intel_digital_port_connected() in a vfuncVille Syrjälä5-128/+135
2020-05-11drm/i915: Fix glk watermark calculationsVille Syrjälä1-7/+8
2020-05-11drm/i915/mst: Wait for ACT sent before enabling the pipeVille Syrjälä1-4/+5
2020-05-11drm/i915: Tidy awaiting on dma-fencesChris Wilson1-6/+4
2020-05-11drm/i915: Make intel_timeline_init staticMika Kuoppala2-9/+4
2020-05-11drm/i915/gt: Mark up the racy read of execlists->context_tagChris Wilson1-1/+1
2020-05-09drm/i915: Replace zero-length array with flexible-arrayGustavo A. R. Silva3-4/+4
2020-05-09drm/i915: Replace the hardcoded I915_FENCE_TIMEOUTChris Wilson9-9/+46
2020-05-08drm/i915: Prevent using semaphores to chain up to external fencesChris Wilson2-0/+27
2020-05-08drm/i915: Peel dma-fence-chains for awaitLionel Landwerlin1-1/+28
2020-05-08drm/i915/gt: Improve precision on defer_request assertChris Wilson1-1/+2
2020-05-08drm/i915: Pull waiting on an external dma-fence into its routineChris Wilson1-6/+10
2020-05-08drm/i915: Ignore submit-fences on the same timelineChris Wilson1-0/+3
2020-05-07drm/i915/gen12: Add aux table invalidate for all enginesMika Kuoppala2-5/+87
2020-05-07drm/i915: Remove wait priority boostingChris Wilson6-32/+5
2020-05-07drm/i915: Mark concurrent submissions with a weak-dependencyChris Wilson5-6/+15
2020-05-07drm/i915/gen12: Invalidate aux table entries forciblyMika Kuoppala2-1/+17
2020-05-07drm/i915/gen12: Flush L3Mika Kuoppala1-0/+2
2020-05-07drm/i915/gen12: Fix HDC pipeline flushMika Kuoppala3-21/+44
2020-05-07Revert "drm/i915/tgl: Include ro parts of l3 to invalidate"Mika Kuoppala2-2/+0
2020-05-06drm/i915: Propagate error from completed fencesChris Wilson1-1/+3
2020-05-06drm/i915/icp: Add Wa_14010685332Matt Roper2-0/+9
2020-05-05drm/i915/gt: Stop holding onto the pinned_default_stateChris Wilson5-46/+47
2020-05-05drm/i915/execlists: Record the active CCID from before resetChris Wilson2-1/+8
2020-05-05drm/i915: Added required new PCode commandsStanislav Lisovskiy2-0/+6
2020-05-05drm/i915/tgl+: Fix interrupt handling for DP AUX transactionsImre Deak1-13/+3
2020-05-05drm/i915/gt: Small tidy of gen8+ breadcrumb emissionChris Wilson1-19/+15
2020-05-04drm/i915/selftests: Repeat the rps clock frequency measurementChris Wilson1-14/+40
2020-05-04drm/i915/display: Warn if the FBC is still writing to stolen on removalChris Wilson1-0/+3
2020-05-04drm/i915: Don't enable WaIncreaseLatencyIPCEnabled when IPC is disabledSultan Alsawaf1-1/+1
2020-05-04drm/i915: Streamline the artihmeticVille Syrjälä1-39/+20
2020-05-04drm/i915: Rename variables to be consistent with bspecVille Syrjälä1-13/+17
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