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2021-05-26drm/i915/adl_p: enable MSO on pipe BJani Nikula1-2/+5
2021-05-26drm/i915: Remove the repeated declarationShaokun Zhang1-2/+0
2021-05-25drm/i915/display/adl_p: Disable PSR2José Roberto de Souza1-0/+9
2021-05-25drm/i915/display/adl_p: Allow DC3CO in pipe and port BJosé Roberto de Souza1-4/+16
2021-05-25drm/i915: WA for zero memory channelJosé Roberto de Souza1-1/+1
2021-05-25drm/i915/adl_p: Handle TC coldJosé Roberto de Souza3-8/+14
2021-05-25drm/i915/display/adl_p: Drop earlier return in tc_has_modular_fia()José Roberto de Souza1-4/+2
2021-05-25drm/i915/debugfs: Print remap info for DPT VMAs as wellImre Deak2-3/+19
2021-05-25drm/i915/adlp: Fix GEM VM asserts for DPT VMsImre Deak3-3/+4
2021-05-25drm/i915/adlp: Require DPT FB CCS color planes to be 2MB alignedImre Deak1-2/+11
2021-05-25drm/i915/display: fix typo when returning tableLucas De Marchi1-1/+1
2021-05-24drm/i915/gvt: Add missing macro name changesAnusha Srivatsa1-4/+4
2021-05-21drm/i915: Reenable LTTPR non-transparent LT mode for DPCD_REV<1.4Imre Deak1-38/+33
2021-05-20drm/i915/adl_p: Update memory bandwidth parametersAnusha Srivatsa1-1/+1
2021-05-20drm/i915/adlp: Add PIPE_MISC2 programmingAnusha Srivatsa2-0/+28
2021-05-20drm/i915/adl_p: Program DP/HDMI link rate to DDI_BUF_CTLImre Deak2-3/+34
2021-05-20drm/i915/adl_p: Add PLL SupportAnusha Srivatsa2-17/+60
2021-05-20drm/i915/adl_p: Define and use ADL-P specific DP translation tablesMika Kahola3-1/+63
2021-05-20drm/i915/display: Add PSR interrupt error check functionGwan-gyeong Mun1-18/+29
2021-05-20drm/i915/display: Replace dc3co_enabled with dc3co_exitline on intel_psr structGwan-gyeong Mun2-6/+6
2021-05-20drm/i915/adl_p: Tx escape clock with DSIMika Kahola2-2/+25
2021-05-20drm/i915/adl_p: MBUS programmingVandita Kulkarni6-9/+120
2021-05-20drm/i915: Introduce MBUS relative dbuf offsetsVille Syrjälä1-6/+34
2021-05-20drm/i915/adl_p: Add ddb allocation supportVandita Kulkarni2-5/+138
2021-05-20drm/i915/adl_p: Don't config MBUS and DBUF during display initializationJosé Roberto de Souza1-0/+6
2021-05-20drm/i915/adl_p: Implement TC sequencesJosé Roberto de Souza3-11/+137
2021-05-20drm/i915/adl_p: Setup ports/physAnusha Srivatsa1-2/+11
2021-05-20drm/i915/adl_p: Add dedicated SAGV watermarksMatt Roper4-21/+126
2021-05-20drm/i915/xelpd: Add rc_qp_table for rcparams calculationVandita Kulkarni4-1/+333
2021-05-20drm/i915/xelpd: Calculate VDSC RC parametersVandita Kulkarni1-10/+87
2021-05-20drm/i915/dmc: s/intel_csr.c/intel_dmc.c and s/intel_csr.h/intel_dmc.hAnusha Srivatsa9-17/+17
2021-05-20drm/i915/dmc: Rename functions names having "csr"Anusha Srivatsa5-54/+54
2021-05-20drm/i915/dmc: Rename macro names containing csrAnusha Srivatsa6-118/+117
2021-05-20drm/i915/dmc: s/HAS_CSR/HAS_DMCAnusha Srivatsa7-13/+13
2021-05-20drm/i915/dmc: s/intel_csr/intel_dmcAnusha Srivatsa6-125/+125
2021-05-18drm/i915: Initialize err in remap_io_sg()José Roberto de Souza1-1/+1
2021-05-18drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7Simon Rettberg1-1/+4
2021-05-18Merge drm/drm-next into drm-intel-nextRodrigo Vivi11924-226617/+469847
2021-05-15drm/i915/adl_p: Disable CCS on a-step (Wa_22011186057)José Roberto de Souza1-1/+19
2021-05-15drm/i915/display/adl_p: Implement Wa_22011320316José Roberto de Souza1-1/+20
2021-05-15drm/i915/adl_p: Implement Wa_22011091694José Roberto de Souza2-1/+14
2021-05-15drm/i915/adl_p: Add IPs stepping mappingJosé Roberto de Souza2-1/+19
2021-05-15drm/i915/bigjoiner: atomic commit changes for uncompressed joinerAnimesh Manna4-1/+49
2021-05-15drm/i915/bigjoiner: Avoid dsc_compute_config for uncompressed bigjoinerAnimesh Manna1-2/+6
2021-05-15drm/i915/bigjoiner: Mode validation with uncompressed pipe joinerAnimesh Manna1-2/+5
2021-05-15drm/i915/adl_p: Enable/disable loadgen sharingMika Kahola2-0/+9
2021-05-15drm/i915: Move intel_modeset_all_pipes()Ville Syrjälä3-38/+39
2021-05-15drm/i915/adl_p: Enable modular fiaJosé Roberto de Souza2-0/+5
2021-05-15drm/i915/display/tc: Rename safe_mode functions ownershipJosé Roberto de Souza1-18/+17
2021-05-15drm/i915/adl_p: Add cdclk support for ADL-PAnusha Srivatsa1-13/+28
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