BMC/Intel-BMC/linux.git - Intel OpenBMC Linux kernel source tree (mirror)

Age	Commit message (Collapse)	Author	Files	Lines
2017-09-27	RISC-V: Build Infrastructure	Palmer Dabbelt	9	-0/+579
	This patch contains all the build infrastructure that actually enables the RISC-V port. This includes Makefiles, linker scripts, and Kconfig files. It also contains the only top-level change, which adds RISC-V to the list of architectures that need a sed run to produce the ARCH variable when building locally. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-27	RISC-V: User-facing API	Palmer Dabbelt	27	-0/+1687
	This patch contains code that is in some way visible to the user: including via system calls, the VDSO, module loading and signal handling. It also contains some generic code that is ABI visible. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-27	RISC-V: Paging and MMU	Palmer Dabbelt	8	-0/+1192
	This patch contains code to manage the RISC-V MMU, including definitions of the page tables and the page walking code. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-27	RISC-V: Device, timer, IRQs, and the SBI	Palmer Dabbelt	9	-0/+566
	This patch contains code that interfaces with devices that are mandated by the RISC-V supervisor specification and that don't have explicit drivers anywhere else in the tree. This includes the staticly defined interrupts, the CSR-mapped timer, and virtualized SBI devices. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-27	RISC-V: Task implementation	Palmer Dabbelt	9	-0/+1243
	This patch contains the implementation of tasks on RISC-V, most of which is involved in task switching. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-27	RISC-V: ELF and module implementation	Palmer Dabbelt	4	-0/+187
	This patch contains the code that interfaces with ELF objects on RISC-V systems, the vast majority of which is present to load kernel modules. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-27	RISC-V: Generic library routines and assembly	Palmer Dabbelt	11	-0/+1389
	This patch contains code that is more specific to the RISC-V ISA than it is to Linux. It contains string and math operations, C wrappers for various assembly instructions, stack walking code, and uaccess. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-27	RISC-V: Atomic and Locking Code	Palmer Dabbelt	10	-0/+1423
	This contains all the code that directly interfaces with the RISC-V memory model. While this code corforms to the current RISC-V ISA specifications (user 2.2 and priv 1.10), the memory model is somewhat underspecified in those documents. There is a working group that hopes to produce a formal memory model by the end of the year, but my understanding is that the basic definitions we're relying on here won't change significantly. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2017-09-27	RISC-V: Init and Halt Code	Palmer Dabbelt	15	-0/+1524
	This contains the various __init C functions, the initial assembly kernel entry point, and the code to reset the system. When a file was init-related this patch contains the entire file. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>