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path: root/drivers/clk/x86/clk-st.c
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2020-08-07clk: x86: Change name from ST to FCHAkshu Agrawal1-78/+0
AMD SoC general pupose clk is present in new platforms with minor differences. We can reuse the same clk driver for other platforms. Hence, changing name from ST(SoC) to FCH(IP) Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-08-07ACPI: APD: Change name from ST to FCHAkshu Agrawal1-2/+2
AMD SoC general pupose clk is present in new platforms with same MMIO mappings. We can reuse the same clk handler support for other platforms. Hence, changing name from ST(SoC) to FCH(IP) Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-02-06clk: clk-st: avoid clkdev lookup leak at removeMatti Vaittinen1-1/+2
Use devm based clkdev lookup registration to avoid leaking lookup structures. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-31clk: x86: Set default parent to 48MhzAkshu Agrawal1-1/+1
System clk provided in ST soc can be set to: 48Mhz, non-spread 25Mhz, spread To get accurate rate, we need it to set it at non-spread option which is 48Mhz. Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Fixes: 421bf6a1f061 ("clk: x86: Add ST oscout platform clock") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-05-17clk: x86: Add ST oscout platform clockAkshu Agrawal1-0/+77
Stoney SoC provides oscout clock. This clock can support 25Mhz and 48Mhz of frequency. The clock is available for general system use. Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>