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path: root/drivers/clk
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2016-10-08Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/...Linus Torvalds1-9/+9
2016-10-08Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds1-0/+70
2016-10-08Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds1-41/+5
2016-09-24CLK: Add Loongson1C clock supportYang Ling2-0/+98
2016-09-24clk: Loongson1: Make use of GENMASKKelvin Cheung1-1/+1
2016-09-24clk: Loongson1: Update clocks of Loongson1BKelvin Cheung1-10/+13
2016-09-24clk: Loongson1: Refactor Loongson1 clockKelvin Cheung5-48/+69
2016-09-24clk: zx296718: register driver earlier with core_initcallShawn Guo1-1/+5
2016-09-23clk: mvebu: dynamically allocate resources in Armada CP110 system controllerMarcin Wojtas1-9/+20
2016-09-23clk: mvebu: fix setting unwanted flags in CP110 gate clockMarcin Wojtas1-0/+2
2016-09-21clk: nxp: clk-lpc32xx: Unmap region obtained by of_iomapArvind Yadav1-0/+1
2016-09-21clk: mvebu: Add clk support for the orion5x SoC mv88f5181Jamie Lentin1-0/+70
2016-09-21clk: mediatek: clk-mt8173: Unmap region obtained by of_iomapArvind Yadav1-1/+3
2016-09-21clk: sunxi-ng: Fix reset offset for the A23 and A33Maxime Ripard2-16/+16
2016-09-21clk: at91: sckc: optimize boot timeAlexandre Belloni1-1/+1
2016-09-21clk: at91: Add sama5d4 sckc supportAlexandre Belloni1-0/+100
2016-09-21clk: at91: move slow clock controller clocks to sckc.cAlexandre Belloni3-388/+363
2016-09-21clk: imx6: initialize GPU clocksLucas Stach1-0/+18
2016-09-21clk: imx6: fix i.MX6DL clock tree to reflect realityLucas Stach1-12/+16
2016-09-21clk: imx53: Add clocks configurationKalle Kankare1-0/+20
2016-09-19Merge tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/gi...Arnd Bergmann6-127/+523
2016-09-17clk: uniphier: add clock data for UniPhier SoCsMasahiro Yamada6-0/+416
2016-09-17clk: uniphier: add core support code for UniPhier clock driverMasahiro Yamada10-0/+535
2016-09-17clk: bcm: Add driver for BCM53573 ILP clockRafał Miłecki2-0/+149
2016-09-17clk: Add USB3 PHY reset linesVivek Gautam1-0/+2
2016-09-17clk: zx: fix pointer case warningsArnd Bergmann1-10/+10
2016-09-17clk/Renesas-MSTP: Use kmalloc_array() in cpg_mstp_clocks_init()Markus Elfring1-1/+1
2016-09-17clk: zx296718: use builtin_platform_driver to simplify the codeWei Yongjun1-5/+1
2016-09-17clk: sunxi-ng: sun6i-a31: Fix register offset for mipi-csi clkChen-Yu Tsai1-1/+1
2016-09-17clk: sunxi-ng: sun6i-a31: set CLK_SET_RATE_UNGATE for all PLLsChen-Yu Tsai1-10/+10
2016-09-17clk: sunxi-ng: sun6i-a31: Set CLK_SET_RATE_PARENT for display output clocksChen-Yu Tsai1-9/+13
2016-09-17drivers: clk: st: Handle clk synchronous mode for video clocksGabriel Fernandez1-2/+35
2016-09-17drivers: clk: st: Add clock propagation for audio clocksGabriel Fernandez1-1/+25
2016-09-17drivers: clk: st: Add fs660c32 synthesizer algorithmGabriel Fernandez1-69/+111
2016-09-17drivers: clk: st: Simplify clock binding of STiH4xx platformsGabriel Fernandez3-77/+55
2016-09-17drivers: clk: st: Remove stih415-416 clock supportGabriel Fernandez3-1404/+1
2016-09-15clk: at91: Migrate to clk_hw based registration and OF APIsStephen Boyd13-199/+277
2016-09-15clk: bcm2835: Migrate to clk_hw based registration and OF APIsStephen Boyd2-55/+58
2016-09-15clk: iproc: Make clocks visible optionsJon Mason2-5/+32
2016-09-14clk: xgene: Add PMD clockHoan Tran1-0/+221
2016-09-14clk: zx: register ZX296718 clocksJun Nie3-0/+1050
2016-09-14clk: zx: reform pll config info to ease code extensionJun Nie2-9/+16
2016-09-14clk-kona-setup: Use kmalloc_array() in parent_process()Markus Elfring1-2/+2
2016-09-14ARM: clk-imx35: annotate clk enum with number valuesUwe Kleine-König1-14/+16
2016-09-14ARM: clk-imx35: fix name for ckil clkUwe Kleine-König1-1/+1
2016-09-14clk: gxbb: expose i2c clocksJerome Brunet1-2/+2
2016-09-14clk: gxbb: expose USB clocksMartin Blumenstingl1-5/+5
2016-09-14clk: gxbb: expose spifc clockJerome Brunet1-1/+1
2016-09-14clk: gxbb: expose MPLL2 clock for use by DTMartin Blumenstingl1-1/+1
2016-09-14clk: meson: fix CLKID_GCLK_VENCI_INT typoArnd Bergmann1-1/+1