Age | Commit message (Collapse) | Author | Files | Lines |
|
sc.c:303:26: warning: incorrect type in return expression (different address spaces)
csc.c:188:27: warning: incorrect type in return expression (different address spaces)
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
|
Replace the use of nested functions where a normal function will suffice.
Nested functions are not liked by upstream kernel developers in general. Their
use breaks the use of clang as a compiler, and doesn't make the code any
better.
This code now works for both gcc and clang.
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Behan Webster <behanw@converseincode.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
|
devm_ioremap_resource() returns a pointer to the remapped memory or
an ERR_PTR() encoded error code on failure. Fix the checks inside
csc_create() and sc_create() accordingly.
Cc: Archit Taneja <archit@ti.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Tested-by: Archit Taneja<archit@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
|
Add the required SC register configurations which lets us perform linear scaling
for the supported range of horizontal and vertical scaling ratios.
The horizontal scaler performs polyphase scaling using it's 8 tap 32 phase
filter, decimation is performed when downscaling passes beyond 2x or 4x.
The vertical scaler performs polyphase scaling using it's 5 tap 32 phase filter,
it switches to a simpler form of scaling using the running average filter when
the downscale ratio is more than 4x.
Many of the SC features like peaking, trimming and non-linear scaling aren't
implemented for now. Only the minimal register fields required for basic scaling
operation are configured.
The function to configure SC registers takes the sc_data handle, the source and
destination widths and heights, and the scaler address data block offsets for
the current context so that they can be configured.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
|
The SC block in VPE/VIP contains a SRAM within it. This internal memory
requires to be loaded with appropriate scaler coefficients from a contiguous
block of memory through VPDMA.
The horizontal and vertical scaler each require 2 sets of scaler coefficients
for luma and chroma scaling. The horizontal polyphase scaler requires
coefficients for a 32 phase and 8 tap filter. Similarly, the vertical scaler
requires coefficients for a 5 tap filter.
The choice of the scaler coefficients depends on the scaling ratio. Add
coefficient tables for different scaling ratios in sc_coeffs.h. In the case of
horizontal downscaling, we need to consider the change in ratio caused by
decimation performed by the horizontal scaler.
In order to load the scaler coefficients via VPDMA, a configuration descriptor
is used in block mode. The payload for the descriptor is the scaler coefficients
copied to memory. Coefficients for each phase have to be placed in memory in a
particular order understood by the scaler hardware.
The choice of the scaler coefficients, and the loading of the coefficients from
our tables to a contiguous buffer is managed by the functions
sc_set_hs_coefficients and sc_set_vs_coefficients.
The sc_data handle is now added with some parameters to describe the state of
the coefficients loaded in the SC block. 'loaded_coeff_h' and 'loaded_coeff_v'
hold the address of the last dma buffer which was used by VPDMA to copy
coefficients. This information can be used by a vpe mem-to-mem context to decide
whether it should load coefficients or not. 'hs_index' and 'vs_index' provide
some optimization by preventing loading of coefficients if the scaling ratio
didn't change between 2 contexts. 'load_coeff_h' and 'load_coeff_v' tell the
vpe/vip driver whether we need to load the coefficients through VPDMA or not.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
|
|
VPE and VIP IPs in DAR7x contain a scaler(SC) sub block. Create a library which
will perform scaler block related configurations and hold SC register
definitions. The functions provided by this library will be called by the vpe
and vip drivers using a sc_data handle.
The vpe_dev holds the sc_data handle. The handle represents an instance of the
SC hardware, and the vpe driver uses it to access the scaler register offsets
or helper functions to configure these registers.
We move the SC register definitions to sc.h so that they aren't specific to
VPE anymore. The register offsets are now relative to the sub-block, and not the
VPE IP as a whole. In order for VPDMA to configure registers, it requires it's
offset from the top level VPE module. A macro called GET_OFFSET_TOP is added to
return the offset of the register relative to the VPE IP.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
|