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path: root/drivers/pwm/pwm-meson.c
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2020-04-03pwm: meson: Remove redundant assignment to variable fin_freqColin Ian King1-1/+1
The variable fin_freq is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2020-03-30pwm: meson: Fix confusing indentationKrzysztof Kozlowski1-1/+1
Fix indentation of return block. Smatch warning: drivers/pwm/pwm-meson.c:139 meson_pwm_request() warn: inconsistent indenting Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Fixes: 211ed630753d ("pwm: Add support for Meson PWM Controller") Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-09-21pwm: Ensure pwm_apply_state() doesn't modify the state argumentUwe Kleine-König1-2/+2
It is surprising for a PWM consumer when the variable holding the requested state is modified by pwm_apply_state(). Consider for example a driver doing: #define PERIOD 5000000 #define DUTY_LITTLE 10 ... struct pwm_state state = { .period = PERIOD, .duty_cycle = DUTY_LITTLE, .polarity = PWM_POLARITY_NORMAL, .enabled = true, }; pwm_apply_state(mypwm, &state); ... state.duty_cycle = PERIOD / 2; pwm_apply_state(mypwm, &state); For sure the second call to pwm_apply_state() should still have state.period = PERIOD and not something the hardware driver chose for a reason that doesn't necessarily apply to the second call. So declare the state argument as a pointer to a const type and adapt all drivers' .apply callbacks. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Add documentation to the driverMartin Blumenstingl1-0/+22
Add links to the datasheet and a short summary how the hardware works. The goal is to make it easier for other developers to understand why the pwm-meson driver is implemented the way it is. Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Co-authored-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Add support PWM_POLARITY_INVERSED when disablingMartin Blumenstingl1-1/+22
meson_pwm_apply() has to consider the PWM polarity when disabling the output. With enabled=false and polarity=PWM_POLARITY_NORMAL the output needs to be LOW. The driver already supports this. With enabled=false and polarity=PWM_POLARITY_INVERSED the output needs to be HIGH. Implement this in the driver by internally enabling the output with the same settings that we already use for "period == duty". This fixes a PWM API violation which expects that the driver honors the polarity also for enabled=false. Due to the IP block not supporting this natively we only get "an as close as possible" to 100% HIGH signal (in my test setup with input clock of 24MHz and measuring the output with a logic analyzer at 24MHz sampling rate I got a duty cycle of 99.998475% on a Khadas VIM). Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Don't cache struct pwm_state internallyMartin Blumenstingl1-24/+1
The PWM core already caches the "current struct pwm_state" as the "current state of the hardware registers" inside struct pwm_device. Drop the struct pwm_state from struct meson_pwm_channel in favour of the struct pwm_state in struct pwm_device. While here also drop any checks based on the pwm_state because the PWM core already takes care of this. No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Read the full hardware state in meson_pwm_get_state()Martin Blumenstingl1-3/+49
Update the meson_pwm_get_state() implementation to take care of all information in the registers instead of only reading the "enabled" state. The PWM output is only enabled if two conditions are met: 1. the per-channel clock is enabled 2. the PWM output is enabled Calculate the PWM period and duty cycle using the reverse formula which we already have in meson_pwm_calc() and update struct pwm_state with the results. As result of this /sys/kernel/debug/pwm now shows the PWM state set by the bootloader (or firmware) after booting Linux. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Simplify the calculation of the pre-divider and countMartin Blumenstingl1-15/+10
Replace the loop to calculate the pre-divider and count with two separate div64_u64() calculations. This makes the code easier to read and improves the precision. Three example cases: 1) 32.768kHz LPO clock for the SDIO wifi chip on Khadas VIM clock input: 500MHz (FCLK_DIV4) period: 30518ns duty cycle: 15259ns old algorithm: pre_div=0, cnt=15259 new algorithm: pre_div=0, cnt=15259 (no difference in calculated values) 2) PWM LED on Khadas VIM clock input: 24MHz (XTAL) period: 7812500ns duty cycle: 7812500ns old algorithm: pre_div=2, cnt=62004 new algorithm: pre_div=2, cnt=62500 Using a scope (24MHz sampling rate) shows the actual difference: - old: 7753000ns, off by -59500ns (0.7616%) - new: 7815000ns, off by +2500ns (0.032%) 3) Theoretical case where pre_div is different clock input: 24MHz (XTAL) period: 2730624ns duty cycle: 1365312ns old algorithm: pre_div=1, cnt=32768 new algorithm: pre_div=0, cnt=65534 Using a scope (24MHz sampling rate) shows the actual difference: - old: 2731000ns - new: 2731000ns (my scope is not precise enough to measure the difference if there's any) Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Move pwm_set_chip_data() to meson_pwm_request()Martin Blumenstingl1-14/+8
All existing PWM drivers (except pwm-meson and two other ones) call pwm_set_chip_data() from their pwm_ops.request() callback. Now that we can access the struct meson_pwm_channel from struct meson_pwm we can do the same. Move the call to pwm_set_chip_data() to meson_pwm_request() and drop the custom meson_pwm_add_channels(). This makes the implementation consistent with other drivers and makes it slightly more obvious thatpwm_get_chip_data() cannot be used from pwm_ops.get_state() (because that's called by the PWM core before pwm_ops.request()). No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Add the per-channel register offsets and bits in a structMartin Blumenstingl1-56/+34
Introduce struct meson_pwm_channel_data which contains the per-channel offsets for the PWM register and REG_MISC_AB bits. Replace the existing switch (pwm->hwpwm) statements with an access to the new struct. This simplifies the code and will make it easier to implement pwm_ops.get_state() because the switch-case which all per-channel registers and offsets (as previously implemented in meson_pwm_enable()) doesn't have to be duplicated. No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Add the meson_pwm_channel data to struct meson_pwmMartin Blumenstingl1-15/+10
Make struct meson_pwm_channel accessible from struct meson_pwm. PWM core has a limitation: per-channel data can only be set after pwmchip_add() is called. However, pwmchip_add() internally calls pwm_ops.get_state(). If pwm_ops.get_state() needs access to the per-channel data it has to obtain it from struct pwm_chip and struct pwm_device's hwpwm information. Add a struct meson_pwm_channel for each PWM channel to struct meson_pwm so the pwm_ops.get_state() callback can be implemented as it needs access to the clock from struct meson_pwm_channel. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Pass struct pwm_device to meson_pwm_calc()Martin Blumenstingl1-3/+3
meson_pwm_calc() is the last function that accepts a struct meson_pwm_channel. meson_pwm_enable(), meson_pwm_disable() and meson_pwm_apply() for example are all taking a struct pwm_device as parameter. When they need the struct meson_pwm_channel these functions simply call pwm_get_chip_data() internally. Make meson_pwm_calc() consistent with the other functions in the meson-pwm driver by passing struct pwm_device to it as well. The value of the "id" parameter is actually pwm->hwpwm, but the driver never read the "id" parameter, which is why there's no replacement for it in the new code. No functional changes. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Don't duplicate the polarity internallyMartin Blumenstingl1-15/+8
Let meson_pwm_calc() use the polarity from struct pwm_state directly. This removes a level of indirection where meson_pwm_apply() first had to set a driver-internal inverter mask which was then only used by meson_pwm_calc(). Instead of adding the polarity as parameter to meson_pwm_calc() switch to struct pwm_state directly to make it easier to see where the parameters are actually coming from. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Change MISC_CLK_SEL_WIDTH to MISC_CLK_SEL_MASKMartin Blumenstingl1-2/+2
MISC_CLK_SEL_WIDTH is only used in one place where it's converted into a bit-mask. Rename and change the macro to be a bit-mask so that conversion is not needed anymore. No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Use GENMASK and FIELD_PREP for the lo and hi valuesMartin Blumenstingl1-2/+6
meson_pwm_calc() ensures that "lo" is always less than 16 bits wide (otherwise it would overflow into the "hi" part of the REG_PWM_{A,B} register). Use GENMASK and FIELD_PREP for the lo and hi values to make it easier to spot how wide these are internally. Additionally this is a preparation step for the .get_state() implementation where the GENMASK() for lo and hi becomes handy because it can be used with FIELD_GET() to extract the values from the register REG_PWM_{A,B} register. No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Use devm_clk_get_optional() to get the input clockMartin Blumenstingl1-8/+3
Simplify the code which fetches the input clock for a PWM channel by using devm_clk_get_optional(). This comes with a small functional change: previously all errors except EPROBE_DEFER were ignored. Now all other errors are also treated as errors. If no input clock is present devm_clk_get_optional() will return NULL instead of an error which matches the behavior of the old code. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Unify the parameter list of meson_pwm_{enable, disable}Martin Blumenstingl1-8/+7
This is a preparation for a future cleanup. Pass struct pwm_device instead of passing the individual values required by each function as these can be obtained for each struct pwm_device instance. As a nice side-effect the driver now uses "switch (pwm->hwpwm)" everywhere. Before some functions used "switch (id)" while others used "switch (pwm->hwpwm)". No functional changes. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25pwm: meson: Fix the G12A AO clock parents orderNeil Armstrong1-2/+11
The Amlogic G12A and G12B Documentation is wrong, the AO xtal and clk81 clock source order is reversed, and validated when adding DVFS support by using the PWM AO D output to control the CPU supply voltage. The vendor tree also uses the reversed xtal and clk81 order at [1]. [1] https://github.com/hardkernel/linux/blob/odroidn2-4.9.y/drivers/amlogic/pwm/pwm_meson.c#L462 Fixes: f41efceb46e6 ("pwm: meson: Add clock source configuration for Meson G12A") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25pwm: meson: Update with SPDX Licence identifierNeil Armstrong1-51/+1
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-05-10Merge tag 'pwm/for-5.2-rc1' of ↵Linus Torvalds1-15/+49
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "Nothing out of the ordinary this cycle. The bulk of this is a collection of fixes for existing drivers and some cleanups. There's one new driver for i.MX SoCs and addition of support for some new variants to existing drivers" * tag 'pwm/for-5.2-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: meson: Add clock source configuration for Meson G12A dt-bindings: pwm: Update bindings for the Meson G12A Family pwm: samsung: Don't uses devm_*() functions in ->request() pwm: Clear chip_data in pwm_put() pwm: Add i.MX TPM PWM driver support dt-bindings: pwm: Add i.MX TPM PWM binding pwm: imx27: Use devm_platform_ioremap_resource() to simplify code pwm: meson: Use the spin-lock only to protect register modifications pwm: meson: Don't disable PWM when setting duty repeatedly pwm: meson: Consider 128 a valid pre-divider pwm: sysfs: fix typo "its" -> "it's" pwm: tiehrpwm: Enable compilation for ARCH_K3 dt-bindings: pwm: tiehrpwm: Add TI AM654 SoC specific compatible pwm: tiehrpwm: Update shadow register for disabling PWMs pwm: img: Turn final 'else if' into 'else' in img_pwm_config pwm: Fix deadlock warning when removing PWM device
2019-05-09pwm: meson: Add clock source configuration for Meson G12ANeil Armstrong1-0/+30
For the PWM controller in the Meson G12A SoC, the EE domain and AO domain have different clock sources. This patch tries to describe them in the DT compatible data. The two AO PWM controller has different clock source, but the first AO controller (A & B) can reuse the AXG parents name. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-05-09pwm: meson: Use the spin-lock only to protect register modificationsMartin Blumenstingl1-8/+17
Holding the spin-lock for all of the code in meson_pwm_apply() can result in a "BUG: scheduling while atomic". This can happen because clk_get_rate() (which is called from meson_pwm_calc()) may sleep. Only hold the spin-lock when modifying registers to solve this. The reason why we need a spin-lock in the driver is because the REG_MISC_AB register is shared between the two channels provided by one PWM controller. The only functions where REG_MISC_AB is modified are meson_pwm_enable() and meson_pwm_disable() so the register reads/writes in there need to be protected by the spin-lock. The original code also used the spin-lock to protect the values in struct meson_pwm_channel. This could be necessary if two consumers can use the same PWM channel. However, PWM core doesn't allow this so we don't need to protect the values in struct meson_pwm_channel with a lock. Fixes: 211ed630753d2f ("pwm: Add support for Meson PWM Controller") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-05-09pwm: meson: Don't disable PWM when setting duty repeatedlyBichao Zheng1-5/+0
There is an abnormally low about 20ms,when setting duty repeatedly. Because setting the duty will disable PWM and then enable. Delete this operation now. Fixes: 211ed630753d2f ("pwm: Add support for Meson PWM Controller") Signed-off-by: Bichao Zheng <bichao.zheng@amlogic.com> [ Dropped code instead of hiding it behind a comment ] Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-05-09pwm: meson: Consider 128 a valid pre-dividerMartin Blumenstingl1-2/+2
The pre-divider allows configuring longer PWM periods compared to using the input clock directly. The pre-divider is 7 bit wide, meaning it's maximum value is 128 (the register value is off-by-one: 0x7f or 127). Change the loop to also allow for the maximum possible value to be considered valid. Fixes: 211ed630753d2f ("pwm: Add support for Meson PWM Controller") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-04-26clk: Remove CLK_IS_BASIC clk flagStephen Boyd1-1/+1
This flag was historically used to indicate that a clk is a "basic" type of clk like a mux, divider, gate, etc. This never turned out to be very useful though because it was hard to cleanly split "basic" clks from other clks in a system. This one flag was a way for type introspection and it just didn't scale. If anything, it was used by the TI clk driver to indicate that a clk_hw wasn't contained in the SoC specific clk structure. We can get rid of this define now that TI is finding those clks a different way. Cc: Tero Kristo <t-kristo@ti.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: <linux-mips@vger.kernel.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Kevin Hilman <khilman@baylibre.com> Cc: <linux-pwm@vger.kernel.org> Cc: <linux-amlogic@lists.infradead.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-20pwm: meson: Fix mux clock namesJerome Brunet1-2/+1
Current clock name looks like this: /soc/bus@ffd00000/pwm@1b000#mux0 This is bad because CCF uses the clock to create a directory in clk debugfs. With such name, the directory creation (silently) fails and the debugfs entry end up being created at the debugfs root. With this change, the clock name will now be: ffd1b000.pwm#mux0 This matches the clock naming scheme used in the ethernet and mmc driver. It also fixes the problem with debugfs. Fixes: 36af66a79056 ("pwm: Convert to using %pOF instead of full_name") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-04-30pwm: meson: Fix allocation of PWM channel arrayMartin Blumenstingl1-2/+2
Using the pwm-meson driver on the 32-bit SoCs causes memory corruption. The result are some hard-to-explain errors, for example devm_clk_register() crashes with a NULL dereference somewhere deep in the common clock framework code. In some cases the kernel even refused to boot when any of the PWM controllers were enabled on Meson8b. The root cause is an incorrect memory size in the devm_kcalloc() call in meson_pwm_probe(). The code allocates an array of meson_pwm_channel structs, but the size given is the size of the meson_pwm struct (which seems like a small copy-and-paste error, as meson_pwm is allocated a few lines above). Even with this typo the code seemed to work fine on the 64-bit GX SoCs (maybe due to the structs having the same size in the compiled result, but I haven't checked this further). Fixes: 211ed630753d2f ("pwm: Add support for Meson PWM Controller") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-12-05pwm: meson: Add clock source configuration for Meson-AXGJian Hu1-0/+26
For PWM controller in the Meson-AXG SoC, the EE domain and AO domain have different clock sources. This patch tries to describe them in the DT compatible data. Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-07-25pwm: Convert to using %pOF instead of full_nameRob Herring1-1/+1
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: linux-pwm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-07-06pwm: meson: Improve PWM calculation precisionJerome Brunet1-6/+10
When using input clocks with high rates, such as clk81 (166MHz), the fin_ns = NSEC_PER_SEC / fin_freq can introduce a significant error. Ex: fin_freq = 166666667, NSEC_PER_SEC = 1000000000 fin_ns = 5,9999999 which is, of course, rounded down to 5. This introduces an error of ~20% on the period requested from the PWM. This patch uses ps instead of ns (and 64 bit integers) to perform the calculation. This should give a good enough precision. Fixes: 211ed630753d ("pwm: Add support for Meson PWM Controller") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> squash! pwm: meson: Improve pwm calculation precision
2017-07-06pwm: meson: Add compatible for the gxbb ao PWMsJerome Brunet1-3/+29
On the gxbb (and gxl) family, the PWMs of the AO domain require a specific compatible because the possible input clocks are different from the EE PWMs input clocks. Since the number of possible input clocks is also different, the 'num_parents' field is added to all the Meson PWM data. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-12-15Merge tag 'pwm/for-4.10-rc1' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This is a very tiny pull request, with just a new driver for HiSilicon BVT SoCs and a cleanup for the Amlogic Meson driver. There are other patches on the list, but my timing was really bad this time and I ended up not having the time to look at them in enough detail to be comfortable merging them" * tag 'pwm/for-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: Add PWM driver for HiSilicon BVT SOCs pwm: meson: Remove unneeded platform MODULE_ALIAS
2016-10-21pwm: meson: Remove unneeded platform MODULE_ALIASJavier Martinez Canillas1-1/+0
The Amlogic Meson is a DT-only platform, which means the devices are registered via OF and not using the legacy platform devices support. So there's no need to have a MODULE_ALIAS("platform:meson-pwm") since the reported uevent MODALIAS to user-space will always be the OF one. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-10-21pwm: meson: Add missing spin_lock_init()Axel Lin1-0/+1
The driver uses the spin_lock but does not initialize it. Fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-09-08pwm: meson: Handle unknown ID valuesArnd Bergmann1-0/+9
When building with -Wmaybe-uninitialized, we get a couple of harmless warnings about three functions in this new driver that don't look safe to the compiler: drivers/pwm/pwm-meson.c: In function 'meson_pwm_get_state': drivers/pwm/pwm-meson.c:355:26: error: 'mask' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c: In function 'meson_pwm_disable': drivers/pwm/pwm-meson.c:263:13: error: 'enable' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c: In function 'meson_pwm_apply': drivers/pwm/pwm-meson.c:231:13: error: 'clk_shift' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c:231:36: error: 'enable' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c:231:24: error: 'clk_enable' may be used uninitialized in this function [-Werror=maybe-uninitialized] Specifically, if we have a device with an ID other than 0 or 1, this would result in undefined behavior. This is currently not possible, but the compiler cannot be expected to know this. This patch adds a 'default' clause to let the compiler know what to do instead, which shuts up the warning and makes the code slightly more resiliant in case it gets extended to other identifiers. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-09-08pwm: Add support for Meson PWM ControllerNeil Armstrong1-0/+520
Add support for the PWM controller found in the Amlogic SoCs. This driver supports the Meson8b and GXBB SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>