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2021-06-14ASoC: mchp-i2s-mcc: Use devm_platform_get_and_ioremap_resource()Yang Yingliang1-2/+1
Use devm_platform_get_and_ioremap_resource() to simplify code. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20210611044256.3899583-1-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-03-10ASoC: mchp-i2s-mcc: Add FIFOs supportCodrin Ciubotariu1-20/+56
I2S-MCC found on SAMA7G5 includes 2 FIFOs (capture and playback). When FIFOs are enabled, bits I2SMCC_ISRA.TXLRDYx and I2SMCC_ISRA.TXRRDYx must not be used. Bits I2SMCC_ISRB.TXFFRDY and I2SMCC_ISRB.RXFFRDY must be used instead. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20210301170905.835091-7-codrin.ciubotariu@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-03-10ASoC: mchp-i2s-mcc: Add support to select TDM pinsCodrin Ciubotariu1-4/+48
SAMA7G5's I2S-MCC has 4 pairs of DIN/DOUT pins. Since TDM only uses a single pair of pins for synchronous capture and playback, the controller needs to be told which of the pair is connected. This can be mentioned using the "microchip,tdm-data-pair" property from DT. The property is optional, useful only if TDM is used. If it's missing, DIN/DOUT 0 pins will be used by default. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20210301170905.835091-6-codrin.ciubotariu@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-03-10ASoC: mchp-i2s-mcc: Add multi-channel support for I2S and LEFT_J formatsCodrin Ciubotariu1-0/+38
The latest I2S-MCC available in SAMA7G5 supports multi-channel for I2S and Left-Justified formats. For this, the new version uses 8 (4 * 2) input and output pins, with each pin being responsible for 2 channels. This sums up to a total of 8 channels for synchronous capture and playback. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20210301170905.835091-4-codrin.ciubotariu@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-03-10ASoC: mchp-i2s-mcc: Add compatible for SAMA7G5Codrin Ciubotariu1-0/+3
Microchip's new SAMA7G5 includes an updated I2S-MCC compatible with the previous version found on SAM9X60. The new controller includes 8 (4 * 2) input and output data pins for up to 8 channels for I2S and Left-Justified formats. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20210301170905.835091-3-codrin.ciubotariu@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-21ASoC: atmel: sync parameter naming (rate/sample_bits)Kuninori Morimoto1-2/+2
This patch syncs naming rule. - xxx_rates; + xxx_rate; - xxx_samplebits; + xxx_sample_bits; Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87turiolio.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-24treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva1-1/+1
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
2020-03-26ASoC: mchp-i2s-mcc: make signed 1 bit bitfields unsignedColin Ian King1-4/+4
The signed 1 bit bitfields should be unsigned, so make them unsigned. Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20200325132913.110115-1-colin.king@canonical.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-09Merge branch 'asoc-5.4' into asoc-nextMark Brown1-33/+37
2019-08-20ASoC: mchp-i2s-mcc: Fix simultaneous capture and playback in master modeCodrin Ciubotariu1-33/+37
This controller supports capture and playback running at the same time, with the limitation that both capture and playback must be configured the same way (sample rate, sample format, number of channels, etc). For this, we have to assure that the configuration registers look the same when capture and playback are initiated. This patch fixes a bug in which the controller is in master mode and the hw_params() callback fails for the second audio stream. The fail occurs because the divisors are calculated after comparing the configuration registers for capture and playback. The fix consists in calculating the divisors before comparing the configuration registers. BCLK and LRC are then configured and started only if the controller is not already running. Fixes: 7e0cdf545a55 ("ASoC: mchp-i2s-mcc: add driver for I2SC Multi-Channel Controller") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20190820162411.24836-4-codrin.ciubotariu@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20ASoC: mchp-i2s-mcc: Wait for RX/TX RDY only if controller is runningCodrin Ciubotariu1-12/+16
Since hw_free() can be called multiple times and not just after a stop trigger command, we should check whether the RX or TX ready interrupt was truly enabled previously. For this, we assure that the condition of the wait event is always true, except when RX/TX interrupts are enabled. Fixes: 7e0cdf545a55 ("ASoC: mchp-i2s-mcc: add driver for I2SC Multi-Channel Controller") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20190820162411.24836-3-codrin.ciubotariu@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20ASoC: mchp-i2s-mcc: Fix unprepare of GCLKCodrin Ciubotariu1-2/+11
If hw_free() gets called after hw_params(), GCLK remains prepared, preventing further use of it. This patch fixes this by unpreparing the clock in hw_free() or if hw_params() gets an error. Fixes: 7e0cdf545a55 ("ASoC: mchp-i2s-mcc: add driver for I2SC Multi-Channel Controller") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20190820162411.24836-2-codrin.ciubotariu@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-03-21ASoC: mchp-i2s-mcc: add driver for I2SC Multi-Channel ControllerCodrin Ciubotariu1-0/+974
The Inter-IC Sound Controller (I2SMCC) provides a 5-wire, bidirectional, synchronous, digital audio link to external audio devices: I2SMCC_DIN, I2SMCC_DOUT, I2SMCC_WS, I2SMCC_CK, and I2SMCC_MCK pins. The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and supports a Time Division Multiplexed (TDM) interface with external multi-channel audio codecs. The I2SMCC consists of a receiver, a transmitter and a common clock generator that can be enabled separately to provide Master, Slave or Controller modes with receiver and/or transmitter active. DMA Controller channels, separate for the receiver and for the transmitter, allow a continuous high bit rate data transfer without processor intervention to the following: - Audio CODECs in Master, Slave, or Controller mode - Stereo DAC or ADC through a dedicated I2S serial interface - Multi-channel or multiple stereo DACs or ADCs, using the TDM format This IP is embedded in Microchip's new sam9x60 SoC. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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