From 00d5d14c757832693f3cc61f846ecb61a3c95590 Mon Sep 17 00:00:00 2001 From: George Hung Date: Thu, 23 May 2019 20:27:33 +0800 Subject: edac: npcm: Add Nuvoton NPCM7xx EDAC driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for the Nuvoton NPCM7xx SoC EDAC driver NPCM7xx ECC datasheet from nuvoton.israel-Poleg: "Cadence DDR Controller User’s Manual For DDR3 & DDR4 Memories" Tested: Forcing an ECC error event Write a value to the xor_check_bits parameter that will trigger an ECC event once that word is read For example, to force a single-bit correctable error on bit 0 of the user-word space shown, write 0x75 into that byte of the xor_check_bits parameter and then assert fwc (force write check) bit to 'b1' (mem base: 0xf0824000, xor_check_bits reg addr: 0x178) $ devmem 0xf0824178 32 0x7501 To force a double-bit un-correctable error for the user-word space, write 0x03 into that byte of the xor_check_bits parameter $ devmem 0xf0824178 32 0x301 OpenBMC-Staging-Count: 9 Signed-off-by: George Hung Reviewed-by: Avi Fishman Signed-off-by: Joel Stanley --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 65ae77cd5ac8..5aef58894e9b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6796,6 +6796,12 @@ L: linux-edac@vger.kernel.org S: Maintained F: drivers/edac/mpc85xx_edac.[ch] +EDAC-NPCM7XX +M: George Hung +S: Maintained +F: drivers/edac/npcm7xx_edac.c +F: Documentation/devicetree/bindings/edac/npcm7xx-sdram-edac.txt + EDAC-PASEMI M: Egor Martovetsky L: linux-edac@vger.kernel.org -- cgit v1.2.3