From 091bc3a4049cb0cb28b8e3e71d8738387b91a007 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Mon, 13 Jul 2015 17:12:44 +0100 Subject: MIPS: tlb-r4k: panic if the MMU doesn't support PAGE_SIZE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit After writing the appropriate mask to the cop0 PageMask register, read the register back & check it matches what we want. If it doesn't then the MMU does not support the page size the kernel is configured for and we're better off bailing than continuing to do odd things with TLB exceptions. Signed-off-by: Paul Burton Cc: Steven J. Hill Cc: Joshua Kinard Cc: Rafał Miłecki Cc: James Hogan Cc: Markos Chandras Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10691/ Signed-off-by: Ralf Baechle --- arch/mips/mm/tlb-r4k.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/mips/mm/tlb-r4k.c') diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 5037d5868cef..c17d7627f872 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -486,6 +487,10 @@ static void r4k_tlb_configure(void) * be set to fixed-size pages. */ write_c0_pagemask(PM_DEFAULT_MASK); + back_to_back_c0_hazard(); + if (read_c0_pagemask() != PM_DEFAULT_MASK) + panic("MMU doesn't support PAGE_SIZE=0x%lx", PAGE_SIZE); + write_c0_wired(0); if (current_cpu_type() == CPU_R10000 || current_cpu_type() == CPU_R12000 || -- cgit v1.2.3