From 8c1ee96a2febee5a1dfb0e9d96c8f28a98f0a16b Mon Sep 17 00:00:00 2001 From: Shunli Wang Date: Fri, 4 Nov 2016 15:43:06 +0800 Subject: reset: mediatek: Add MT2701 reset driver In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Acked-by: Philipp Zabel Signed-off-by: Stephen Boyd --- drivers/clk/mediatek/clk-mt2701-hif.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'drivers/clk/mediatek/clk-mt2701-hif.c') diff --git a/drivers/clk/mediatek/clk-mt2701-hif.c b/drivers/clk/mediatek/clk-mt2701-hif.c index 452581cf28d7..18f3723be3e8 100644 --- a/drivers/clk/mediatek/clk-mt2701-hif.c +++ b/drivers/clk/mediatek/clk-mt2701-hif.c @@ -58,12 +58,16 @@ static int clk_mt2701_hif_probe(struct platform_device *pdev) clk_data); r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); - if (r) + if (r) { dev_err(&pdev->dev, "could not register clock provider: %s: %d\n", pdev->name, r); + return r; + } + + mtk_register_reset_controller(node, 1, 0x34); - return r; + return 0; } static struct platform_driver clk_mt2701_hif_drv = { -- cgit v1.2.3