// SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com // Copyright 2018 Google, Inc. /dts-v1/; #include "nuvoton-npcm750.dtsi" / { model = "Nuvoton npcm750 Development Board (Device Tree)"; compatible = "nuvoton,npcm750"; aliases { ethernet0 = &emc0; ethernet1 = &emc1; ethernet2 = &gmac0; ethernet3 = &gmac1; serial0 = &serial0; serial1 = &serial1; serial2 = &serial2; serial3 = &serial3; udc0 = &udc0; udc1 = &udc1; udc2 = &udc2; udc3 = &udc3; udc4 = &udc4; udc5 = &udc5; udc6 = &udc6; udc7 = &udc7; udc8 = &udc8; udc9 = &udc9; emmc0 = &sdhci0; emmc1 = &sdhci1; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; i2c6 = &i2c6; i2c7 = &i2c7; i2c8 = &i2c8; i2c9 = &i2c9; i2c10 = &i2c10; i2c11 = &i2c11; i2c12 = &i2c12; i2c13 = &i2c13; i2c14 = &i2c14; i2c15 = &i2c15; spi0 = &spi0; spi1 = &spi1; fiu0 = &fiu0; fiu1 = &fiu3; fiu2 = &fiux; }; chosen { stdout-path = &serial3; }; memory { reg = <0 0x40000000>; }; regulators { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>; reg_vref1_2: regulator@0 { compatible = "regulator-fixed"; reg = <0>; regulator-name = "vref_1_2v"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; reg_vref3_3: regulator@1 { compatible = "regulator-fixed"; reg = <0>; regulator-name = "vref_3_3v"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; }; ahb { gmac0: eth@f0802000 { phy-mode = "rgmii-id"; status = "okay"; }; gmac1: eth@f0804000 { phy-mode = "rgmii-id"; status = "okay"; }; emc0: eth@f0825000 { phy-mode = "rmii"; #use-ncsi; /* add this to support ncsi */ status = "okay"; }; emc1: eth@f0826000 { phy-mode = "rmii"; #use-ncsi; /* add this to support ncsi */ status = "okay"; }; ehci1: usb@f0806000 { status = "okay"; }; ohci1: ohci@f0807000 { status = "okay"; }; udc0:udc@f0830000 { status = "okay"; }; udc1:udc@f0831000 { status = "okay"; }; udc2:udc@f0832000 { status = "okay"; }; udc3:udc@f0833000 { status = "okay"; }; udc4:udc@f0834000 { status = "okay"; }; udc5:udc@f0835000 { status = "okay"; }; udc6:udc@f0836000 { status = "okay"; }; udc7:udc@f0837000 { status = "okay"; }; udc8:udc@f0838000 { status = "okay"; }; udc9:udc@f0839000 { status = "okay"; }; aes:aes@f0858000 { status = "okay"; }; sha:sha@f085a000 { status = "okay"; }; fiu0: fiu@fb000000 { status = "okay"; spi-nor@0 { compatible = "jedec,spi-nor"; #address-cells = <1>; #size-cells = <1>; spi-rx-bus-width = <2>; reg = <0>; partitions@80000000 { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; bbuboot1@0 { label = "bb-uboot-1"; reg = <0x0000000 0x80000>; read-only; }; bbuboot2@80000 { label = "bb-uboot-2"; reg = <0x0080000 0x80000>; read-only; }; envparam@100000 { label = "env-param"; reg = <0x0100000 0x40000>; read-only; }; spare@140000 { label = "spare"; reg = <0x0140000 0xC0000>; }; kernel@200000 { label = "kernel"; reg = <0x0200000 0x400000>; }; rootfs@600000 { label = "rootfs"; reg = <0x0600000 0x700000>; }; spare1@D00000 { label = "spare1"; reg = <0x0D00000 0x200000>; }; spare2@0F00000 { label = "spare2"; reg = <0x0F00000 0x200000>; }; spare3@1100000 { label = "spare3"; reg = <0x1100000 0x200000>; }; spare4@1300000 { label = "spare4"; reg = <0x1300000 0x0>; }; }; }; }; fiu3: fiu@c0000000 { pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>; status = "okay"; spi-nor@0 { compatible = "jedec,spi-nor"; #address-cells = <1>; #size-cells = <1>; spi-rx-bus-width = <2>; reg = <0>; partitions@A0000000 { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; system1@0 { label = "spi3-system1"; reg = <0x0 0x0>; }; }; }; }; fiux: fiu@fb001000 { spix-mode; }; sdhci0: sdhci@f0842000 { status = "okay"; }; sdhci1: sdhci@f0840000 { status = "okay"; }; pcimbox: pcimbox@f0848000 { status = "okay"; }; vcd: vcd@f0810000 { status = "okay"; }; ece: ece@f0820000 { status = "okay"; }; apb { watchdog1: watchdog@901C { status = "okay"; }; rng: rng@b000 { status = "okay"; }; serial0: serial@1000 { status = "okay"; }; serial1: serial@2000 { status = "okay"; }; serial2: serial@3000 { status = "okay"; }; serial3: serial@4000 { status = "okay"; }; adc: adc@c000 { /* enable external vref */ /*vref-supply = <®_vref1_2>;*/ status = "okay"; }; otp:otp@189000 { status = "okay"; }; lpc_kcs: lpc_kcs@7000 { kcs1: kcs1@0 { status = "okay"; }; kcs2: kcs2@0 { status = "okay"; }; kcs3: kcs3@0 { status = "okay"; }; }; lpc_host: lpc_host@7000 { lpc_bpc: lpc_bpc@40 { monitor-ports = <0x80>; status = "okay"; }; }; /* lm75 on SVB */ i2c0: i2c@80000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; lm75@48 { compatible = "lm75"; reg = <0x48>; status = "okay"; }; }; /* lm75 on EB */ i2c1: i2c@81000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; lm75@48 { compatible = "lm75"; reg = <0x48>; status = "okay"; }; }; /* tmp100 on EB */ i2c2: i2c@82000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; tmp100@48 { compatible = "tmp100"; reg = <0x48>; status = "okay"; }; }; /* tmp100 on SVB */ i2c6: i2c@86000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; tmp100@48 { compatible = "tmp100"; reg = <0x48>; status = "okay"; }; }; i2c3: i2c@83000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; }; i2c4: i2c@84000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "disabled"; }; i2c5: i2c@85000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; }; i2c7: i2c@87000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; }; i2c8: i2c@88000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; }; i2c9: i2c@89000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; }; i2c10: i2c@8a000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; }; i2c11: i2c@8b000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; }; i2c14: i2c@8e000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; status = "okay"; }; i2c15: i2c@8f000 { #address-cells = <1>; #size-cells = <0>; bus-frequency = <100000>; /* SVB conflict with pspi2 cs gpio20o_pins */ status = "disabled"; }; pwm_fan:pwm-fan-controller@103000 { status = "okay"; fan@0 { reg = <0x00>; fan-tach-ch = /bits/ 8 <0x00 0x01>; cooling-levels = <127 255>; }; fan@1 { reg = <0x01>; fan-tach-ch = /bits/ 8 <0x02 0x03>; cooling-levels = /bits/ 8 <127 255>; }; fan@2 { reg = <0x02>; fan-tach-ch = /bits/ 8 <0x04 0x05>; cooling-levels = /bits/ 8 <127 255>; }; fan@3 { reg = <0x03>; fan-tach-ch = /bits/ 8 <0x06 0x07>; cooling-levels = /bits/ 8 <127 255>; }; fan@4 { reg = <0x04>; fan-tach-ch = /bits/ 8 <0x08 0x09>; cooling-levels = /bits/ 8 <127 255>; }; fan@5 { reg = <0x05>; fan-tach-ch = /bits/ 8 <0x0A 0x0B>; cooling-levels = /bits/ 8 <127 255>; }; fan@6 { reg = <0x06>; fan-tach-ch = /bits/ 8 <0x0C 0x0D>; cooling-levels = /bits/ 8 <127 255>; }; fan@7 { reg = <0x07>; fan-tach-ch = /bits/ 8 <0x0E 0x0F>; cooling-levels = /bits/ 8 <127 255>; }; }; spi0: spi@200000 { cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; status = "okay"; Flash@0 { compatible = "winbond,w25q128", "jedec,spi-nor"; reg = <0x0>; #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <5000000>; partition@0 { label = "spi0_spare1"; reg = <0x0000000 0x800000>; }; partition@1 { label = "spi0_spare2"; reg = <0x800000 0x0>; }; }; }; spi1: spi@201000 { cs-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; status = "okay"; Flash@0 { compatible = "winbond,w25q128fw", "jedec,spi-nor"; reg = <0x0>; #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <5000000>; partition@0 { label = "spi1_spare1"; reg = <0x0000000 0x800000>; }; partition@1 { label = "spi1_spare2"; reg = <0x800000 0x0>; }; }; }; }; }; pinctrl: pinctrl@f0800000 { pinctrl-names = "default"; pinctrl-0 = < &iox1_pins &gpio8_pins &gpio9o_pins &gpio10_pins &gpio11o_pins &gpio16_pins &gpio24o_pins &gpio25ol_pins &gpio32o_pins &jtag2_pins &gpio61o_pins &gpio62o_pins &gpio63o_pins &gpio64o_pins /* SVB pspi1 enable */ &gpio80_pins &gpio81_pins &gpio82_pins &gpio83_pins &lpc_pins &gpio132_pins &gpio133_pins &gpio134_pins &gpio135_pins &gpio144_pins &gpio145_pins &gpio146_pins &gpio147_pins &gpio160_pins &gpio162_pins &gpio168_pins &gpio169_pins &gpio170_pins &gpio187o_pins &gpio190_pins &gpio191o_pins &gpio192o_pins &gpio197ol_pins &ddc_pins &gpio218_pins &gpio219ol_pins &gpio220ol_pins &gpio221o_pins &gpio222_pins &gpio223ol_pins &spix_pins &gpio228ol_pins &gpio231o_pins &gpio255_pins>; }; }; &gcr { serial_port_mux: mux-controller { compatible = "mmio-mux"; #mux-control-cells = <1>; mux-reg-masks = <0x38 0x07>; idle-states = <2>; /* Serial port mode 3 (takeover) */ }; }; &peci0 { cmd-timeout-ms = <1000>; pull-down = <0>; host-neg-bit-rate = <15>; status = "okay"; intel-peci-dimmtemp@30 { compatible = "intel,peci-client"; reg = <0x30>; status = "okay"; }; };