// SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com // Copyright 2018 Google, Inc. #include "nuvoton-common-npcm7xx.dtsi" #include "nuvoton-npcm750-gpio.dtsi" / { #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&gic>; cpus { #address-cells = <1>; #size-cells = <0>; enable-method = "nuvoton,npcm750-smp"; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; clocks = <&clk NPCM7XX_CLK_CPU>; clock-names = "clk_cpu"; reg = <0>; next-level-cache = <&l2>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; clocks = <&clk NPCM7XX_CLK_CPU>; clock-names = "clk_cpu"; reg = <1>; next-level-cache = <&l2>; }; }; soc { timer@3fe600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x3fe600 0x20>; interrupts = ; clocks = <&clk NPCM7XX_CLK_AHB>; }; }; ahb { gmac1: eth@f0804000 { device_type = "network"; compatible = "snps,dwmac"; reg = <0xf0804000 0x2000>; interrupts = ; interrupt-names = "macirq"; ethernet = <1>; clocks = <&clk_rg2refck>, <&clk NPCM7XX_CLK_AHB>; clock-names = "stmmaceth", "clk_gmac"; pinctrl-names = "default"; pinctrl-0 = <&rg2_pins &rg2mdio_pins>; status = "disabled"; }; emc1: eth@f0826000 { device_type = "network"; compatible = "nuvoton,npcm750-emc"; reg = <0xf0826000 0x1000>; interrupts = , ; clocks = <&clk NPCM7XX_CLK_AHB>; clock-names = "clk_emc"; pinctrl-names = "default"; pinctrl-0 = <&r2_pins &r2err_pins &r2md_pins>; status = "disabled"; }; udc0:udc@f0830000 { compatible = "nuvoton,npcm750-udc"; reg = <0xf0830000 0x1000 0xfffd0000 0x800>; interrupts = ; status = "disabled"; clocks = <&clk NPCM7XX_CLK_SU>; clock-names = "clk_usb_bridge"; }; udc1:udc@f0831000 { compatible = "nuvoton,npcm750-udc"; reg = <0xf0831000 0x1000 0xfffd0800 0x800>; interrupts = ; status = "disabled"; clocks = <&clk NPCM7XX_CLK_SU>; clock-names = "clk_usb_bridge"; }; udc2:udc@f0832000 { compatible = "nuvoton,npcm750-udc"; reg = <0xf0832000 0x1000 0xfffd1000 0x800>; interrupts = ; status = "disabled"; clocks = <&clk NPCM7XX_CLK_SU>; clock-names = "clk_usb_bridge"; }; udc3:udc@f0833000 { compatible = "nuvoton,npcm750-udc"; reg = <0xf0833000 0x1000 0xfffd1800 0x800>; interrupts = ; status = "disabled"; clocks = <&clk NPCM7XX_CLK_SU>; clock-names = "clk_usb_bridge"; }; udc4:udc@f0834000 { compatible = "nuvoton,npcm750-udc"; reg = <0xf0834000 0x1000 0xfffd2000 0x800>; interrupts = ; status = "disabled"; clocks = <&clk NPCM7XX_CLK_SU>; clock-names = "clk_usb_bridge"; }; udc5:udc@f0835000 { compatible = "nuvoton,npcm750-udc"; reg = <0xf0835000 0x1000 0xfffd2800 0x800>; interrupts = ; status = "disabled"; clocks = <&clk NPCM7XX_CLK_SU>; clock-names = "clk_usb_bridge"; }; udc6:udc@f0836000 { compatible = "nuvoton,npcm750-udc"; reg = <0xf0836000 0x1000 0xfffd3000 0x800>; interrupts = ; status = "disabled"; clocks = <&clk NPCM7XX_CLK_SU>; clock-names = "clk_usb_bridge"; }; udc7:udc@f0837000 { compatible = "nuvoton,npcm750-udc"; reg = <0xf0837000 0x1000 0xfffd3800 0x800>; interrupts = ; status = "disabled"; clocks = <&clk NPCM7XX_CLK_SU>; clock-names = "clk_usb_bridge"; }; udc8:udc@f0838000 { compatible = "nuvoton,npcm750-udc"; reg = <0xf0838000 0x1000 0xfffd4000 0x800>; interrupts = ; status = "disabled"; clocks = <&clk NPCM7XX_CLK_SU>; clock-names = "clk_usb_bridge"; }; udc9:udc@f0839000 { compatible = "nuvoton,npcm750-udc"; reg = <0xf0839000 0x1000 0xfffd4800 0x800>; interrupts = ; status = "disabled"; clocks = <&clk NPCM7XX_CLK_SU>; clock-names = "clk_usb_bridge"; }; }; };