Update to internal 0.74-82

Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>

37 files changed, 2025 insertions, 46 deletions

diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0007-Add-espi-support.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0007-Add-espi-support.patch
index 40336d3dd..5e459b85d 100644
--- a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0007-Add-espi-support.patch
+++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0007-Add-espi-support.patch
@@ -1,7 +1,7 @@
-From dff3a123b0318f83ecd753eea8945ebdc15fd2f9 Mon Sep 17 00:00:00 2001
+From 1752e8b935996fe9359ba4990156d9b57d7a7b8e Mon Sep 17 00:00:00 2001
 From: Vernon Mauery <vernon.mauery@linux.intel.com>
 Date: Wed, 14 Nov 2018 10:21:40 -0800
-Subject: [PATCH 1/1] Add espi support
+Subject: [PATCH] Add espi support
 
 This adds basic eSPI support for U-Boot. The eSPI driver works best with
 interrupts because the timing of the initialization with the PCH is not
@@ -13,13 +13,15 @@ functions.
 
 Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
 Signed-off-by: James Feist <james.feist@linux.intel.com>
+Signed-off-by: Saravanan Palanisamy <saravanan.palanisamy@intel.com>
+Signed-off-by: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com>
 ---
  arch/arm/include/asm/arch-aspeed/regs-scu.h |   2 +
  board/aspeed/ast-g5/Makefile                |   2 +
- board/aspeed/ast-g5/ast-g5-espi.c           | 248 ++++++++++++++++++++
+ board/aspeed/ast-g5/ast-g5-espi.c           | 264 ++++++++++++++++++++
  board/aspeed/ast-g5/ast-g5-intel.c          |  16 ++
  board/aspeed/ast-g5/ast-g5.c                |   3 +
- 5 files changed, 271 insertions(+)
+ 5 files changed, 287 insertions(+)
  create mode 100644 board/aspeed/ast-g5/ast-g5-espi.c
  create mode 100644 board/aspeed/ast-g5/ast-g5-intel.c
 
@@ -47,10 +49,10 @@ index df4e63966e..58e0c648f4 100644
  obj-y += ast-g5-irq.o
 diff --git a/board/aspeed/ast-g5/ast-g5-espi.c b/board/aspeed/ast-g5/ast-g5-espi.c
 new file mode 100644
-index 0000000000..5a3ffe7bef
+index 0000000000..3f169d4141
 --- /dev/null
 +++ b/board/aspeed/ast-g5/ast-g5-espi.c
-@@ -0,0 +1,248 @@
+@@ -0,0 +1,264 @@
 +/*
 + * Copyright 2018 Intel Corporation
 + *
@@ -186,6 +188,22 @@ index 0000000000..5a3ffe7bef
 +		uint32_t v = readl(AST_ESPI_BASE + ESPI104) | AST_ESPI_SUS_ACK;
 +		writel(v, AST_ESPI_BASE + ESPI104);
 +	}
++
++	if (readl(AST_ESPI_BASE + ESPI098) & AST_ESPI_HOST_RST_WARN) {
++		DBG_ESPI("Boot HOST_RST WARN set %08x\n",
++			 readl(AST_ESPI_BASE + ESPI098));
++		uint32_t v = readl(AST_ESPI_BASE + ESPI098)
++							| AST_ESPI_HOST_RST_ACK;
++		writel(v, AST_ESPI_BASE + ESPI098);
++	}
++
++	if (readl(AST_ESPI_BASE + ESPI098) & AST_ESPI_OOB_RST_WARN) {
++		DBG_ESPI("Boot OOB_RST WARN set %08x\n",
++			 readl(AST_ESPI_BASE + ESPI098));
++		uint32_t v = readl(AST_ESPI_BASE + ESPI098)
++							| AST_ESPI_OOB_RST_ACK;
++		writel(v, AST_ESPI_BASE + ESPI098);
++	}
 +}
 +
 +static int espi_irq_handler(struct pt_regs *regs)
diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch
index 392acb9ad..79d7ec60d 100644
--- a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch
+++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch
@@ -1,4 +1,4 @@
-From bd0d8af493387ab1602a0a40b4a548981c1e4d00 Mon Sep 17 00:00:00 2001
+From 4ae4e9e9cde04a76fe8052dbf69a8fe4e7d018c0 Mon Sep 17 00:00:00 2001
 From: AppaRao Puli <apparao.puli@linux.intel.com>
 Date: Wed, 24 Jul 2019 20:11:30 +0530
 Subject: [PATCH] PFR FW update and checkpoint support in u-boot
@@ -45,7 +45,7 @@ index 0b2d936c23..9021d7fc08 100644
  obj-y += fw-update.o
 +obj-y += pfr-mgr.o
 diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
-index dde5adbc70..6ef3ca9f73 100644
+index c46bd70b71..8d390b1ea1 100644
 --- a/board/aspeed/ast-g5/ast-g5-intel.c
 +++ b/board/aspeed/ast-g5/ast-g5-intel.c
 @@ -16,6 +16,7 @@
@@ -56,7 +56,7 @@ index dde5adbc70..6ef3ca9f73 100644
  
  /* Names to match the GPIOs */
  enum gpio_names {
-@@ -634,6 +635,10 @@ void ast_g5_intel(void)
+@@ -687,6 +688,10 @@ void ast_g5_intel(void)
  	ast_scu_write(ast_scu_read(AST_SCU_MISC1_CTRL) |
  		      SCU_MISC_UART_DEBUG_DIS, AST_SCU_MISC1_CTRL);
  
@@ -65,11 +65,11 @@ index dde5adbc70..6ef3ca9f73 100644
 +	set_cpld_reg(PFR_CPLD_BOOT_CHECKPOINT_REG, PFR_CPLD_CHKPOINT_START);
 +
  	uart_init();
+ 	mailbox_init();
  	pwm_init();
- 	gpio_init(gpio_table, ARRAY_SIZE(gpio_table));
-@@ -649,6 +654,11 @@ void ast_g5_intel(void)
+@@ -708,6 +713,11 @@ void ast_g5_intel(void)
  		kcs_init();
- 		if (intel_get_platform_id() == COOPER_CITY_BOARD_ID)
+ 		if (platform_id == COOPER_CITY_BOARD_ID)
  			set_pwm_duty_cycle(ELEVATED_PWM_DUTY_VALUE);
 +		/* Notify CPLD about FFUJ jumper set and pause
 +		 * of booting for indefinitely time. It will be
@@ -77,8 +77,8 @@ index dde5adbc70..6ef3ca9f73 100644
 +		set_cpld_reg(PFR_CPLD_BOOT_CHECKPOINT_REG,
 +			     PFR_CPLD_CHKPOINT_FFUJ);
  		/* TODO: need to stop the booting here. */
- 	}
- }
+ 	} else {
+ 		/*
 diff --git a/board/aspeed/ast-g5/fw-update.c b/board/aspeed/ast-g5/fw-update.c
 index 99239938b5..89fe5fd4fd 100644
 --- a/board/aspeed/ast-g5/fw-update.c
diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch
index f2d1ebdeb..99222f418 100644
--- a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch
+++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch
@@ -103,7 +103,7 @@ diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-int
 index 06c6708..e6dd2e6 100644
 --- a/board/aspeed/ast-g5/ast-g5-intel.c
 +++ b/board/aspeed/ast-g5/ast-g5-intel.c
-@@ -661,6 +661,15 @@ extern void espi_init(void);
+@@ -662,6 +662,15 @@ extern void espi_init(void);
  extern void kcs_init(void);
  void ast_g5_intel(void)
  {
@@ -116,9 +116,9 @@ index 06c6708..e6dd2e6 100644
 +	 */
 +	ast_scu_write(AST_WDT_RESET_MASK, AST_SCU_WDT_RESET);
 +
- 	/* Disable uart port debug function */
- 	ast_scu_write(ast_scu_read(AST_SCU_MISC1_CTRL) |
- 		      SCU_MISC_UART_DEBUG_DIS, AST_SCU_MISC1_CTRL);
+ #ifdef USE_SOC_UART_DEBUG
+        /* Enable uart port debug function */
+        ast_scu_write(ast_scu_read(AST_SCU_MISC1_CTRL) &
 -- 
 2.7.4
 
diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0043-PFR-Skip-counting-WDT2-event-when-EXTRST-is-set.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0043-PFR-Skip-counting-WDT2-event-when-EXTRST-is-set.patch
index 3833d2a31..94c35be61 100644
--- a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0043-PFR-Skip-counting-WDT2-event-when-EXTRST-is-set.patch
+++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0043-PFR-Skip-counting-WDT2-event-when-EXTRST-is-set.patch
@@ -1,4 +1,4 @@
-From 51ae3c80f20be3b8e010aa57041fa9c38076cc76 Mon Sep 17 00:00:00 2001
+From 2dd6a0a9a6271bcb415349fdf5fbd5df3a44aeb6 Mon Sep 17 00:00:00 2001
 From: Vikram Bodireddy <vikram.bodireddy@intel.com>
 Date: Wed, 18 Mar 2020 21:47:11 +0530
 Subject: [PATCH] PFR- Skip counting WDT2 event when EXTRST# is set
@@ -19,18 +19,18 @@ Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com>
  1 file changed, 3 insertions(+), 1 deletion(-)
 
 diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
-index 575061ff88..872c7a843a 100644
+index 6a0d6556bc..c5aded759d 100644
 --- a/board/aspeed/ast-g5/ast-g5-intel.c
 +++ b/board/aspeed/ast-g5/ast-g5-intel.c
-@@ -145,6 +145,7 @@ static const GPIOValue gpio_table[] = {
+@@ -136,6 +136,7 @@ static const GPIOValue gpio_table[] = {
  #define HOST_SERIAL_B_HIGH_SPEED (1 << 1)
  
  #define WATCHDOG_RESET_BIT 0x8
 +#define EXTRST_RESET_BIT 0x2
  #define BOOT_FAILURE_LIMIT 0x3
- 
- #define BRIGHTON_CITY_BOARD_ID 0
-@@ -572,7 +573,8 @@ void ast_g5_intel_late_init(void)
+
+ #define COOPER_CITY_BOARD_ID 40
+@@ -552,7 +553,8 @@ void ast_g5_intel_late_init(void)
  
  	boot_failures = get_boot_failures();
  
diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0049-Add-WDT-to-u-boot-to-cover-booting-failures.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0049-Add-WDT-to-u-boot-to-cover-booting-failures.patch
new file mode 100644
index 000000000..d52b1184a
--- /dev/null
+++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0049-Add-WDT-to-u-boot-to-cover-booting-failures.patch
@@ -0,0 +1,239 @@
+From cc144438f78be5de8e9a67fd8cc898123e32d266 Mon Sep 17 00:00:00 2001
+From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+Date: Mon, 14 Sep 2020 17:38:28 -0700
+Subject: [PATCH] Add WDT to u-boot to cover booting failures
+
+This commit enables WDT1 in early booting phase in u-boot to make BMC
+reset to cover booting failures. If BMC meet any failure or if
+systemd can't initiate watchdog timer service properly, BMC will
+be reset by this watchdog. This watchdog will get feeding by
+WATCHDOG_RESET macro calls from several points in u-boot loop
+code. The early u-boot WD timeout is 5 seconds and kernel booting WD
+timeout is 100 seconds.
+
+Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+---
+ arch/arm/mach-aspeed/platform_g5.S | 78 ++++++++++++++++++++++++++++++
+ board/aspeed/ast-g5/ast-g5-intel.c |  3 ++
+ board/aspeed/ast-g5/ast-g5.c       | 30 +++++++++++-
+ common/bootm_os.c                  |  5 ++
+ 4 files changed, 114 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S
+index f221c97b19dc..e468ed68d687 100644
+--- a/arch/arm/mach-aspeed/platform_g5.S
++++ b/arch/arm/mach-aspeed/platform_g5.S
+@@ -582,6 +582,31 @@ espi_early_init_done:
+     mov   r1, #0xAE
+     str   r1, [r0]
+ 
++#ifdef CONFIG_HW_WATCHDOG
++    /* Enable WDT1 to recover u-boot hang */
++    ldr   r0, =0x1e785004
++    ldr   r1, =0x00500000             @ ~5 seconds
++    str   r1, [r0]
++    ldr   r0, =0x1e785008
++    ldr   r1, =0x00004755
++    str   r1, [r0]
++    ldr   r0, =0x1e78500c
++    ldr   r1, =0x00000033
++    str   r1, [r0]
++
++    /* Clear Scratch register Bit 6 to do DDR training again on WDT1 reset */
++    ldr   r0, =0x1e6e203c
++    ldr   r1, [r0]
++    tst   r1, #(1<<2)
++    beq   bypass_scratch_reg_clear
++    ldr   r0, =0x1e6e2040
++    ldr   r1, [r0]
++    and   r1, r1, #0xFFFFFFBF
++    str   r1, [r0]
++
++bypass_scratch_reg_clear:
++#endif
++
+ /* Test - DRAM initial time */
+     ldr   r0, =0x1e78203c
+     ldr   r1, =0x0000F000
+@@ -2335,6 +2360,13 @@ spi_checksum_wait_0:
+     ldr   r1, [r0]
+     tst   r1, r2
+     beq   spi_checksum_wait_0
++
++/* Debug - UART console message */
++    ldr   r0, =0x1e784000
++    mov   r1, #0x31                              @ '1'
++    str   r1, [r0]
++/* Debug - UART console message */
++
+     ldr   r0, =0x1e620090
+     ldr   r5, [r0]                               @ record golden checksum
+     ldr   r0, =0x1e620080
+@@ -2363,6 +2395,13 @@ spi_checksum_wait_1:
+     ldr   r1, [r0]
+     tst   r1, r2
+     beq   spi_checksum_wait_1
++
++/* Debug - UART console message */
++    ldr   r0, =0x1e784000
++    mov   r1, #0x2E                              @ '.'
++    str   r1, [r0]
++/* Debug - UART console message */
++
+     ldr   r0, =0x1e620090
+     ldr   r2, [r0]                               @ read checksum
+     ldr   r0, =0x1e620080
+@@ -2377,6 +2416,13 @@ spi_checksum_wait_2:
+     ldr   r1, [r0]
+     tst   r1, r2
+     beq   spi_checksum_wait_2
++
++/* Debug - UART console message */
++    ldr   r0, =0x1e784000
++    mov   r1, #0x2E                              @ '.'
++    str   r1, [r0]
++/* Debug - UART console message */
++
+     ldr   r0, =0x1e620090
+     ldr   r2, [r0]                               @ read checksum
+     ldr   r0, =0x1e620080
+@@ -2394,6 +2440,12 @@ spi_cbr_next_delay_e:
+     blt   spi_cbr_next_delay_s
+     b     spi_cbr_next_clkrate
+ 
++/* Debug - UART console message */
++    ldr   r0, =0x1e784000
++    mov   r1, #0x2E                              @ '.'
++    str   r1, [r0]
++/* Debug - UART console message */
++
+ spi_cbr_end:
+     ldr   r0, =0x1e620094
+     str   r8, [r0]
+@@ -2401,6 +2453,16 @@ spi_cbr_end:
+     mov   r1, #0x0
+     str   r1, [r0]
+ 
++/* Debug - UART console message */
++    ldr   r0, =0x1e784000
++    mov   r1, #0x32                              @ '2'
++    str   r1, [r0]
++    mov   r1, #0x2E                              @ '.'
++    str   r1, [r0]
++    mov   r1, #0x2E                              @ '.'
++    str   r1, [r0]
++/* Debug - UART console message */
++
+ /******************************************************************************
+  Miscellaneous Setting
+  ******************************************************************************/
+@@ -2447,6 +2509,16 @@ spi_cbr_end:
+     mov   r1, #0
+     str   r1, [r0]
+ 
++/* Debug - UART console message */
++    ldr   r0, =0x1e784000
++    mov   r1, #0x33                              @ '3'
++    str   r1, [r0]
++    mov   r1, #0x2E                              @ '.'
++    str   r1, [r0]
++    mov   r1, #0x2E                              @ '.'
++    str   r1, [r0]
++/* Debug - UART console message */
++
+ /******************************************************************************
+  Configure MAC timing
+  ******************************************************************************/
+@@ -2535,6 +2607,12 @@ set_D2PLL:
+     ldr   r1, =0xEA
+     str   r1, [r0]
+ 
++/* Debug - UART console message */
++    ldr   r0, =0x1e784000
++    mov   r1, #0x34                              @ '4'
++    str   r1, [r0]
++/* Debug - UART console message */
++
+     /* restore lr */
+     mov   lr, r4
+ 
+diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
+index c46bd70b71b2..92518a66fa67 100644
+--- a/board/aspeed/ast-g5/ast-g5-intel.c
++++ b/board/aspeed/ast-g5/ast-g5-intel.c
+@@ -701,6 +701,9 @@ void ast_g5_intel(void)
+ 	timer8_init();
+ 	enable_onboard_tpm();
+ 	if (intel_force_firmware_jumper_enabled()) {
++#ifdef CONFIG_HW_WATCHDOG
++		hw_watchdog_disable();
++#endif
+ 		/* FFUJ mode:- ChassisID: Solid Blue, StatusLED: Solid Amber */
+ 		id_led_control(GPIO_ID_LED, EIDLED_On);
+ 		id_led_control(GPIO_GREEN_LED, EIDLED_Off);
+diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c
+index 00bd92ae5f94..3f27503bce62 100644
+--- a/board/aspeed/ast-g5/ast-g5.c
++++ b/board/aspeed/ast-g5/ast-g5.c
+@@ -125,9 +125,35 @@ int board_eth_init(bd_t *bd)
+ 
+ /* Called by macro WATCHDOG_RESET */
+ #if defined(CONFIG_HW_WATCHDOG)
++#define AST_WDT_COUNTER_STATUS		0x00
++#define AST_WDT_COUNTER_RELOAD_VALUE	0x04
++#define AST_WDT_COUNTER_RESTART_CTRL	0x08
++#define  AST_WDT_RESTART_VALUE		0x4755
++#define AST_WDT_CTRL			0x0c
++#define  AST_WDT_EN_1MHZ_CLK		BIT(4)
++#define  AST_WDT_SYS_RESET		BIT(1)
++#define  AST_WDT_ENABLE			BIT(0)
++#define AST_WDT_TIMEOUT_DEFAULT		0x6000000 /* ~100 seconds */
+ void hw_watchdog_reset(void)
+ {
+-	/* Restart WD2 timer */
+-	writel(0x4755, AST_WDT2_BASE + 0x08);
++	/* Restart WDT1 */
++	writel(AST_WDT_RESTART_VALUE,
++	       AST_WDT1_BASE + AST_WDT_COUNTER_RESTART_CTRL);
++}
++
++void hw_watchdog_init(void)
++{
++	writel(0, AST_WDT1_BASE + AST_WDT_CTRL);
++	writel(AST_WDT_TIMEOUT_DEFAULT,
++	       AST_WDT1_BASE + AST_WDT_COUNTER_RELOAD_VALUE);
++	writel(AST_WDT_RESTART_VALUE,
++	       AST_WDT1_BASE + AST_WDT_COUNTER_RESTART_CTRL);
++	writel(AST_WDT_EN_1MHZ_CLK | AST_WDT_SYS_RESET | AST_WDT_ENABLE,
++	       AST_WDT1_BASE + AST_WDT_CTRL);
++}
++
++void hw_watchdog_disable(void)
++{
++	writel(0, AST_WDT1_BASE + AST_WDT_CTRL);
+ }
+ #endif /* CONFIG_WATCHDOG */
+diff --git a/common/bootm_os.c b/common/bootm_os.c
+index b56eb39780e8..ec0e12ac84b9 100644
+--- a/common/bootm_os.c
++++ b/common/bootm_os.c
+@@ -473,11 +473,16 @@ __weak void arch_preboot_os(void)
+ 	/* please define platform specific arch_preboot_os() */
+ }
+ 
++extern void hw_watchdog_init(void);
++
+ int boot_selected_os(int argc, char * const argv[], int state,
+ 		     bootm_headers_t *images, boot_os_fn *boot_fn)
+ {
+ 	disable_interrupts();
+ 	arch_preboot_os();
++#ifdef CONFIG_HW_WATCHDOG
++	hw_watchdog_init(); /* Re-init WDT with 100 seconds timeout */
++#endif
+ 	boot_fn(state, argc, argv, images);
+ 
+ 	/* Stand-alone may return when 'autostart' is 'no' */
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0050-Enable-CONFIG_DDR4_SUPPORT_HYNIX.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0050-Enable-CONFIG_DDR4_SUPPORT_HYNIX.patch
new file mode 100644
index 000000000..d8309f32c
--- /dev/null
+++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0050-Enable-CONFIG_DDR4_SUPPORT_HYNIX.patch
@@ -0,0 +1,28 @@
+From daa5fdb53f4ed5d40063daf3a3b8ee40115fe5bd Mon Sep 17 00:00:00 2001
+From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+Date: Fri, 11 Sep 2020 09:19:43 -0700
+Subject: [PATCH] Enable CONFIG_DDR4_SUPPORT_HYNIX
+
+This commit enables CONFIG_DDR4_SUPPORT_HYNIX for test.
+
+Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+---
+ arch/arm/mach-aspeed/platform_g5.S | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S
+index f221c97b19dc..4276d6db3a9a 100644
+--- a/arch/arm/mach-aspeed/platform_g5.S
++++ b/arch/arm/mach-aspeed/platform_g5.S
+@@ -149,7 +149,7 @@
+   on the MB layout. Customer can find the appropriate frequency for their products.
+   Below are the new defined parameters for the Hynix DDR4 supporting.
+  ******************************************************************************/
+-//#define CONFIG_DDR4_SUPPORT_HYNIX              @ Enable this when Hynix DDR4 included in the BOM
++#define CONFIG_DDR4_SUPPORT_HYNIX              @ Enable this when Hynix DDR4 included in the BOM
+ //#define CONFIG_DDR4_HYNIX_SET_1536
+ //#define CONFIG_DDR4_HYNIX_SET_1488
+ #define CONFIG_DDR4_HYNIX_SET_1440
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0051-Add-Aspeed-DRAM-stress-test-command.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0051-Add-Aspeed-DRAM-stress-test-command.patch
new file mode 100644
index 000000000..377be5e53
--- /dev/null
+++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0051-Add-Aspeed-DRAM-stress-test-command.patch
@@ -0,0 +1,302 @@
+From 6ccd771297fdfc4dbb0571001e787a72f9348df9 Mon Sep 17 00:00:00 2001
+From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+Date: Wed, 16 Sep 2020 15:14:26 -0700
+Subject: [PATCH] Add Aspeed DRAM stress test command
+
+This commit adds DRAM stress test command. Also, it enables
+SoC UART debug feature.
+
+Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+---
+ board/aspeed/ast-g5/ast-g5-intel.c |   8 ++
+ cmd/Kconfig                        |   4 +
+ cmd/Makefile                       |   2 +
+ cmd/dramtest.c                     | 219 +++++++++++++++++++++++++++++
+ 4 files changed, 233 insertions(+)
+ create mode 100644 cmd/dramtest.c
+
+diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
+index c46bd70b71b2..91dae91d02e4 100644
+--- a/board/aspeed/ast-g5/ast-g5-intel.c
++++ b/board/aspeed/ast-g5/ast-g5-intel.c
+@@ -140,6 +140,8 @@ static const GPIOValue gpio_table[] = {
+
+ #define COOPER_CITY_BOARD_ID 40
+ 
++#define USE_SOC_UART_DEBUG
++
+ static int get_boot_failures(void)
+ {
+        return getenv_ulong("bootfailures", 10, 0);
+@@ -660,9 +662,15 @@ extern void espi_init(void);
+ extern void kcs_init(void);
+ void ast_g5_intel(void)
+ {
++#ifdef USE_SOC_UART_DEBUG
++	/* Enable uart port debug function */
++	ast_scu_write(ast_scu_read(AST_SCU_MISC1_CTRL) &
++		      ~SCU_MISC_UART_DEBUG_DIS, AST_SCU_MISC1_CTRL);
++#else
+ 	/* Disable uart port debug function */
+ 	ast_scu_write(ast_scu_read(AST_SCU_MISC1_CTRL) |
+ 		      SCU_MISC_UART_DEBUG_DIS, AST_SCU_MISC1_CTRL);
++#endif
+ 
+ 	uart_init();
+ 	mailbox_init();
+diff --git a/cmd/Kconfig b/cmd/Kconfig
+index 33be2407d2ba..e7c7c4b67cef 100644
+--- a/cmd/Kconfig
++++ b/cmd/Kconfig
+@@ -605,6 +605,10 @@ config CMD_QFW
+ 	  This provides access to the QEMU firmware interface.  The main
+ 	  feature is to allow easy loading of files passed to qemu-system
+ 	  via -kernel / -initrd
++
++config CMD_DRAMTEST
++        bool "ASPEED DRAM controller stress test"
++        default y
+ endmenu
+ 
+ config CMD_BOOTSTAGE
+diff --git a/cmd/Makefile b/cmd/Makefile
+index c8ac0af55c05..eda5f91338ce 100644
+--- a/cmd/Makefile
++++ b/cmd/Makefile
+@@ -152,6 +152,8 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
+ obj-$(CONFIG_CMD_GPT) += gpt.o
+ obj-$(CONFIG_CMD_ETHSW) += ethsw.o
+ 
++obj-$(CONFIG_CMD_DRAMTEST) += dramtest.o
++
+ # Power
+ obj-$(CONFIG_CMD_PMIC) += pmic.o
+ obj-$(CONFIG_CMD_REGULATOR) += regulator.o
+diff --git a/cmd/dramtest.c b/cmd/dramtest.c
+new file mode 100644
+index 000000000000..cb2f0ea5ac35
+--- /dev/null
++++ b/cmd/dramtest.c
+@@ -0,0 +1,219 @@
++/*
++ *  This program is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with this program; if not, write to the Free Software
++ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ */
++
++#include <common.h>
++#include <console.h>
++#include <bootretry.h>
++#include <cli.h>
++#include <command.h>
++#include <console.h>
++
++#include <inttypes.h>
++#include <mapmem.h>
++#include <asm/io.h>
++#include <linux/compiler.h>
++
++DECLARE_GLOBAL_DATA_PTR;
++
++#define DRAM_BASE	0x80000000
++#define TIMEOUT_DRAM	5000000
++
++#ifdef CONFIG_ASPEED_AST2600
++#define BLK_SIZE_MB				64
++#define N_BLK					32
++#define MCR74_BLK_OFFSET		26
++#define MCR74_LEN_OFFSET		4
++#define MCR74_BLK_LEN_MASK		GENMASK(30, 4)
++#else
++#define BLK_SIZE_MB				16
++#define N_BLK					64
++#define MCR74_BLK_OFFSET		24
++#define MCR74_LEN_OFFSET		4
++#define MCR74_BLK_LEN_MASK		GENMASK(29, 4)
++#endif
++#define BLK_SIZE				(BLK_SIZE_MB * 1024 * 1024)
++#define N_16B_IN_BLK			(BLK_SIZE / 16)
++
++/* ------------------------------------------------------------------------- */
++int MMCTestBurst(unsigned int datagen)
++{
++	unsigned int data;
++	unsigned int timeout = 0;
++
++	writel(0x00000000, 0x1E6E0070);
++	writel((0x000000C1 | (datagen << 3)), 0x1E6E0070);
++
++	do {
++		data = readl(0x1E6E0070) & 0x3000;
++
++		if( data & 0x2000 )
++			return(0);
++
++		if( ++timeout > TIMEOUT_DRAM ) {
++			printf("Timeout!!\n");
++			writel(0x00000000, 0x1E6E0070);
++			return(0);
++		}
++	} while (!data);
++
++	writel(0x00000000, 0x1E6E0070);
++
++	return(1);
++}
++
++/* ------------------------------------------------------------------------- */
++int MMCTestSingle(unsigned int datagen)
++{
++	unsigned int data;
++	unsigned int timeout = 0;
++
++	writel(0x00000000, 0x1E6E0070);
++	writel((0x00000085 | (datagen << 3)), 0x1E6E0070);
++
++	do {
++		data = readl(0x1E6E0070) & 0x3000;
++
++		if( data & 0x2000 )
++			return(0);
++
++		if( ++timeout > TIMEOUT_DRAM ){
++			printf("Timeout!!\n");
++			writel(0x00000000, 0x1E6E0070);
++
++			return(0);
++		}
++	} while ( !data );
++
++	writel(0x00000000, 0x1E6E0070);
++
++	return(1);
++}
++
++/* ------------------------------------------------------------------------- */
++int MMCTest(void)
++{
++	unsigned int pattern;
++
++	pattern = rand();
++	writel(pattern, 0x1E6E007C);
++	printf("Pattern = %08X : ",pattern);
++
++	if(!MMCTestBurst(0))    return(0);
++	if(!MMCTestBurst(1))    return(0);
++	if(!MMCTestBurst(2))    return(0);
++	if(!MMCTestBurst(3))    return(0);
++	if(!MMCTestBurst(4))    return(0);
++	if(!MMCTestBurst(5))    return(0);
++	if(!MMCTestBurst(6))    return(0);
++	if(!MMCTestBurst(7))    return(0);
++	if(!MMCTestSingle(0))   return(0);
++	if(!MMCTestSingle(1))   return(0);
++	if(!MMCTestSingle(2))   return(0);
++	if(!MMCTestSingle(3))   return(0);
++	if(!MMCTestSingle(4))   return(0);
++	if(!MMCTestSingle(5))   return(0);
++	if(!MMCTestSingle(6))   return(0);
++	if(!MMCTestSingle(7))   return(0);
++
++	return(1);
++}
++
++/* ------------------------------------------------------------------------- */
++static void print_usage(void)
++{
++	printf("\nASPEED DRAM BIST\n\n");
++	printf("Usage: dramtest <count> <block> <length>\n\n");
++	printf("count:  how many iterations to run (mandatory, in decimal)\n");
++	printf("        0: infinite loop.\n");
++	printf("block:  index of the address block to test "
++			"(optional, in decimal, default: 0)\n");
++	printf("        0: [%08x, %08x)\n", DRAM_BASE + BLK_SIZE * 0, DRAM_BASE + BLK_SIZE * 1);
++	printf("        1: [%08x, %08x)\n", DRAM_BASE + BLK_SIZE * 1, DRAM_BASE + BLK_SIZE * 2);
++	printf("        2: [%08x, %08x)\n", DRAM_BASE + BLK_SIZE * 2, DRAM_BASE + BLK_SIZE * 3);
++	printf("        n: [80000000 + n*%dMB, 80000000 + (n+1)*%dMB)\n", BLK_SIZE_MB, BLK_SIZE_MB);
++	printf("           where n = [0, %d]\n", N_BLK - 1);
++	printf("length: size to test (optional, in hex, default: 0x10000)\n");
++	printf("        0x0: test the whole memory block %dMB\n", BLK_SIZE_MB);
++	printf("        0x1: test the first 16 Bytes of the memory block\n");
++	printf("        0x2: test the first 2*16 Bytes of the memory block\n");
++	printf("        n  : test the first n*16 Bytes of the memory block\n");
++	printf("             where n = [0x00000001, 0x%08x]\n", N_16B_IN_BLK - 1);
++	printf("\n\n");
++}
++
++static int
++do_ast_dramtest(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
++{
++	u32 PassCnt = 0;
++	unsigned long Testcounter = 0;
++	unsigned long block = 0;
++	unsigned long length = 0x10000;
++	int ret;
++
++	if (argc < 2) {
++		ret = 0;
++		goto cmd_err;
++	}
++
++	ret = CMD_RET_USAGE;
++	switch (argc) {
++	case 4:
++		if (strict_strtoul(argv[3], 16, &length) < 0 ||
++		    length > N_16B_IN_BLK - 1)
++			goto cmd_err;
++		if (length == 0)
++		    length = N_16B_IN_BLK - 1;
++		/* fall through */
++	case 3:
++		if (strict_strtoul(argv[2], 10, &block) < 0 ||
++		    block > N_BLK - 1)
++			goto cmd_err;
++		/* fall through */
++	case 2:
++		if (strict_strtoul(argv[1], 10, &Testcounter) < 0)
++			goto cmd_err;
++		break;
++	default:
++		goto cmd_err;
++	}
++
++	printf("Test range: 0x%08lx - 0x%08lx\n", DRAM_BASE + (block << MCR74_BLK_OFFSET),
++	       DRAM_BASE + (block << MCR74_BLK_OFFSET) + (length << 4) + 15);
++
++	ret = 1;
++	writel(0xFC600309, 0x1E6E0000);
++	while ((Testcounter > PassCnt) || (Testcounter == 0)) {
++		clrsetbits_le32(0x1E6E0074, MCR74_BLK_LEN_MASK,
++				(block << MCR74_BLK_OFFSET) | (length << MCR74_LEN_OFFSET));
++
++		if (!MMCTest()) {
++			printf("FAIL %d/%ld (fail DQ 0x%08x)\n", PassCnt,
++			       Testcounter, readl(0x1E6E0078));
++			ret = 0;
++			break;
++		} else {
++			PassCnt++;
++			printf("Pass %d/%ld\n", PassCnt, Testcounter);
++		}
++	}
++
++	return (ret);
++
++cmd_err:
++	print_usage();
++	return (ret);
++}
++
++U_BOOT_CMD(
++	dramtest,   5, 0,  do_ast_dramtest,
++	"ASPEED DRAM BIST",
++	""
++);
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
index f5b54893f..fe150bf9d 100644
--- a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
+++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
@@ -46,6 +46,9 @@ SRC_URI_append_intel-ast2500 = " \
     file://0045-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch \
     file://0046-Enable-FMC-DMA-for-memmove.patch \
     file://0047-ast2500-parse-reset-reason.patch \
+    file://0049-Add-WDT-to-u-boot-to-cover-booting-failures.patch \
+    file://0050-Enable-CONFIG_DDR4_SUPPORT_HYNIX.patch \
+    file://0051-Add-Aspeed-DRAM-stress-test-command.patch \
     "
 # CVE-2020-10648 vulnerability fix
 SRC_URI_append_intel-ast2500 = " \
diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json
index 34a38489e..1d2048335 100644
--- a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json
+++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json
@@ -1684,7 +1684,7 @@
             "Type": "PSUPresence"
         },
         {
-            "RedundantCount": 1,
+            "RedundantCount": 2,
             "Name": "Power Unit Redundancy",
             "Type": "PURedundancy"
         },
diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors/0002-Fix-missing-threshold-de-assert-event-when-threshold.patch b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors/0002-Fix-missing-threshold-de-assert-event-when-threshold.patch
new file mode 100644
index 000000000..13f9a157a
--- /dev/null
+++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors/0002-Fix-missing-threshold-de-assert-event-when-threshold.patch
@@ -0,0 +1,154 @@
+From 8990f3d3d3d74c0bed2c0920073e1ecfd4ff422d Mon Sep 17 00:00:00 2001
+From: Zhikui Ren <zhikui.ren@intel.com>
+Date: Thu, 24 Sep 2020 14:27:32 -0700
+Subject: [PATCH] Fix missing threshold de-assert event when threshold changes.
+
+Destructor can be called when sensor interface changes
+like a new threshold value. Ensure adc sensor hresholds are de-asserted
+on destruction. These events can be missed if the new threshold
+value fixed the alarm because default state for new threshold
+interface is de-asserted.
+
+Tested:
+step1:
+busctl set-property xyz.openbmc_project.ADCSensor /xyz/openbmc_project/sensors/voltage/P3VBAT xyz.openbmc_project.Sensor.Threshold.Warning WarningLow d 2.457
+ipmitool sel list
+SEL has no entries
+step2:
+busctl set-property xyz.openbmc_project.ADCSensor /xyz/openbmc_project/sensors/voltage/P3VBAT xyz.openbmc_project.Sensor.Threshold.Warning WarningLow d 3.1
+ipmitool sel list
+   1 | 09/24/20 | 21:30:15 UTC | Voltage #0x2d | Lower Non-critical going low  | Asserted
+step3:
+busctl set-property xyz.openbmc_project.ADCSensor /xyz/openbmc_project/sensors/voltage/P3VBAT xyz.openbmc_project.Sensor.Threshold.Warning WarningLow d 2.457
+ipmitool sel list
+   1 | 09/24/20 | 21:30:15 UTC | Voltage #0x2d | Lower Non-critical going low  | Asserted
+   2 | 09/24/20 | 21:30:33 UTC | Voltage #0x2d | Lower Non-critical going low  | Deasserted
+
+Signed-off-by: Zhikui Ren <zhikui.ren@intel.com>
+Change-Id: If28870ac1e0d09be4a631a3145408ec70390dfc5
+---
+ include/Thresholds.hpp |  3 ++
+ src/ADCSensor.cpp      | 12 ++++++++
+ src/Thresholds.cpp     | 62 ++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 77 insertions(+)
+
+diff --git a/include/Thresholds.hpp b/include/Thresholds.hpp
+index ca2b0a0..1d1b1b5 100644
+--- a/include/Thresholds.hpp
++++ b/include/Thresholds.hpp
+@@ -47,6 +47,9 @@ void assertThresholds(Sensor* sensor, double assertValue,
+                       thresholds::Level level, thresholds::Direction direction,
+                       bool assert);
+ 
++void forceDeassertThresholds(Sensor* sensor, thresholds::Level level,
++                             thresholds::Direction direction);
++
+ struct TimerUsed
+ {
+     bool used;
+diff --git a/src/ADCSensor.cpp b/src/ADCSensor.cpp
+index 7afb2ab..701c58e 100644
+--- a/src/ADCSensor.cpp
++++ b/src/ADCSensor.cpp
+@@ -88,6 +88,18 @@ ADCSensor::~ADCSensor()
+     // close the input dev to cancel async operations
+     inputDev.close();
+     waitTimer.cancel();
++
++    // Destructor can be called when sensor interface changes
++    // like a new threshold value. Ensure LOW thresholds are de-asserted
++    // on destruction. These events can be missed if the new threshold
++    // value fixed the alarm because default state for new threshold
++    // interface is de-asserted.
++    for (auto& threshold : thresholds)
++    {
++        thresholds::forceDeassertThresholds(this, threshold.level,
++                                            threshold.direction);
++    }
++
+     objServer.remove_interface(thresholdInterfaceWarning);
+     objServer.remove_interface(thresholdInterfaceCritical);
+     objServer.remove_interface(sensorInterface);
+diff --git a/src/Thresholds.cpp b/src/Thresholds.cpp
+index 6aa077c..e480554 100644
+--- a/src/Thresholds.cpp
++++ b/src/Thresholds.cpp
+@@ -344,6 +344,7 @@ bool checkThresholds(Sensor* sensor)
+ {
+     bool status = true;
+     std::vector<ChangeParam> changes = checkThresholds(sensor, sensor->value);
++
+     for (const auto& change : changes)
+     {
+         assertThresholds(sensor, change.assertValue, change.threshold.level,
+@@ -452,6 +453,67 @@ void assertThresholds(Sensor* sensor, double assertValue,
+     }
+ }
+ 
++void forceDeassertThresholds(Sensor* sensor, thresholds::Level level,
++                             thresholds::Direction direction)
++{
++    std::string property;
++    std::shared_ptr<sdbusplus::asio::dbus_interface> interface;
++    if (level == thresholds::Level::WARNING &&
++        direction == thresholds::Direction::HIGH)
++    {
++        property = "WarningAlarmHigh";
++        interface = sensor->thresholdInterfaceWarning;
++    }
++    else if (level == thresholds::Level::WARNING &&
++             direction == thresholds::Direction::LOW)
++    {
++        property = "WarningAlarmLow";
++        interface = sensor->thresholdInterfaceWarning;
++    }
++    else if (level == thresholds::Level::CRITICAL &&
++             direction == thresholds::Direction::HIGH)
++    {
++        property = "CriticalAlarmHigh";
++        interface = sensor->thresholdInterfaceCritical;
++    }
++    else if (level == thresholds::Level::CRITICAL &&
++             direction == thresholds::Direction::LOW)
++    {
++        property = "CriticalAlarmLow";
++        interface = sensor->thresholdInterfaceCritical;
++    }
++    else
++    {
++        std::cerr << "Unknown threshold, level " << level << "direction "
++                  << direction << "\n";
++        return;
++    }
++    if (!interface)
++    {
++        std::cout << "trying to set uninitialized interface\n";
++        return;
++    }
++
++    if (interface->set_property<bool, true>(property, false))
++    {
++        try
++        {
++            // msg.get_path() is interface->get_object_path()
++            sdbusplus::message::message msg =
++                interface->new_signal("ThresholdAsserted");
++
++            msg.append(sensor->name, interface->get_interface_name(), property,
++                       false, sensor->value);
++            msg.signal_send();
++        }
++        catch (const sdbusplus::exception::exception& e)
++        {
++            std::cerr << "Failed to send thresholdAsserted signal from forced "
++                         "de-assert\n";
++        }
++    }
++}
++
+ bool parseThresholdsFromAttr(
+     std::vector<thresholds::Threshold>& thresholdVector,
+     const std::string& inputPath, const double& scaleFactor,
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors_%.bbappend b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors_%.bbappend
index 1c8817772..a8a74f3e0 100644
--- a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors_%.bbappend
+++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors_%.bbappend
@@ -1,3 +1,4 @@
 FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
 
-SRC_URI += "file://0001-Only-allow-drive-sensors-on-bus-2-for-ast2500.patch"
+SRC_URI += "file://0001-Only-allow-drive-sensors-on-bus-2-for-ast2500.patch \
+            file://0002-Fix-missing-threshold-de-assert-event-when-threshold.patch"
diff --git a/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem/0005-oemcommands-Fix-for-set-security-mode-to-mfg-mode.patch b/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem/0005-oemcommands-Fix-for-set-security-mode-to-mfg-mode.patch
new file mode 100644
index 000000000..ecd1bb47f
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem/0005-oemcommands-Fix-for-set-security-mode-to-mfg-mode.patch
@@ -0,0 +1,50 @@
+From d77489f18e044448778a7c651dddea7a13e3eaca Mon Sep 17 00:00:00 2001
+From: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com>
+Date: Sat, 5 Sep 2020 01:00:04 +0000
+Subject: [PATCH] oemcommands: Fix for set security mode to mfg mode
+
+Issue: Set security mode fails to enter manufacturing mode even though
+       command got executed successfully.
+Fix: As manufacturing mode is reserved, can't enable using set security
+     mode command. So returning 0xCC as completion code.
+
+Tested:
+Verified using ipmitool raw commands.
+Before fix:
+Command: ipmitool raw 0x30 0xb4 0x03 0x01 //set security mode to mfg
+Response:                       //Success
+
+After fix:
+Command:  ipmitool raw 0x30 0xb4 0x03 0x01  //set security mode to mfg
+Response: Unable to send RAW command (channel=0x0 netfn=0x30 lun=0x0
+          cmd=0xb4 rsp=0xcc): Invalid data field in request
+
+Signed-off-by: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com>
+Change-Id: Ib166bb7d4a5248a7f6f5b04615a9d80e8a78b3fe
+---
+ src/oemcommands.cpp | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/src/oemcommands.cpp b/src/oemcommands.cpp
+index d2a1811..107a1fe 100644
+--- a/src/oemcommands.cpp
++++ b/src/oemcommands.cpp
+@@ -2838,6 +2838,15 @@ ipmi::RspType<> ipmiSetSecurityMode(ipmi::Context::ptr ctx,
+ #ifdef BMC_VALIDATION_UNSECURE_FEATURE
+     if (specialMode)
+     {
++        constexpr uint8_t mfgMode = 0x01;
++        // Manufacturing mode is reserved. So can't enable this mode.
++        if (specialMode.value() == mfgMode)
++        {
++            phosphor::logging::log<phosphor::logging::level::INFO>(
++                "ipmiSetSecurityMode: Can't enable Manufacturing mode");
++            return ipmi::responseInvalidFieldRequest();
++        }
++
+         ec.clear();
+         ctx->bus->yield_method_call<>(
+             ctx->yield, ec, specialModeService, specialModeBasePath,
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend
index a7486376f..75ecb2bd4 100644
--- a/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend
@@ -11,4 +11,5 @@ SRC_URI += "file://0001-Fix-cold-redundancy-is-not-runing-as-user-configurat.pat
             file://0002-GetFwVersionInfo-Fix-for-Firmware-aux-version.patch \
             file://0003-storagecommands-Fix-for-GetFruAreaInfo-command.patch \
             file://0004-firmware-update-Add-Support-to-get-fwSecurityVer.patch \
+            file://0005-oemcommands-Fix-for-set-security-mode-to-mfg-mode.patch \
            "
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0119-Handle-pending-eSPI-HOST-OOB-RESET-VW-events.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0119-Handle-pending-eSPI-HOST-OOB-RESET-VW-events.patch
new file mode 100644
index 000000000..fe27864a2
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0119-Handle-pending-eSPI-HOST-OOB-RESET-VW-events.patch
@@ -0,0 +1,56 @@
+From 562a6d31576b91d1c7f2c9df0d12966a1f034ac6 Mon Sep 17 00:00:00 2001
+From: Saravanan Palanisamy <saravanan.palanisamy@intel.com>
+Date: Wed, 23 Sep 2020 19:23:37 +0000
+Subject: [PATCH] Handle pending eSPI HOST, OOB RESET VW events.
+
+Add support for handling of HOST_RESET_WARN, OOB_RESET_WARN VW events received
+before espi-ISR is registered.
+Without this support, SoC does not boot to BIOS and wait for ACK endlessly
+for these events.  These events can be induced in some platforms in ME-recovery
+mode.
+
+Tested:
+1. Test: Induce HOST_RESET_WARN event before BMC uboot espi is initialized.
+   Expected: BMC should send HOST_RESET_ACK from uboot. PASS.
+2. Test: Disable the HOST_RESET_WARN ACK support for early events in uboot,
+   and repeat test case 1.
+   Expected: BMC should send HOST_RESET_ACK from kernel(this change). PASS.
+
+Signed-off-by: Saravanan Palanisamy <saravanan.palanisamy@intel.com>
+Signed-off-by: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com>
+---
+ drivers/misc/aspeed-espi-slave.c | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+diff --git a/drivers/misc/aspeed-espi-slave.c b/drivers/misc/aspeed-espi-slave.c
+index cb8ed585c69f..ed7bff4d5046 100644
+--- a/drivers/misc/aspeed-espi-slave.c
++++ b/drivers/misc/aspeed-espi-slave.c
+@@ -179,6 +179,24 @@ static void aspeed_espi_boot_ack(struct aspeed_espi *priv)
+ 			     evt | ASPEED_ESPI_SYSEVT1_SUS_ACK);
+ 		dev_dbg(priv->dev, "Boot SYSEVT1_SUS_WARN: acked\n");
+ 	}
++
++	regmap_read(priv->map, ASPEED_ESPI_SYSEVT, &evt);
++	if (evt & ASPEED_ESPI_SYSEVT_HOST_RST_WARN &&
++	    !(evt & ASPEED_ESPI_SYSEVT_HOST_RST_ACK)) {
++		regmap_write_bits(priv->map, ASPEED_ESPI_SYSEVT,
++				  ASPEED_ESPI_SYSEVT_HOST_RST_ACK,
++				  ASPEED_ESPI_SYSEVT_HOST_RST_ACK);
++		dev_dbg(priv->dev, "Boot SYSEVT_HOST_RST_WARN: acked\n");
++	}
++
++	regmap_read(priv->map, ASPEED_ESPI_SYSEVT, &evt);
++	if (evt & ASPEED_ESPI_SYSEVT_OOB_RST_WARN &&
++	    !(evt & ASPEED_ESPI_SYSEVT_OOB_RST_ACK)) {
++		regmap_write_bits(priv->map, ASPEED_ESPI_SYSEVT,
++				  ASPEED_ESPI_SYSEVT_OOB_RST_ACK,
++				  ASPEED_ESPI_SYSEVT_OOB_RST_ACK);
++		dev_dbg(priv->dev, "Boot SYSEVT_OOB_RST_WARN: acked\n");
++	}
+ }
+ 
+ static irqreturn_t aspeed_espi_irq(int irq, void *arg)
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/CVE-2020-14386/0001-net-packet-fix-overflow-in-tpacket_rcv.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/CVE-2020-14386/0001-net-packet-fix-overflow-in-tpacket_rcv.patch
new file mode 100644
index 000000000..45ab4c1b2
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/CVE-2020-14386/0001-net-packet-fix-overflow-in-tpacket_rcv.patch
@@ -0,0 +1,54 @@
+From acf69c946233259ab4d64f8869d4037a198c7f06 Mon Sep 17 00:00:00 2001
+From: Or Cohen <orcohen@paloaltonetworks.com>
+Date: Thu, 3 Sep 2020 21:05:28 -0700
+Subject: [PATCH] net/packet: fix overflow in tpacket_rcv
+
+Using tp_reserve to calculate netoff can overflow as
+tp_reserve is unsigned int and netoff is unsigned short.
+
+This may lead to macoff receving a smaller value then
+sizeof(struct virtio_net_hdr), and if po->has_vnet_hdr
+is set, an out-of-bounds write will occur when
+calling virtio_net_hdr_from_skb.
+
+The bug is fixed by converting netoff to unsigned int
+and checking if it exceeds USHRT_MAX.
+
+This addresses CVE-2020-14386
+
+Fixes: 8913336a7e8d ("packet: add PACKET_RESERVE sockopt")
+Signed-off-by: Or Cohen <orcohen@paloaltonetworks.com>
+Signed-off-by: Eric Dumazet <edumazet@google.com>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+---
+ net/packet/af_packet.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
+index da8254e680f9..2b33e977a905 100644
+--- a/net/packet/af_packet.c
++++ b/net/packet/af_packet.c
+@@ -2170,7 +2170,8 @@ static int tpacket_rcv(struct sk_buff *skb, struct net_device *dev,
+ 	int skb_len = skb->len;
+ 	unsigned int snaplen, res;
+ 	unsigned long status = TP_STATUS_USER;
+-	unsigned short macoff, netoff, hdrlen;
++	unsigned short macoff, hdrlen;
++	unsigned int netoff;
+ 	struct sk_buff *copy_skb = NULL;
+ 	struct timespec64 ts;
+ 	__u32 ts_status;
+@@ -2239,6 +2240,10 @@ static int tpacket_rcv(struct sk_buff *skb, struct net_device *dev,
+ 		}
+ 		macoff = netoff - maclen;
+ 	}
++	if (netoff > USHRT_MAX) {
++		atomic_inc(&po->tp_drops);
++		goto drop_n_restore;
++	}
+ 	if (po->tp_version <= TPACKET_V2) {
+ 		if (macoff + snaplen > po->rx_ring.frame_size) {
+ 			if (po->copy_thresh &&
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend
index 9bb40fe5c..271b6035e 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend
@@ -89,6 +89,7 @@ SRC_URI += " \
         file://0116-watchdog-aspeed-fix-AST2600-support.patch \
         file://0117-Copy-raw-PECI-response-to-user-space-on-timeout.patch \
         file://0118-Recalculate-AW-FCS-on-WrEndPointConfig-command.patch \
+        file://0119-Handle-pending-eSPI-HOST-OOB-RESET-VW-events.patch \
         "
 
 # CVE-2020-16166 vulnerability fix
@@ -110,5 +111,11 @@ SRC_URI += " \
     file://0002-cgroup-Fix-sock_cgroup_data-on-big-endian.patch \
     "
 
+# CVE-2020-14386 vulnerability fix
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}/CVE-2020-14386:"
+SRC_URI += " \
+    file://0001-net-packet-fix-overflow-in-tpacket_rcv.patch \
+    "
+
 SRC_URI += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', 'file://0005-128MB-flashmap-for-PFR.patch', '', d)}"
 SRC_URI += "${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'debug-tweaks', 'file://debug.cfg', '', d)}"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0001-Add-retries-to-mapper-calls.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0001-Add-retries-to-mapper-calls.patch
new file mode 100644
index 000000000..429b23c7e
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0001-Add-retries-to-mapper-calls.patch
@@ -0,0 +1,72 @@
+From 40be5b0a1376ece0265aa42817fa8fd643fb18d9 Mon Sep 17 00:00:00 2001
+From: James Feist <james.feist@linux.intel.com>
+Date: Thu, 10 Sep 2020 14:49:25 -0700
+Subject: [PATCH 1/1] Add retries to mapper calls
+
+During cycling we're seeing sometimes we exit due
+to mapper errors. Put in retries to avoid EM shutting
+down.
+
+Tested: Saw retries happen and EM stay up
+
+Change-Id: I2caa4a7ca0ae17a621c23152b3c362442c45592e
+Signed-off-by: James Feist <james.feist@linux.intel.com>
+---
+ src/EntityManager.cpp | 27 ++++++++++++++++++++++-----
+ 1 file changed, 22 insertions(+), 5 deletions(-)
+
+diff --git a/src/EntityManager.cpp b/src/EntityManager.cpp
+index ec38dde..c96725d 100644
+--- a/src/EntityManager.cpp
++++ b/src/EntityManager.cpp
+@@ -184,7 +184,7 @@ void getInterfaces(
+ // getManagedObjects
+ void findDbusObjects(std::vector<std::shared_ptr<PerformProbe>>&& probeVector,
+                      boost::container::flat_set<std::string>&& interfaces,
+-                     std::shared_ptr<PerformScan> scan)
++                     std::shared_ptr<PerformScan> scan, size_t retries = 5)
+ {
+ 
+     for (const auto& [interface, _] : scan->dbusProbeObjects)
+@@ -199,8 +199,8 @@ void findDbusObjects(std::vector<std::shared_ptr<PerformProbe>>&& probeVector,
+     // find all connections in the mapper that expose a specific type
+     SYSTEM_BUS->async_method_call(
+         [interfaces{std::move(interfaces)}, probeVector{std::move(probeVector)},
+-         scan](boost::system::error_code& ec,
+-               const GetSubTreeType& interfaceSubtree) {
++         scan, retries](boost::system::error_code& ec,
++                        const GetSubTreeType& interfaceSubtree) mutable {
+             boost::container::flat_set<
+                 std::tuple<std::string, std::string, std::string>>
+                 interfaceConnections;
+@@ -212,8 +212,25 @@ void findDbusObjects(std::vector<std::shared_ptr<PerformProbe>>&& probeVector,
+                 }
+                 std::cerr << "Error communicating to mapper.\n";
+ 
+-                // if we can't communicate to the mapper something is very wrong
+-                std::exit(EXIT_FAILURE);
++                if (!retries)
++                {
++                    // if we can't communicate to the mapper something is very
++                    // wrong
++                    std::exit(EXIT_FAILURE);
++                }
++                std::shared_ptr<boost::asio::steady_timer> timer =
++                    std::make_shared<boost::asio::steady_timer>(io);
++                timer->expires_after(std::chrono::seconds(10));
++
++                timer->async_wait(
++                    [timer, interfaces{std::move(interfaces)}, scan,
++                     probeVector{std::move(probeVector)},
++                     retries](const boost::system::error_code&) mutable {
++                        findDbusObjects(std::move(probeVector),
++                                        std::move(interfaces), scan,
++                                        retries - 1);
++                    });
++                return;
+             }
+ 
+             for (const auto& [path, object] : interfaceSubtree)
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend
index cf402206b..f3f7d7ebe 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend
@@ -3,4 +3,4 @@ SRC_URI = "git://github.com/openbmc/entity-manager.git"
 SRCREV = "e18edb5badc2e16181cfc464a6ccd0ef51dc4548"
 
 FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
-
+SRC_URI += "file://0001-Add-retries-to-mapper-calls.patch"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/pch-time-sync.service b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/pch-time-sync.service
index cf9c3053f..da44737fd 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/pch-time-sync.service
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/pch-time-sync.service
@@ -10,4 +10,4 @@ StartLimitInterval=0
 Type=simple
 
 [Install]
-WantedBy=sysinit.target
+WantedBy=multi-user.target
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0029-Add-RedundantCount-property-for-PSU-redundancy.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0029-Add-RedundantCount-property-for-PSU-redundancy.patch
new file mode 100644
index 000000000..0655de44b
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0029-Add-RedundantCount-property-for-PSU-redundancy.patch
@@ -0,0 +1,33 @@
+From 09f95d9d57a9a5e6c739444dec367cdf9bf4bc16 Mon Sep 17 00:00:00 2001
+From: Kuiying Wang <kuiying.wang@intel.com>
+Date: Tue, 1 Sep 2020 13:52:30 +0800
+Subject: [PATCH] Add RedundantCount property for PSU redundancy
+
+RedundantCount is the min number of PSUs in the system
+required to obtain redundancy
+
+Change-Id: Icdfd9d2c473a793d3792a335a04aff1838d7d99c
+Signed-off-by: Kuiying Wang <kuiying.wang@intel.com>
+---
+ .../Control/PowerSupplyRedundancy.interface.yaml             | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/xyz/openbmc_project/Control/PowerSupplyRedundancy.interface.yaml b/xyz/openbmc_project/Control/PowerSupplyRedundancy.interface.yaml
+index e02e0aa..7f7d27b 100644
+--- a/xyz/openbmc_project/Control/PowerSupplyRedundancy.interface.yaml
++++ b/xyz/openbmc_project/Control/PowerSupplyRedundancy.interface.yaml
+@@ -35,6 +35,11 @@ properties:
+       type: byte
+       description: >
+         Number of PSUs are currently on system.
++    - name: RedundantCount
++      type: byte
++      description: >
++        The min number of PSUs in the system required to obtain redundancy
++      default: 2
+ 
+ enumerations:
+     - name: Algo
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend
index adebde874..2e471cef2 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend
@@ -16,4 +16,5 @@ SRC_URI += "file://0005-Add-DBUS-interface-of-CPU-and-Memory-s-properties.patch
             file://0026-Add-StandbySpare-support-for-software-inventory.patch \
             file://0027-Apply-Options-interface-for-Software.patch \
             file://0028-MCTP-Daemon-D-Bus-interface-definition.patch \
+            file://0029-Add-RedundantCount-property-for-PSU-redundancy.patch \
             "
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0003-bmcweb-changes-for-setting-ApplyOptions-ClearCfg.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0003-bmcweb-changes-for-setting-ApplyOptions-ClearCfg.patch
index 704031fe1..94dc4d14f 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0003-bmcweb-changes-for-setting-ApplyOptions-ClearCfg.patch
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0003-bmcweb-changes-for-setting-ApplyOptions-ClearCfg.patch
@@ -1,7 +1,7 @@
-From e883ea9d43a84998641428448d7220c0f5be72c0 Mon Sep 17 00:00:00 2001
+From c3948dcb2c472bcb2931e581bcec70004cc61bcf Mon Sep 17 00:00:00 2001
 From: Vikram Bodireddy <vikram.bodireddy@intel.com>
 Date: Tue, 30 Jun 2020 22:09:10 +0530
-Subject: [PATCH] bmcweb changes for setting ApplyOptions-ClearCfg
+Subject: [PATCH 1/1] bmcweb changes for setting ApplyOptions-ClearCfg
 
 ApplyOptions are used to specify firmware update specific options
 such as ClearConfig which is used while activating the updated
@@ -16,19 +16,21 @@ Tested: Tested setting ClearConfig to true or false using PATCH
         Ran Redfish-Service-Validator and no new issues found.
 
 Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com>
+Signed-off-by: James Feist <james.feist@linux.intel.com>
 ---
- redfish-core/lib/update_service.hpp           | 69 ++++++++++++++++++-
- .../JsonSchemas/OemUpdateService/index.json   | 69 +++++++++++++++++++
+ redfish-core/lib/update_service.hpp           | 71 ++++++++++++++++++-
+ static/redfish/v1/$metadata/index.xml         |  5 +-
+ .../JsonSchemas/OemUpdateService/index.json   | 69 ++++++++++++++++++
  .../redfish/v1/schema/OemUpdateService_v1.xml | 40 +++++++++++
- 3 files changed, 177 insertions(+), 1 deletion(-)
+ 4 files changed, 183 insertions(+), 2 deletions(-)
  create mode 100644 static/redfish/v1/JsonSchemas/OemUpdateService/index.json
  create mode 100644 static/redfish/v1/schema/OemUpdateService_v1.xml
 
 diff --git a/redfish-core/lib/update_service.hpp b/redfish-core/lib/update_service.hpp
-index 86ddd8a..291acec 100644
+index bc68510..7ca3c69 100644
 --- a/redfish-core/lib/update_service.hpp
 +++ b/redfish-core/lib/update_service.hpp
-@@ -691,6 +691,29 @@ class UpdateService : public Node
+@@ -691,6 +691,31 @@ class UpdateService : public Node
              "/xyz/openbmc_project/software/apply_time",
              "org.freedesktop.DBus.Properties", "Get",
              "xyz.openbmc_project.Software.ApplyTime", "RequestedApplyTime");
@@ -48,6 +50,8 @@ index 86ddd8a..291acec 100644
 +
 +                if (b)
 +                {
++                    aResp->res.jsonValue["Oem"]["ApplyOptions"]["@odata.type"] =
++                         "#OemUpdateService.ApplyOptions";
 +                    aResp->res.jsonValue["Oem"]["ApplyOptions"]["ClearConfig"] =
 +                        *b;
 +                }
@@ -58,7 +62,7 @@ index 86ddd8a..291acec 100644
      }
  
      void doPatch(crow::Response& res, const crow::Request& req,
-@@ -703,15 +726,59 @@ class UpdateService : public Node
+@@ -703,15 +728,59 @@ class UpdateService : public Node
          std::optional<nlohmann::json> pushUriOptions;
          std::optional<std::vector<std::string>> imgTargets;
          std::optional<bool> imgTargetBusy;
@@ -119,6 +123,22 @@ index 86ddd8a..291acec 100644
          if (pushUriOptions)
          {
              std::optional<nlohmann::json> pushUriApplyTime;
+diff --git a/static/redfish/v1/$metadata/index.xml b/static/redfish/v1/$metadata/index.xml
+index 19f0fd9..09bddf3 100644
+--- a/static/redfish/v1/$metadata/index.xml
++++ b/static/redfish/v1/$metadata/index.xml
+@@ -2502,7 +2502,10 @@
+     <edmx:Reference Uri="/redfish/v1/schema/OemManager_v1.xml">
+         <edmx:Include Namespace="OemManager"/>
+     </edmx:Reference>
+-    <edmx:Reference Uri="/redfish/v1/schema/OemCrashdump_v1.xml">
++    <edmx:Reference Uri="/redfish/v1/schema/OemUpdateService_v1.xml">
++        <edmx:Include Namespace="OemUpdateService"/>
++    </edmx:Reference>
++   <edmx:Reference Uri="/redfish/v1/schema/OemCrashdump_v1.xml">
+         <edmx:Include Namespace="OemCrashdump.v1_0_0"/>
+     </edmx:Reference>
+     <edmx:Reference Uri="/redfish/v1/schema/OemComputerSystem_v1.xml">
 diff --git a/static/redfish/v1/JsonSchemas/OemUpdateService/index.json b/static/redfish/v1/JsonSchemas/OemUpdateService/index.json
 new file mode 100644
 index 0000000..74e39cd
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0021-Define-PSU-redundancy-property.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0021-Define-PSU-redundancy-property.patch
new file mode 100644
index 000000000..1a3a45d58
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0021-Define-PSU-redundancy-property.patch
@@ -0,0 +1,206 @@
+From fe04a2f507a5813f586acd1bf30d3a8694109144 Mon Sep 17 00:00:00 2001
+From: Kuiying Wang <kuiying.wang@intel.com>
+Date: Wed, 26 Aug 2020 17:10:20 +0800
+Subject: [PATCH] Define PSU redundancy property.
+
+Currently PSU redundancy property is not implemented.
+
+Tested:
+1. Passed redfish validator.
+2. Redundancy property is shown in the redfish interace
+   redfish/v1/Chassis/WC_Baseboard/Power/
+"Redundancy": [
+{
+"@odata.id": "/redfish/v1/Chassis/WC_Baseboard/Power#/Redundancy/0" ,
+"@odata.type": "#Redundancy.v1_3_2.Redundancy" ,
+"MemberId": "PSURedundancy" ,
+"MinNumNeeded": 2 ,
+"Mode": "Failover" ,
+"Name": "PSURedundancy" ,
+"RedundancySet": [
+{
+"@odata.id": "/redfish/v1/Chassis/WC_Baseboard/Power#/PowerSupplies/0"
+} ,
+{
+"@odata.id": "/redfish/v1/Chassis/WC_Baseboard/Power#/PowerSupplies/1"
+}
+] ,
+"Status": {
+"Health": "OK" ,
+"State": "Enabled"
+}
+}
+]
+
+Change-Id: I58e44db8ea767d4c66f07638c43edec3bf6d2e53
+Signed-off-by: Kuiying Wang <kuiying.wang@intel.com>
+
+%% original patch: 0021-Define-PSU-redundancy-property.patch
+
+Signed-off-by: Kuiying Wang <kuiying.wang@intel.com>
+---
+ redfish-core/lib/sensors.hpp | 141 ++++++++++++++++++++++++++++++++++-
+ 1 file changed, 140 insertions(+), 1 deletion(-)
+
+diff --git a/redfish-core/lib/sensors.hpp b/redfish-core/lib/sensors.hpp
+index f12bbe0..48aa439 100644
+--- a/redfish-core/lib/sensors.hpp
++++ b/redfish-core/lib/sensors.hpp
+@@ -1043,7 +1043,141 @@ void objectInterfacesToJson(
+     BMCWEB_LOG_DEBUG << "Added sensor " << sensorName;
+ }
+ 
+-static void
++inline void
++    populatePSURedundancy(std::shared_ptr<SensorsAsyncResp> sensorsAsyncResp)
++{
++    crow::connections::systemBus->async_method_call(
++        [sensorsAsyncResp](const boost::system::error_code ec,
++                           const GetSubTreeType& resp) {
++            if (ec)
++            {
++                return; // don't have to have this interface
++            }
++            for (const std::pair<std::string,
++                                 std::vector<std::pair<
++                                     std::string, std::vector<std::string>>>>&
++                     pathPair : resp)
++            {
++                const std::string& path = pathPair.first;
++                const std::vector<
++                    std::pair<std::string, std::vector<std::string>>>& objDict =
++                    pathPair.second;
++                if (objDict.empty())
++                {
++                    continue; // this should be impossible
++                }
++                const std::string& owner = objDict.begin()->first;
++
++                crow::connections::systemBus->async_method_call(
++                    [path, owner, sensorsAsyncResp](
++                        const boost::system::error_code err,
++                        const boost::container::flat_map<
++                            std::string, std::variant<uint8_t, uint32_t, bool,
++                                                      std::vector<uint8_t>,
++                                                      std::string>>& ret) {
++                        if (err)
++                        {
++                            BMCWEB_LOG_ERROR
++                                << "Failed to call PSU redundancy interface";
++                            messages::internalError(sensorsAsyncResp->res);
++                            return;
++                        }
++
++                        auto findPSUNumber = ret.find("PSUNumber");
++                        auto findRedundantCount = ret.find("RedundantCount");
++                        auto findEnabled =
++                            ret.find("PowerSupplyRedundancyEnabled");
++                        if (findPSUNumber == ret.end() ||
++                            findRedundantCount == ret.end() ||
++                            findEnabled == ret.end())
++                        {
++                            BMCWEB_LOG_ERROR << "Failed to find PSUNumber | "
++                                                "PowerSupplyRedundancyEnabled";
++                            messages::internalError(sensorsAsyncResp->res);
++                            return;
++                        }
++
++                        auto psuNumber =
++                            std::get_if<uint8_t>(&(findPSUNumber->second));
++                        auto enabled =
++                            std::get_if<bool>(&(findEnabled->second));
++                        auto redundantCount =
++                            std::get_if<uint8_t>(&(findRedundantCount->second));
++
++                        if (psuNumber == nullptr || enabled == nullptr ||
++                            redundantCount == nullptr)
++                        {
++                            BMCWEB_LOG_ERROR
++                                << "Invalid PSU redundancy property "
++                                   "types";
++                            messages::internalError(sensorsAsyncResp->res);
++                            return;
++                        }
++
++                        std::string health;
++                        std::string state;
++                        size_t minNumNeeded = *redundantCount;
++                        if (*enabled)
++                        {
++                            state = "Enabled";
++                        }
++                        else
++                        {
++                            state = "Disabled";
++                        }
++                        if (*psuNumber >= minNumNeeded)
++                        {
++                            health = "OK";
++                        }
++                        else
++                        {
++                            health = "Warning";
++                        }
++
++                        nlohmann::json& jResp =
++                            sensorsAsyncResp->res.jsonValue["Redundancy"];
++                        jResp.push_back(
++                            {{"@odata.id",
++                              "/redfish/v1/Chassis/" +
++                                  sensorsAsyncResp->chassisId + "/" +
++                                  sensorsAsyncResp->chassisSubNode +
++                                  "#/Redundancy/" +
++                                  std::to_string(jResp.size())},
++                             {"@odata.type", "#Redundancy.v1_3_2.Redundancy"},
++                             {"MemberId", "PSURedundancy"},
++                             {"MinNumNeeded", minNumNeeded},
++                             {"Mode", "Failover"},
++                             {"Name", "PSURedundancy"},
++                             {"RedundancySet", nlohmann::json::array()},
++                             {"Status",
++                              {{"Health", health}, {"State", state}}}});
++                        nlohmann::json& redundancySet =
++                            jResp[0]["RedundancySet"];
++                        const nlohmann::json& psuRedfish =
++                            sensorsAsyncResp->res.jsonValue["PowerSupplies"];
++                        for (auto& schemaItem : psuRedfish)
++                        {
++                            auto inputPower = schemaItem["PowerInputWatts"];
++                            if (inputPower > 0)
++                            {
++                                redundancySet.push_back(
++                                    {{"@odata.id", schemaItem["@odata.id"]}});
++                            }
++                        }
++                    },
++                    owner, path, "org.freedesktop.DBus.Properties", "GetAll",
++                    "xyz.openbmc_project.Control.PowerSupplyRedundancy");
++            }
++        },
++        "xyz.openbmc_project.ObjectMapper",
++        "/xyz/openbmc_project/object_mapper",
++        "xyz.openbmc_project.ObjectMapper", "GetSubTree",
++        "/xyz/openbmc_project/control", 2,
++        std::array<const char*, 1>{
++            "xyz.openbmc_project.Control.PowerSupplyRedundancy"});
++}
++
++inline void
+     populateFanRedundancy(std::shared_ptr<SensorsAsyncResp> sensorsAsyncResp)
+ {
+     crow::connections::systemBus->async_method_call(
+@@ -2581,6 +2715,11 @@ void getSensorData(
+                 {
+                     populateFanRedundancy(SensorsAsyncResp);
+                 }
++                else if (SensorsAsyncResp->chassisSubNode ==
++                         sensors::node::power)
++                {
++                    populatePSURedundancy(SensorsAsyncResp);
++                }
+             }
+             BMCWEB_LOG_DEBUG << "getManagedObjectsCb exit";
+         };
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0022-schema-add-missing-tags.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0022-schema-add-missing-tags.patch
new file mode 100644
index 000000000..f7564c8a6
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0022-schema-add-missing-tags.patch
@@ -0,0 +1,51 @@
+From bbf1a93eb6935c426deb0ecbcf3d8611b17aeb30 Mon Sep 17 00:00:00 2001
+From: James Feist <james.feist@linux.intel.com>
+Date: Tue, 22 Sep 2020 17:09:03 -0700
+Subject: [PATCH] schema: add missing tags
+
+Tested: Made validator pass for OemManager
+
+Change-Id: I2acef893bb5ead465ebdfb631259f34f8e93031d
+Signed-off-by: James Feist <james.feist@linux.intel.com>
+---
+ static/redfish/v1/schema/OemAccountService_v1.xml | 2 +-
+ static/redfish/v1/schema/OemManager_v1.xml        | 4 ++--
+ 2 files changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/static/redfish/v1/schema/OemAccountService_v1.xml b/static/redfish/v1/schema/OemAccountService_v1.xml
+index c5783ca..7d58b2b 100644
+--- a/static/redfish/v1/schema/OemAccountService_v1.xml
++++ b/static/redfish/v1/schema/OemAccountService_v1.xml
+@@ -25,7 +25,7 @@
+       <Annotation Term="Redfish.OwningEntity" String="OpenBMC"/>
+       <Annotation Term="Redfish.Release" String="1.0"/>
+ 
+-      <ComplexType Name="AuthMethodsConfig">
++      <ComplexType Name="AuthMethodsConfig" BaseType="Resource.OemObject">
+         <Annotation Term="OData.AdditionalProperties" Bool="false"/>
+         <Annotation Term="OData.Description" String="Authorization Methods configuration."/>
+         <Annotation Term="OData.LongDescription" String="Configuration describing which auth methods are enabled."/>
+diff --git a/static/redfish/v1/schema/OemManager_v1.xml b/static/redfish/v1/schema/OemManager_v1.xml
+index 26498f0..9a7a8c4 100644
+--- a/static/redfish/v1/schema/OemManager_v1.xml
++++ b/static/redfish/v1/schema/OemManager_v1.xml
+@@ -28,14 +28,14 @@
+                 <Property Name="OpenBmc" Type="OemManager.OpenBmc"/>
+             </ComplexType>
+ 
+-            <ComplexType Name="OpenBmc">
++            <ComplexType Name="OpenBmc" BaseType="Resource.OemObject">
+                 <Annotation Term="OData.AdditionalProperties" Bool="true" />
+                 <Annotation Term="OData.Description" String="Oem properties for OpenBmc." />
+                 <Annotation Term="OData.AutoExpand"/>
+                 <Property Name="Fan" Type="OemManager.Fan"/>
+             </ComplexType>
+ 
+-            <ComplexType Name="Fan">
++            <ComplexType Name="Fan" BaseType="Resource.OemObject">
+                 <Annotation Term="OData.AdditionalProperties" Bool="true" />
+                 <Annotation Term="OData.Description" String="OpenBmc oem fan properties." />
+                 <Annotation Term="OData.AutoExpand"/>
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0023-OemComputerSystems-add-missing-odata.types.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0023-OemComputerSystems-add-missing-odata.types.patch
new file mode 100644
index 000000000..cab95c008
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0023-OemComputerSystems-add-missing-odata.types.patch
@@ -0,0 +1,33 @@
+From cf618cc42f1baa3531385d53e25df517f41e668a Mon Sep 17 00:00:00 2001
+From: James Feist <james.feist@linux.intel.com>
+Date: Wed, 23 Sep 2020 14:40:47 -0700
+Subject: [PATCH 1/1] OemComputerSystems: add missing odata.types
+
+odata.type wasn't added causing the validator to fail.
+
+Tested: Validator errors went away
+
+Change-Id: I26e2f4ba13051d6d3e18ddc94eac13bca1bad71c
+Signed-off-by: James Feist <james.feist@linux.intel.com>
+---
+ redfish-core/lib/systems.hpp | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/redfish-core/lib/systems.hpp b/redfish-core/lib/systems.hpp
+index 0788e84..9220279 100644
+--- a/redfish-core/lib/systems.hpp
++++ b/redfish-core/lib/systems.hpp
+@@ -1412,6 +1412,10 @@ inline void getProvisioningStatus(std::shared_ptr<AsyncResp> aResp)
+                     propertiesList) {
+             nlohmann::json& oemPFR =
+                 aResp->res.jsonValue["Oem"]["OpenBmc"]["FirmwareProvisioning"];
++            aResp->res.jsonValue["Oem"]["OpenBmc"]["@odata.type"] =
++                "#OemComputerSystem.OpenBmc";
++            oemPFR["@odata.type"] = "#OemComputerSystem.FirmwareProvisioning";
++
+             if (ec)
+             {
+                 BMCWEB_LOG_DEBUG << "DBUS response error " << ec;
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0024-EventService-Log-events-for-subscription-actions.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0024-EventService-Log-events-for-subscription-actions.patch
new file mode 100644
index 000000000..2543c1d09
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0024-EventService-Log-events-for-subscription-actions.patch
@@ -0,0 +1,178 @@
+From c9d0aca4db7cfb646da38f1ac3fabe13790b6f3c Mon Sep 17 00:00:00 2001
+From: AppaRao Puli <apparao.puli@linux.intel.com>
+Date: Thu, 24 Sep 2020 03:04:36 +0530
+Subject: [PATCH] EventService: Log events for subscription actions
+
+Log the redfish event for below 3 actions
+ - Add new subscription
+ - Update existing subscription properties
+ - Delete existing subscription
+
+Tested:
+ - Performed all the above actions and  verified
+   the redfish events.
+
+Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com>
+---
+ redfish-core/include/event_service_manager.hpp     | 33 ++++++++++++++---
+ .../registries/openbmc_message_registry.hpp        | 41 +++++++++++++++++++++-
+ redfish-core/lib/event_service.hpp                 |  2 +-
+ 3 files changed, 70 insertions(+), 6 deletions(-)
+
+diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp
+index fd42985..8397159 100644
+--- a/redfish-core/include/event_service_manager.hpp
++++ b/redfish-core/include/event_service_manager.hpp
+@@ -20,6 +20,7 @@
+ #include "registries/openbmc_message_registry.hpp"
+ 
+ #include <sys/inotify.h>
++#include <systemd/sd-journal.h>
+ 
+ #include <boost/asio/io_context.hpp>
+ #include <boost/container/flat_map.hpp>
+@@ -763,7 +764,7 @@ class EventServiceManager
+         return;
+     }
+ 
+-    void updateSubscriptionData()
++    void persistSubscriptionData()
+     {
+         // Persist the config and subscription data.
+         nlohmann::json jsonData;
+@@ -858,7 +859,7 @@ class EventServiceManager
+ 
+         if (updateConfig)
+         {
+-            updateSubscriptionData();
++            persistSubscriptionData();
+         }
+ 
+         if (updateRetryCfg)
+@@ -945,7 +946,7 @@ class EventServiceManager
+ 
+         if (updateFile)
+         {
+-            updateSubscriptionData();
++            persistSubscriptionData();
+         }
+ 
+ #ifndef BMCWEB_ENABLE_REDFISH_DBUS_LOG_ENTRIES
+@@ -958,6 +959,12 @@ class EventServiceManager
+         subValue->updateRetryConfig(retryAttempts, retryTimeoutInterval);
+         subValue->updateRetryPolicy();
+ 
++        /* Log event for subscription addition */
++        sd_journal_send("MESSAGE=Event subscription added(Id: %s)", id.c_str(),
++                        "PRIORITY=%i", LOG_INFO, "REDFISH_MESSAGE_ID=%s",
++                        "OpenBMC.0.1.EventSubscriptionAdded",
++                        "REDFISH_MESSAGE_ARGS=%s", id.c_str(), NULL);
++
+         return id;
+     }
+ 
+@@ -978,10 +985,28 @@ class EventServiceManager
+         {
+             subscriptionsMap.erase(obj);
+             updateNoOfSubscribersCount();
+-            updateSubscriptionData();
++            persistSubscriptionData();
++            /* Log event for subscription delete. */
++            sd_journal_send("MESSAGE=Event subscription removed.(Id = %s)",
++                            id.c_str(), "PRIORITY=%i", LOG_INFO,
++                            "REDFISH_MESSAGE_ID=%s",
++                            "OpenBMC.0.1.EventSubscriptionRemoved",
++                            "REDFISH_MESSAGE_ARGS=%s", id.c_str(), NULL);
+         }
+     }
+ 
++    void updateSubscription(const std::string& id)
++    {
++        persistSubscriptionData();
++
++        /* Log event for subscription delete. */
++        sd_journal_send("MESSAGE=Event subscription updated.(Id = %s)",
++                        id.c_str(), "PRIORITY=%i", LOG_INFO,
++                        "REDFISH_MESSAGE_ID=%s",
++                        "OpenBMC.0.1.EventSubscriptionUpdated",
++                        "REDFISH_MESSAGE_ARGS=%s", id.c_str(), NULL);
++    }
++
+     size_t getNumberOfSubscriptions()
+     {
+         return subscriptionsMap.size();
+diff --git a/redfish-core/include/registries/openbmc_message_registry.hpp b/redfish-core/include/registries/openbmc_message_registry.hpp
+index 58c085d..6f1fec3 100644
+--- a/redfish-core/include/registries/openbmc_message_registry.hpp
++++ b/redfish-core/include/registries/openbmc_message_registry.hpp
+@@ -29,7 +29,7 @@ const Header header = {
+     "0.1.0",
+     "OpenBMC",
+ };
+-constexpr std::array<MessageEntry, 185> registry = {
++constexpr std::array<MessageEntry, 188> registry = {
+     MessageEntry{
+         "ADDDCCorrectable",
+         {
+@@ -403,6 +403,45 @@ constexpr std::array<MessageEntry, 185> registry = {
+                      {},
+                      "None.",
+                  }},
++    MessageEntry{"EventSubscriptionAdded",
++                 {
++                     "Indicates that an Event subscription with specific "
++                     "id was added.",
++                     "Event subscription with id %1 was added.",
++                     "OK",
++                     "OK",
++                     1,
++                     {
++                         "string",
++                     },
++                     "None.",
++                 }},
++    MessageEntry{"EventSubscriptionRemoved",
++                 {
++                     "Indicates that an Event subscription with specific "
++                     "id was removed.",
++                     "Event subscription with id %1 was removed.",
++                     "OK",
++                     "OK",
++                     1,
++                     {
++                         "string",
++                     },
++                     "None.",
++                 }},
++    MessageEntry{"EventSubscriptionUpdated",
++                 {
++                     "Indicates that an Event subscription with specific "
++                     " id was updated.",
++                     "Event subscription with id %1 was updated.",
++                     "OK",
++                     "OK",
++                     1,
++                     {
++                         "string",
++                     },
++                     "None.",
++                 }},
+     MessageEntry{"FanInserted",
+                  {
+                      "Indicates that a system fan has been inserted.",
+diff --git a/redfish-core/lib/event_service.hpp b/redfish-core/lib/event_service.hpp
+index b91b745..351f689 100644
+--- a/redfish-core/lib/event_service.hpp
++++ b/redfish-core/lib/event_service.hpp
+@@ -694,7 +694,7 @@ class EventDestination : public Node
+             subValue->updateRetryPolicy();
+         }
+ 
+-        EventServiceManager::getInstance().updateSubscriptionData();
++        EventServiceManager::getInstance().updateSubscription(params[0]);
+     }
+ 
+     void doDelete(crow::Response& res, const crow::Request& req,
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0025-Add-missing-Context-property-to-MetricReport.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0025-Add-missing-Context-property-to-MetricReport.patch
new file mode 100644
index 000000000..ecf791fcb
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0025-Add-missing-Context-property-to-MetricReport.patch
@@ -0,0 +1,33 @@
+From a8c8b39ce42b9360ee5419b1346e9d8899693bfc Mon Sep 17 00:00:00 2001
+From: AppaRao Puli <apparao.puli@linux.intel.com>
+Date: Thu, 24 Sep 2020 01:12:11 +0530
+Subject: [PATCH] Add missing Context property to MetricReport
+
+MetricReport schema version 1.3.1 added Context
+property which is missing in implementation.
+
+Tested:
+ - Recieved MetricReport data on Listner has
+   context in it.
+
+Change-Id: Iafd37902b2295c9ed91e7b68e60303b37d32a89f
+Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com>
+---
+ redfish-core/include/event_service_manager.hpp | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp
+index 22d1f10..fd42985 100644
+--- a/redfish-core/include/event_service_manager.hpp
++++ b/redfish-core/include/event_service_manager.hpp
+@@ -548,6 +548,7 @@ class Subscription
+             {"@odata.type", "#MetricReport.v1_3_0.MetricReport"},
+             {"Id", id},
+             {"Name", id},
++            {"Context", this->customText},
+             {"Timestamp", readingsTs},
+             {"MetricReportDefinition", {{"@odata.id", metricReportDef}}},
+             {"MetricValues", metricValuesArray}};
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0026-http-status-code-for-subscriber-limit-exceed.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0026-http-status-code-for-subscriber-limit-exceed.patch
new file mode 100644
index 000000000..dc298ea59
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0026-http-status-code-for-subscriber-limit-exceed.patch
@@ -0,0 +1,33 @@
+From fd0fac037fea6414cdafda27b4b71f486802e68d Mon Sep 17 00:00:00 2001
+From: AppaRao Puli <apparao.puli@linux.intel.com>
+Date: Thu, 24 Sep 2020 01:16:25 +0530
+Subject: [PATCH] http status code for subscriber limit exceed
+
+Correct the http status code for subscribers
+limit exceed. It should be 503 - Service unavailable.
+
+Tested:
+ - Created 20 subscribers and it return proper status code.
+
+Change-Id: Iad6242c8b842ad7ae7fd7ac39790004a581c52a8
+Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com>
+---
+ redfish-core/src/error_messages.cpp | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/redfish-core/src/error_messages.cpp b/redfish-core/src/error_messages.cpp
+index 290d3f2..1cc8191 100644
+--- a/redfish-core/src/error_messages.cpp
++++ b/redfish-core/src/error_messages.cpp
+@@ -624,7 +624,7 @@ nlohmann::json eventSubscriptionLimitExceeded(void)
+ 
+ void eventSubscriptionLimitExceeded(crow::Response& res)
+ {
+-    res.result(boost::beast::http::status::forbidden);
++    res.result(boost::beast::http::status::service_unavailable);
+     addMessageToErrorJson(res.jsonValue, eventSubscriptionLimitExceeded());
+ }
+ 
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend
index 52598bf15..f36be0d15 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend
@@ -35,6 +35,12 @@ SRC_URI += "file://0001-Firmware-update-support-for-StandBySpare.patch \
             file://0018-Add-sse-event-sequence-number.patch \
             file://0019-EventService-Limit-SSE-connections-as-per-design.patch \
             file://0020-EventService-Validate-SSE-query-filters.patch \
+            file://0021-Define-PSU-redundancy-property.patch \
+            file://0022-schema-add-missing-tags.patch \
+            file://0023-OemComputerSystems-add-missing-odata.types.patch \
+            file://0024-EventService-Log-events-for-subscription-actions.patch \
+            file://0025-Add-missing-Context-property-to-MetricReport.patch \
+            file://0026-http-status-code-for-subscriber-limit-exceed.patch \
 "
 
 # Temporary downstream mirror of upstream patches, see telemetry\README for details
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend
index daa64f159..68aa751db 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend
@@ -1,4 +1,4 @@
-SRCREV = "2456dde72421cd4086ac43e619fb0817a55bf0a7"
+SRCREV = "8aeffd91ff3434f7812e9fdb6b0b03c6119921dd"
 #SRC_URI = "git://github.com/openbmc/dbus-sensors.git"
 
 DEPENDS_append = " libgpiod libmctp"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend
index 4a188f28e..9c4a3c879 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend
@@ -1,4 +1,4 @@
 SRC_URI = "git://github.com/Intel-BMC/phosphor-webui;protocol=ssh;branch=intel2"
 FILESEXTRAPATHS_prepend_intel := "${THISDIR}/${PN}:"
 
-SRCREV = "3348cfbfd54e52a795516bc4a906e128c1bc6bcf"
+SRCREV = "9db94c5d0e61c6cd5935e770c14a9ad6231da497"
diff --git a/meta-openbmc-mods/meta-common/recipes-support/gnutls/gnutls_%.bbappend b/meta-openbmc-mods/meta-common/recipes-support/gnutls/gnutls_%.bbappend
index ed9dd31e8..4377bf0e3 100644
--- a/meta-openbmc-mods/meta-common/recipes-support/gnutls/gnutls_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-support/gnutls/gnutls_%.bbappend
@@ -1,12 +1,12 @@
 FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
 
-PV = "3.6.14"
+PV = "3.6.15"
 
 SHRT_VER = "${@d.getVar('PV').split('.')[0]}.${@d.getVar('PV').split('.')[1]}"
 SRC_URI = "https://www.gnupg.org/ftp/gcrypt/gnutls/v${SHRT_VER}/gnutls-${PV}.tar.xz \
           "
-SRC_URI[md5sum] = "bf70632d420e421baff482247f01dbfe"
+SRC_URI[md5sum] = "e80e0d20a8bb337a15fa63caa7f67006"
 #SRC_URI[sha256sum] =  "3847a3354dd908c5e603f490865ae10577d7ee3b5edf35e82d1ed8cfa1cf0191"
-SRC_URI[sha256sum] = "5630751adec7025b8ef955af4d141d00d252a985769f51b4059e5affa3d39d63"
+SRC_URI[sha256sum] = "0ea8c3283de8d8335d7ae338ef27c53a916f15f382753b174c18b45ffd481558"
 
 
diff --git a/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0001-Filter-memory-thermtrip-events-based-on-DIMM-status.patch b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0001-Filter-memory-thermtrip-events-based-on-DIMM-status.patch
index 30859d1a4..874477601 100644
--- a/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0001-Filter-memory-thermtrip-events-based-on-DIMM-status.patch
+++ b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0001-Filter-memory-thermtrip-events-based-on-DIMM-status.patch
@@ -1,4 +1,4 @@
-From 0253fd1d68d6a42c95c425b1a61fa2d53b2b2469 Mon Sep 17 00:00:00 2001
+From 4e8b5e2a7cef7e8a4f7a9af077da76c3b7eb6a24 Mon Sep 17 00:00:00 2001
 From: "Jason M. Bills" <jason.m.bills@intel.com>
 Date: Wed, 22 Jul 2020 14:30:04 -0700
 Subject: [PATCH] Filter memory thermtrip events based on DIMM status
@@ -26,7 +26,7 @@ Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
  1 file changed, 75 insertions(+), 2 deletions(-)
 
 diff --git a/src/host_error_monitor.cpp b/src/host_error_monitor.cpp
-index 1c6a2e70d..aa4a9b672 100644
+index 313ef29e0..ca089f70d 100644
 --- a/src/host_error_monitor.cpp
 +++ b/src/host_error_monitor.cpp
 @@ -17,6 +17,7 @@
@@ -115,7 +115,7 @@ index 1c6a2e70d..aa4a9b672 100644
  static std::shared_ptr<sdbusplus::bus::match::match> startHostStateMonitor()
  {
      return std::make_shared<sdbusplus::bus::match::match>(
-@@ -826,7 +891,9 @@ static void cpu1MemtripHandler()
+@@ -842,7 +907,9 @@ static void cpu1MemtripHandler()
  
      bool cpu1Memtrip =
          gpioLineEvent.event_type == gpiod::line_event::FALLING_EDGE;
@@ -126,7 +126,7 @@ index 1c6a2e70d..aa4a9b672 100644
      {
          memThermTripLog(1);
      }
-@@ -886,7 +953,9 @@ static void cpu2MemtripHandler()
+@@ -902,7 +969,9 @@ static void cpu2MemtripHandler()
  
      bool cpu2Memtrip =
          gpioLineEvent.event_type == gpiod::line_event::FALLING_EDGE;
@@ -137,7 +137,7 @@ index 1c6a2e70d..aa4a9b672 100644
      {
          memThermTripLog(2);
      }
-@@ -1605,6 +1674,10 @@ int main(int argc, char* argv[])
+@@ -1621,6 +1690,10 @@ int main(int argc, char* argv[])
      std::shared_ptr<sdbusplus::bus::match::match> hostStateMonitor =
          host_error_monitor::startHostStateMonitor();
  
diff --git a/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0004-Switch-to-std-cerr-for-prints.patch b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0004-Switch-to-std-cerr-for-prints.patch
new file mode 100644
index 000000000..10822cac0
--- /dev/null
+++ b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0004-Switch-to-std-cerr-for-prints.patch
@@ -0,0 +1,67 @@
+From 0a8773020bd5bf7516d1b790f98f47ab6c0e2b64 Mon Sep 17 00:00:00 2001
+From: "Jason M. Bills" <jason.m.bills@intel.com>
+Date: Thu, 27 Aug 2020 11:42:43 -0700
+Subject: [PATCH] Switch to std::cerr for prints
+
+std::cout is buffered, so the prints don't always show up with
+the correct timestamp.  The better change is probably to move
+to phosphor::logging, but for now just change to std::cerr to
+get the prints immediately.
+
+Tested:
+Confirmed that the print messages show up immediately with the
+correct timestamps.
+
+Change-Id: I208eb042e00275889dda3dd088095e4c57db880d
+Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
+---
+ src/host_error_monitor.cpp | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/src/host_error_monitor.cpp b/src/host_error_monitor.cpp
+index 9dabb52bb..1b10cd38e 100644
+--- a/src/host_error_monitor.cpp
++++ b/src/host_error_monitor.cpp
+@@ -483,7 +483,7 @@ static void startWarmReset()
+ static void startCrashdumpAndRecovery(bool recoverSystem,
+                                       const std::string& triggerType)
+ {
+-    std::cout << "Starting crashdump\n";
++    std::cerr << "Starting crashdump\n";
+     static std::shared_ptr<sdbusplus::bus::match::match> crashdumpCompleteMatch;
+     static boost::asio::steady_timer crashdumpTimer(io);
+ 
+@@ -493,10 +493,10 @@ static void startCrashdumpAndRecovery(bool recoverSystem,
+         "member='PropertiesChanged',arg0namespace='com.intel.crashdump'",
+         [recoverSystem](sdbusplus::message::message& msg) {
+             crashdumpTimer.cancel();
+-            std::cout << "Crashdump completed\n";
++            std::cerr << "Crashdump completed\n";
+             if (recoverSystem)
+             {
+-                std::cout << "Recovering the system\n";
++                std::cerr << "Recovering the system\n";
+                 startWarmReset();
+             }
+             crashdumpCompleteMatch.reset();
+@@ -512,7 +512,7 @@ static void startCrashdumpAndRecovery(bool recoverSystem,
+                 std::cerr << "Crashdump async_wait failed: " << ec.message()
+                           << "\n";
+             }
+-            std::cout << "Crashdump timer canceled\n";
++            std::cerr << "Crashdump timer canceled\n";
+             return;
+         }
+         std::cerr << "Crashdump failed to complete before timeout\n";
+@@ -1545,7 +1545,7 @@ static void smiAssertHandler()
+ #else
+                 if (*reset)
+                 {
+-                    std::cout << "Recovering the system\n";
++                    std::cerr << "Recovering the system\n";
+                     startWarmReset();
+                 }
+ #endif
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0005-Improve-PECI-error-checking-and-reporting.patch b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0005-Improve-PECI-error-checking-and-reporting.patch
new file mode 100644
index 000000000..c94fce70a
--- /dev/null
+++ b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0005-Improve-PECI-error-checking-and-reporting.patch
@@ -0,0 +1,251 @@
+From 5e0de05dc29bdb065566f33670e68c903ab51e98 Mon Sep 17 00:00:00 2001
+From: "Jason M. Bills" <jason.m.bills@intel.com>
+Date: Tue, 22 Sep 2020 15:09:49 -0700
+Subject: [PATCH] Improve PECI error checking and reporting
+
+It's possible for a PECI command to return successfully with an
+error in the completion code.  This change adds checks for the
+PECI completion code and will print an error on failure.
+
+Tested:
+Injected an IERR and confirmed that PECI data is correctly handled.
+
+Change-Id: I86fc0a99ab04dac4d8b38f9f7e0ee1eb6a39397d
+Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
+---
+ src/host_error_monitor.cpp | 114 +++++++++++++++++++++++++------------
+ 1 file changed, 79 insertions(+), 35 deletions(-)
+
+diff --git a/src/host_error_monitor.cpp b/src/host_error_monitor.cpp
+index 1b10cd38e..5e6d7a82c 100644
+--- a/src/host_error_monitor.cpp
++++ b/src/host_error_monitor.cpp
+@@ -234,6 +234,21 @@ static void ssbThermTripLog()
+                     "OpenBMC.0.1.SsbThermalTrip", NULL);
+ }
+ 
++static inline bool peciError(EPECIStatus peciStatus, uint8_t cc)
++{
++    return (
++        peciStatus != PECI_CC_SUCCESS ||
++        (cc != PECI_DEV_CC_SUCCESS && cc != PECI_DEV_CC_FATAL_MCA_DETECTED));
++}
++
++static void printPECIError(const std::string& reg, const size_t addr,
++                           const EPECIStatus peciStatus, const size_t cc)
++{
++    std::cerr << "Failed to read " << reg << " on CPU address " << addr
++              << ". Error: " << peciStatus << ": cc: 0x" << std::hex << cc
++              << "\n";
++}
++
+ static void initializeErrorState();
+ static void initializeHostState()
+ {
+@@ -583,9 +598,10 @@ static void incrementCPUErrorCount(int cpuNum)
+ static bool checkIERRCPUs()
+ {
+     bool cpuIERRFound = false;
+-    for (int cpu = 0, addr = MIN_CLIENT_ADDR; addr <= MAX_CLIENT_ADDR;
++    for (size_t cpu = 0, addr = MIN_CLIENT_ADDR; addr <= MAX_CLIENT_ADDR;
+          cpu++, addr++)
+     {
++        EPECIStatus peciStatus = PECI_CC_SUCCESS;
+         uint8_t cc = 0;
+         CPUModel model{};
+         uint8_t stepping = 0;
+@@ -602,9 +618,11 @@ static bool checkIERRCPUs()
+                 // First check the MCA_ERR_SRC_LOG to see if this is the CPU
+                 // that caused the IERR
+                 uint32_t mcaErrSrcLog = 0;
+-                if (peci_RdPkgConfig(addr, 0, 5, 4, (uint8_t*)&mcaErrSrcLog,
+-                                     &cc) != PECI_CC_SUCCESS)
++                peciStatus = peci_RdPkgConfig(addr, 0, 5, 4,
++                                              (uint8_t*)&mcaErrSrcLog, &cc);
++                if (peciError(peciStatus, cc))
+                 {
++                    printPECIError("MCA_ERR_SRC_LOG", addr, peciStatus, cc);
+                     continue;
+                 }
+                 // Check MSMI_INTERNAL (20) and IERR_INTERNAL (27)
+@@ -616,9 +634,10 @@ static bool checkIERRCPUs()
+                     // Next check if it's a CPU/VR mismatch by reading the
+                     // IA32_MC4_STATUS MSR (0x411)
+                     uint64_t mc4Status = 0;
+-                    if (peci_RdIAMSR(addr, 0, 0x411, &mc4Status, &cc) !=
+-                        PECI_CC_SUCCESS)
++                    peciStatus = peci_RdIAMSR(addr, 0, 0x411, &mc4Status, &cc);
++                    if (peciError(peciStatus, cc))
+                     {
++                        printPECIError("IA32_MC4_STATUS", addr, peciStatus, cc);
+                         continue;
+                     }
+                     // Check MSEC bits 31:24 for
+@@ -637,10 +656,13 @@ static bool checkIERRCPUs()
+                     // non-zero value of CORE_FIVR_ERR_LOG (B(1) D30 F2 offset
+                     // 80h)
+                     uint32_t coreFIVRErrLog = 0;
+-                    if (peci_RdPCIConfigLocal(
+-                            addr, 1, 30, 2, 0x80, sizeof(uint32_t),
+-                            (uint8_t*)&coreFIVRErrLog, &cc) != PECI_CC_SUCCESS)
++                    peciStatus = peci_RdPCIConfigLocal(
++                        addr, 1, 30, 2, 0x80, sizeof(uint32_t),
++                        (uint8_t*)&coreFIVRErrLog, &cc);
++                    if (peciError(peciStatus, cc))
+                     {
++                        printPECIError("CORE_FIVR_ERR_LOG", addr, peciStatus,
++                                       cc);
+                         continue;
+                     }
+                     if (coreFIVRErrLog)
+@@ -653,11 +675,13 @@ static bool checkIERRCPUs()
+                     // non-zero value of UNCORE_FIVR_ERR_LOG (B(1) D30 F2 offset
+                     // 84h)
+                     uint32_t uncoreFIVRErrLog = 0;
+-                    if (peci_RdPCIConfigLocal(addr, 1, 30, 2, 0x84,
+-                                              sizeof(uint32_t),
+-                                              (uint8_t*)&uncoreFIVRErrLog,
+-                                              &cc) != PECI_CC_SUCCESS)
++                    peciStatus = peci_RdPCIConfigLocal(
++                        addr, 1, 30, 2, 0x84, sizeof(uint32_t),
++                        (uint8_t*)&uncoreFIVRErrLog, &cc);
++                    if (peciError(peciStatus, cc))
+                     {
++                        printPECIError("UNCORE_FIVR_ERR_LOG", addr, peciStatus,
++                                       cc);
+                         continue;
+                     }
+                     if (uncoreFIVRErrLog)
+@@ -687,9 +711,11 @@ static bool checkIERRCPUs()
+                 // First check the MCA_ERR_SRC_LOG to see if this is the CPU
+                 // that caused the IERR
+                 uint32_t mcaErrSrcLog = 0;
+-                if (peci_RdPkgConfig(addr, 0, 5, 4, (uint8_t*)&mcaErrSrcLog,
+-                                     &cc) != PECI_CC_SUCCESS)
++                peciStatus = peci_RdPkgConfig(addr, 0, 5, 4,
++                                              (uint8_t*)&mcaErrSrcLog, &cc);
++                if (peciError(peciStatus, cc))
+                 {
++                    printPECIError("MCA_ERR_SRC_LOG", addr, peciStatus, cc);
+                     continue;
+                 }
+                 // Check MSMI_INTERNAL (20) and IERR_INTERNAL (27)
+@@ -701,9 +727,10 @@ static bool checkIERRCPUs()
+                     // Next check if it's a CPU/VR mismatch by reading the
+                     // IA32_MC4_STATUS MSR (0x411)
+                     uint64_t mc4Status = 0;
+-                    if (peci_RdIAMSR(addr, 0, 0x411, &mc4Status, &cc) !=
+-                        PECI_CC_SUCCESS)
++                    peciStatus = peci_RdIAMSR(addr, 0, 0x411, &mc4Status, &cc);
++                    if (peciError(peciStatus, cc))
+                     {
++                        printPECIError("IA32_MC4_STATUS", addr, peciStatus, cc);
+                         continue;
+                     }
+                     // TODO: Update MSEC/MSCOD_31_24 check
+@@ -724,16 +751,22 @@ static bool checkIERRCPUs()
+                     // C0h and C4h) (Note: Bus 31 is accessed on PECI as bus 14)
+                     uint32_t coreFIVRErrLog0 = 0;
+                     uint32_t coreFIVRErrLog1 = 0;
+-                    if (peci_RdEndPointConfigPciLocal(
+-                            addr, 0, 14, 30, 2, 0xC0, sizeof(uint32_t),
+-                            (uint8_t*)&coreFIVRErrLog0, &cc) != PECI_CC_SUCCESS)
++                    peciStatus = peci_RdEndPointConfigPciLocal(
++                        addr, 0, 14, 30, 2, 0xC0, sizeof(uint32_t),
++                        (uint8_t*)&coreFIVRErrLog0, &cc);
++                    if (peciError(peciStatus, cc))
+                     {
++                        printPECIError("CORE_FIVR_ERR_LOG_0", addr, peciStatus,
++                                       cc);
+                         continue;
+                     }
+-                    if (peci_RdEndPointConfigPciLocal(
+-                            addr, 0, 14, 30, 2, 0xC4, sizeof(uint32_t),
+-                            (uint8_t*)&coreFIVRErrLog1, &cc) != PECI_CC_SUCCESS)
++                    peciStatus = peci_RdEndPointConfigPciLocal(
++                        addr, 0, 14, 30, 2, 0xC4, sizeof(uint32_t),
++                        (uint8_t*)&coreFIVRErrLog1, &cc);
++                    if (peciError(peciStatus, cc))
+                     {
++                        printPECIError("CORE_FIVR_ERR_LOG_1", addr, peciStatus,
++                                       cc);
+                         continue;
+                     }
+                     if (coreFIVRErrLog0 || coreFIVRErrLog1)
+@@ -746,11 +779,13 @@ static bool checkIERRCPUs()
+                     // non-zero value of UNCORE_FIVR_ERR_LOG (B(31) D30 F2
+                     // offset 84h) (Note: Bus 31 is accessed on PECI as bus 14)
+                     uint32_t uncoreFIVRErrLog = 0;
+-                    if (peci_RdEndPointConfigPciLocal(
+-                            addr, 0, 14, 30, 2, 0x84, sizeof(uint32_t),
+-                            (uint8_t*)&uncoreFIVRErrLog,
+-                            &cc) != PECI_CC_SUCCESS)
++                    peciStatus = peci_RdEndPointConfigPciLocal(
++                        addr, 0, 14, 30, 2, 0x84, sizeof(uint32_t),
++                        (uint8_t*)&uncoreFIVRErrLog, &cc);
++                    if (peciError(peciStatus, cc))
+                     {
++                        printPECIError("UNCORE_FIVR_ERR_LOG", addr, peciStatus,
++                                       cc);
+                         continue;
+                     }
+                     if (uncoreFIVRErrLog)
+@@ -1213,11 +1248,12 @@ static std::bitset<MAX_CPUS> checkERRPinCPUs(const int errPin)
+ {
+     int errPinSts = (1 << errPin);
+     std::bitset<MAX_CPUS> errPinCPUs = 0;
+-    for (int cpu = 0, addr = MIN_CLIENT_ADDR; addr <= MAX_CLIENT_ADDR;
++    for (size_t cpu = 0, addr = MIN_CLIENT_ADDR; addr <= MAX_CLIENT_ADDR;
+          cpu++, addr++)
+     {
+         if (peci_Ping(addr) == PECI_CC_SUCCESS)
+         {
++            EPECIStatus peciStatus = PECI_CC_SUCCESS;
+             uint8_t cc = 0;
+             CPUModel model{};
+             uint8_t stepping = 0;
+@@ -1234,12 +1270,16 @@ static std::bitset<MAX_CPUS> checkERRPinCPUs(const int errPin)
+                     // Check the ERRPINSTS to see if this is the CPU that caused
+                     // the ERRx (B(0) D8 F0 offset 210h)
+                     uint32_t errpinsts = 0;
+-                    if (peci_RdPCIConfigLocal(
+-                            addr, 0, 8, 0, 0x210, sizeof(uint32_t),
+-                            (uint8_t*)&errpinsts, &cc) == PECI_CC_SUCCESS)
++                    peciStatus = peci_RdPCIConfigLocal(
++                        addr, 0, 8, 0, 0x210, sizeof(uint32_t),
++                        (uint8_t*)&errpinsts, &cc);
++                    if (peciError(peciStatus, cc))
+                     {
+-                        errPinCPUs[cpu] = (errpinsts & errPinSts) != 0;
++                        printPECIError("ERRPINSTS", addr, peciStatus, cc);
++                        continue;
+                     }
++
++                    errPinCPUs[cpu] = (errpinsts & errPinSts) != 0;
+                     break;
+                 }
+                 case icx:
+@@ -1248,12 +1288,16 @@ static std::bitset<MAX_CPUS> checkERRPinCPUs(const int errPin)
+                     // the ERRx (B(30) D0 F3 offset 274h) (Note: Bus 30 is
+                     // accessed on PECI as bus 13)
+                     uint32_t errpinsts = 0;
+-                    if (peci_RdEndPointConfigPciLocal(
+-                            addr, 0, 13, 0, 3, 0x274, sizeof(uint32_t),
+-                            (uint8_t*)&errpinsts, &cc) == PECI_CC_SUCCESS)
++                    peciStatus = peci_RdEndPointConfigPciLocal(
++                        addr, 0, 13, 0, 3, 0x274, sizeof(uint32_t),
++                        (uint8_t*)&errpinsts, &cc);
++                    if (peciError(peciStatus, cc))
+                     {
+-                        errPinCPUs[cpu] = (errpinsts & errPinSts) != 0;
++                        printPECIError("ERRPINSTS", addr, peciStatus, cc);
++                        continue;
+                     }
++
++                    errPinCPUs[cpu] = (errpinsts & errPinSts) != 0;
+                     break;
+                 }
+             }
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0006-Correct-model-specific-error-code-checks-for-IERR-lo.patch b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0006-Correct-model-specific-error-code-checks-for-IERR-lo.patch
new file mode 100644
index 000000000..a1ebf7101
--- /dev/null
+++ b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0006-Correct-model-specific-error-code-checks-for-IERR-lo.patch
@@ -0,0 +1,79 @@
+From ce1995cc4854007a7c732e285b87480f323a7504 Mon Sep 17 00:00:00 2001
+From: "Jason M. Bills" <jason.m.bills@intel.com>
+Date: Tue, 22 Sep 2020 15:24:58 -0700
+Subject: [PATCH] Correct model-specific error code checks for IERR logging
+
+The model-specific error code holds a byte value that is a
+specific code.  The current logic incorrectly checks if bits
+are set rather than checking the full code.
+
+This changes the code to extract the error code byte and compare
+the full value with the expected error codes.
+
+Tested:
+Injected an IERR and confirmed that the model-specific error code
+is correctly checked.
+
+Change-Id: I671109aecf1ae5bbf707adaefaf47e95f09ca248
+Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
+---
+ src/host_error_monitor.cpp | 18 ++++++------------
+ 1 file changed, 6 insertions(+), 12 deletions(-)
+
+diff --git a/src/host_error_monitor.cpp b/src/host_error_monitor.cpp
+index 5e6d7a82c..6120a8798 100644
+--- a/src/host_error_monitor.cpp
++++ b/src/host_error_monitor.cpp
+@@ -644,9 +644,8 @@ static bool checkIERRCPUs()
+                     // MCA_SVID_VCCIN_VR_ICC_MAX_FAILURE (0x40),
+                     // MCA_SVID_VCCIN_VR_VOUT_FAILURE (0x42), or
+                     // MCA_SVID_CPU_VR_CAPABILITY_ERROR (0x43)
+-                    if ((mc4Status & (0x40 << 24)) ||
+-                        (mc4Status & (0x42 << 24)) ||
+-                        (mc4Status & (0x43 << 24)))
++                    uint64_t msec = (mc4Status >> 24) & 0xFF;
++                    if (msec == 0x40 || msec == 0x42 || msec == 0x43)
+                     {
+                         cpuIERRLog(cpu, "CPU/VR Mismatch");
+                         continue;
+@@ -696,8 +695,7 @@ static bool checkIERRCPUs()
+                     // MCA_FIVR_CATAS_OVERCUR_FAULT (0x52), then log it as an
+                     // uncore FIVR fault
+                     if (!coreFIVRErrLog && !uncoreFIVRErrLog &&
+-                        ((mc4Status & (0x51 << 24)) ||
+-                         (mc4Status & (0x52 << 24))))
++                        (msec == 0x51 || msec == 0x52))
+                     {
+                         cpuIERRLog(cpu, "Uncore FIVR Fault");
+                         continue;
+@@ -733,14 +731,12 @@ static bool checkIERRCPUs()
+                         printPECIError("IA32_MC4_STATUS", addr, peciStatus, cc);
+                         continue;
+                     }
+-                    // TODO: Update MSEC/MSCOD_31_24 check
+                     // Check MSEC bits 31:24 for
+                     // MCA_SVID_VCCIN_VR_ICC_MAX_FAILURE (0x40),
+                     // MCA_SVID_VCCIN_VR_VOUT_FAILURE (0x42), or
+                     // MCA_SVID_CPU_VR_CAPABILITY_ERROR (0x43)
+-                    if ((mc4Status & (0x40 << 24)) ||
+-                        (mc4Status & (0x42 << 24)) ||
+-                        (mc4Status & (0x43 << 24)))
++                    uint64_t msec = (mc4Status >> 24) & 0xFF;
++                    if (msec == 0x40 || msec == 0x42 || msec == 0x43)
+                     {
+                         cpuIERRLog(cpu, "CPU/VR Mismatch");
+                         continue;
+@@ -801,9 +797,7 @@ static bool checkIERRCPUs()
+                     // MCA_FIVR_CATAS_OVERCUR_FAULT (0x52), then log it as an
+                     // uncore FIVR fault
+                     if (!coreFIVRErrLog0 && !coreFIVRErrLog1 &&
+-                        !uncoreFIVRErrLog &&
+-                        ((mc4Status & (0x51 << 24)) ||
+-                         (mc4Status & (0x52 << 24))))
++                        !uncoreFIVRErrLog && (msec == 0x51 || msec == 0x52))
+                     {
+                         cpuIERRLog(cpu, "Uncore FIVR Fault");
+                         continue;
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor_%.bbappend b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor_%.bbappend
index 9853a4abc..2d6e53fe0 100644
--- a/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor_%.bbappend
+++ b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor_%.bbappend
@@ -4,4 +4,7 @@ SRC_URI += " \
        file://0001-Filter-memory-thermtrip-events-based-on-DIMM-status.patch \
        file://0002-Add-a-workaround-for-spurious-CPU-errors.patch \
        file://0003-Override-crashdump-timeout-to-30-minutes.patch \
+       file://0004-Switch-to-std-cerr-for-prints.patch \
+       file://0005-Improve-PECI-error-checking-and-reporting.patch \
+       file://0006-Correct-model-specific-error-code-checks-for-IERR-lo.patch \
         "