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authorChanh Nguyen <chanh@os.amperecomputing.com>2021-03-17 20:06:08 +0300
committerThang Q. Nguyen <thang@os.amperecomputing.com>2021-03-18 09:30:44 +0300
commit1019776111e455077be02bcfb381873c5749e55f (patch)
tree6b55c0afd97b652dd817633ef35fb6bb1a0def61 /meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
parent50a5d06c8a51b350008aa7007c20c71e3dbf04d6 (diff)
downloadopenbmc-1019776111e455077be02bcfb381873c5749e55f.tar.xz
meta-ampere:u-boot: Add GPIO configuration for DVT boards
Mt.Jade DVT hardware requires some GPIO setting so that the board can work well. This commit updates platform init function in u-boot to set required GPIO pins. Tested: 1. Verify below GPIOs set as input in Linux: - S0_I2C9_ALERT_L (GPIOM4) - S1_I2C9_ALERT_L (GPIOM5) - GPIO_BMC_VGA_FRONT_PRES_L (GPIOQ7) - GPIO_BMC_EXT_HIGHTEMP_L - GPIO_S0_VRHOT_L - GPIO_S1_VRHOT_L - GPIO_BMC_PCA9554_INT_L 2. verify below GPIOs set as output high in Linux - GPIO_BMC_I2C6_RESET_L - GPIO_BMC_JTAG_SRST_L - GPIO_BMC_VR_PMBUS_SEL_L - BMC_GPIOR2_EXT_HIGHTEMP_L - BMC_VGA_SEL Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com> Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Change-Id: I8b76387ec05c546c34c89f6f5881da3b7955a805
Diffstat (limited to 'meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend')
-rw-r--r--meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend1
1 files changed, 1 insertions, 0 deletions
diff --git a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend b/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
index 0febf924d..5fbc69f2d 100644
--- a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
+++ b/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
@@ -6,4 +6,5 @@ SRC_URI += " \
file://0003-aspeed-support-passing-system-reset-status-to-kernel.patch \
file://0004-aspeed-add-gpio-support.patch \
file://0005-aspeed-Enable-SPI-master-mode.patch \
+ file://0006-aspeed-support-Mt.Jade-platform-init.patch \
"