diff options
| author | Andrew Geissler <openbmcbump-github@yahoo.com> | 2020-03-11 01:50:31 +0300 |
|---|---|---|
| committer | Andrew Geissler <geissonator@yahoo.com> | 2020-03-17 17:03:04 +0300 |
| commit | 38642242445c33ace515302e24c95bbc31eeb2f7 (patch) | |
| tree | a01bfe2474c0b8334ba75795b96d67779418142e /meta-aspeed | |
| parent | 05d82c8093d2cfe6db1dcd17ba94fb4b2d2cbc14 (diff) | |
| download | openbmc-38642242445c33ace515302e24c95bbc31eeb2f7.tar.xz | |
intel-ipmi-oem: srcrev bump 32825a2332..eaeb6cb06c
Yong Li (3):
Enable sensitive ME commands in MFG mode
Add clear cmos OEM command into white list
Change CPLD clear cmos command register is changed to 0x61
(From meta-intel rev: 63ec0a9ab49aff56d87b4f15e1c146af947379a1)
Change-Id: Ie8147e37d3694b7150d282b178145b33a5219204
Signed-off-by: Andrew Geissler <openbmcbump-github@yahoo.com>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Diffstat (limited to 'meta-aspeed')
0 files changed, 0 insertions, 0 deletions