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author | jmbills <jason.m.bills@intel.com> | 2021-08-03 01:45:08 +0300 |
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committer | GitHub <noreply@github.com> | 2021-08-03 01:45:08 +0300 |
commit | 10ad77d5bc86709d8ff7f95e7040e39f1c153903 (patch) | |
tree | 307cedb87f4c0a329740c55ac364ed489d1d8fc2 /meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0007-ast2600-Override-OTP-strap-settings.patch | |
parent | c6b1c6ba7a01b7987d65d61c262c44c320193108 (diff) | |
parent | 67327ddc580cb9a85219a534844832a1682780d4 (diff) | |
download | openbmc-10ad77d5bc86709d8ff7f95e7040e39f1c153903.tar.xz |
Update
Diffstat (limited to 'meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0007-ast2600-Override-OTP-strap-settings.patch')
-rw-r--r-- | meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0007-ast2600-Override-OTP-strap-settings.patch | 28 |
1 files changed, 6 insertions, 22 deletions
diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0007-ast2600-Override-OTP-strap-settings.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0007-ast2600-Override-OTP-strap-settings.patch index c4b8a00ef..bab279c40 100644 --- a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0007-ast2600-Override-OTP-strap-settings.patch +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0007-ast2600-Override-OTP-strap-settings.patch @@ -1,4 +1,4 @@ -From 844e425a503c56bd84dbfe5396c5f8f9b4284e6d Mon Sep 17 00:00:00 2001 +From 053770be23c7826efefa9b7b087d8b285bf8bbcd Mon Sep 17 00:00:00 2001 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Date: Wed, 29 Jan 2020 14:55:44 -0800 Subject: [PATCH] ast2600: Override OTP strap settings @@ -8,11 +8,11 @@ Also, this commit disables SoC debug interface. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> --- - arch/arm/mach-aspeed/ast2600/platform.S | 24 ++++++++++++++++++++++-- - 1 file changed, 22 insertions(+), 2 deletions(-) + arch/arm/mach-aspeed/ast2600/platform.S | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S -index f96ef1f0dac4..3b6f91a60c3d 100644 +index 81520b0f036e..e479d0276d39 100644 --- a/arch/arm/mach-aspeed/ast2600/platform.S +++ b/arch/arm/mach-aspeed/ast2600/platform.S @@ -44,7 +44,9 @@ @@ -22,10 +22,10 @@ index f96ef1f0dac4..3b6f91a60c3d 100644 +#define AST_SCU_HW_STRAP1_CLR (AST_SCU_BASE + 0x504) #define AST_SCU_HW_STRAP2 (AST_SCU_BASE + 0x510) +#define AST_SCU_HW_STRAP2_CLR (AST_SCU_BASE + 0x514) + #define AST_SCU_HW_STRAP3 (AST_SCU_BASE + 0x51C) #define AST_SCU_CA7_PARITY_CHK (AST_SCU_BASE + 0x820) #define AST_SCU_CA7_PARITY_CLR (AST_SCU_BASE + 0x824) - #define AST_SCU_MMIO_DEC_SET (AST_SCU_BASE + 0xC24) -@@ -175,6 +177,26 @@ do_primary_core_setup: +@@ -176,6 +178,26 @@ do_primary_core_setup: /* unlock system control unit */ scu_unlock @@ -52,22 +52,6 @@ index f96ef1f0dac4..3b6f91a60c3d 100644 /* identify AST2600 A0/A1 */ ldr r0, =AST_SCU_REV_ID ldr r0, [r0] -@@ -277,7 +299,6 @@ skip_fill_wip_bit: - ldr r1, =AST_FMC_WDT1_CTRL_MODE - str r0, [r1] - --#if 0 - /* disable UART-based SoC Debug Interface UART5 and P2A bridge*/ - ldr r0, =AST_SCU_DEBUG_CTRL - ldr r1, [r0] -@@ -289,7 +310,6 @@ skip_fill_wip_bit: - ldr r1, [r0] - orr r1, #0x0A - str r1, [r0] --#endif - - /* relocate mailbox insn. for cpuN polling SMP go signal */ - adrl r0, mailbox_insn -- 2.17.1 |