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| author | Jason M. Bills <jason.m.bills@linux.intel.com> | 2021-06-24 02:18:49 +0300 |
|---|---|---|
| committer | Jason M. Bills <jason.m.bills@linux.intel.com> | 2021-06-24 03:07:59 +0300 |
| commit | defdca82c107f46e980c84bffb1b2c1263522fa0 (patch) | |
| tree | c31fba338a65c86741b16e061d66e0e060e3b768 /meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-Enable-PCIe-L1-support.patch | |
| parent | 5565c9abcc817b88098b849b2de5c017a8fb559f (diff) | |
| download | openbmc-defdca82c107f46e980c84bffb1b2c1263522fa0.tar.xz | |
Update to internal 0.57
Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>
Diffstat (limited to 'meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-Enable-PCIe-L1-support.patch')
| -rw-r--r-- | meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-Enable-PCIe-L1-support.patch | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-Enable-PCIe-L1-support.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-Enable-PCIe-L1-support.patch deleted file mode 100644 index 8cc95174f..000000000 --- a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-Enable-PCIe-L1-support.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 1f95d121b4a11444bffd0494bcfff1986e0905b6 Mon Sep 17 00:00:00 2001 -From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> -Date: Tue, 8 Jan 2019 13:33:15 -0800 -Subject: [PATCH] Enable PCIe L1 support - -This commit enables PCIe L1 support using magic registers. - -Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> ---- - arch/arm/mach-aspeed/ast2600/platform.S | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - -diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S -index cd8a57edd76b..ecc9fd33d125 100644 ---- a/arch/arm/mach-aspeed/ast2600/platform.S -+++ b/arch/arm/mach-aspeed/ast2600/platform.S -@@ -299,6 +299,20 @@ wait_lock: - bic r1, r2 - str r1, [r0] - -+ /* enable PCIe L1 support */ -+ ldr r0, =0x1e6ed07c -+ ldr r1, =0xa8 -+ str r1, [r0] -+ ldr r0, =0x1e6ed010 -+ ldr r1, =0x27040fe1 -+ str r1, [r0] -+ ldr r0, =0x1e6ed068 -+ ldr r1, =0xc81f0a -+ str r1, [r0] -+ ldr r0, =0x1e6ed07c -+ mov r1, #0 -+ str r1, [r0] -+ - /* MMIO decode setting */ - ldr r0, =AST_SCU_MMIO_DEC_SET - mov r1, #0x2000 --- -2.17.1 - |