Update to internal 0.29

Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>

5 files changed, 92 insertions, 2 deletions

diff --git a/meta-openbmc-mods/meta-ast2600/conf/layer.conf b/meta-openbmc-mods/meta-ast2600/conf/layer.conf
index e269ae5a5..967bff8c7 100644
--- a/meta-openbmc-mods/meta-ast2600/conf/layer.conf
+++ b/meta-openbmc-mods/meta-ast2600/conf/layer.conf
@@ -9,7 +9,7 @@ BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
 BBFILE_COLLECTIONS += "ast2600"
 BBFILE_PATTERN_ast2600 = ""
 BBFILE_PRIORITY_ast2600 = "4"
-LAYERSERIES_COMPAT_ast2600 = "zeus dunfell"
+LAYERSERIES_COMPAT_ast2600 = "dunfell gatesgarth"
 
 INHERIT += "extrausers"
 #INHERIT += " cve-check"
diff --git a/meta-openbmc-mods/meta-ast2600/conf/machine/include/obmc-bsp-si-common.inc b/meta-openbmc-mods/meta-ast2600/conf/machine/include/obmc-bsp-si-common.inc
index f5a0d9ad0..06e4a2ed3 100644
--- a/meta-openbmc-mods/meta-ast2600/conf/machine/include/obmc-bsp-si-common.inc
+++ b/meta-openbmc-mods/meta-ast2600/conf/machine/include/obmc-bsp-si-common.inc
@@ -7,6 +7,7 @@ EXTRA_IMAGEDEPENDS += "u-boot"
 
 IMAGE_FSTYPES += "squashfs-xz"
 IMAGE_FSTYPES += "mtd-auto"
+INITRAMFS_FSTYPES = "squashfs-xz"
 EXTRA_IMAGECMD_squashfs-xz_append = "-processors ${BB_NUMBER_THREADS} -b 262144 -Xdict-size 100% -Xbcj arm"
 
 KERNEL_CLASSES ?= "kernel-fitimage"
@@ -36,6 +37,9 @@ QB_SYSTEM_NAME = "qemu-system-arm"
 QB_DEFAULT_FSTYPE = "mtd"
 QB_ROOTFS_OPT = "-drive file=@ROOTFS@,format=raw,if=mtd"
 QB_MACHINE = "-M intel-ast2600"
-QB_OPT_APPEND += " -nographic"
+QB_OPT_APPEND += " -nographic -serial mon:stdio -serial none"
+QB_OPT_APPEND += " -global driver=aspeed.gpio-ast2600,property=gpioC0,value=true"
 QB_NETWORK_DEVICE = "-net nic,macaddr=C0:FF:EE:00:00:02,model=ftgmac100"
 QB_DEFAULT_KERNEL = "none"
+QB_RNG = ""
+QB_MEM = "1024"
diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-Enable-PCIe-L1-support.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-Enable-PCIe-L1-support.patch
new file mode 100644
index 000000000..8cc95174f
--- /dev/null
+++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-Enable-PCIe-L1-support.patch
@@ -0,0 +1,40 @@
+From 1f95d121b4a11444bffd0494bcfff1986e0905b6 Mon Sep 17 00:00:00 2001
+From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+Date: Tue, 8 Jan 2019 13:33:15 -0800
+Subject: [PATCH] Enable PCIe L1 support
+
+This commit enables PCIe L1 support using magic registers.
+
+Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+---
+ arch/arm/mach-aspeed/ast2600/platform.S | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S
+index cd8a57edd76b..ecc9fd33d125 100644
+--- a/arch/arm/mach-aspeed/ast2600/platform.S
++++ b/arch/arm/mach-aspeed/ast2600/platform.S
+@@ -299,6 +299,20 @@ wait_lock:
+ 	bic	r1, r2
+ 	str	r1, [r0]
+ 
++	/* enable PCIe L1 support */
++	ldr	r0, =0x1e6ed07c
++	ldr	r1, =0xa8
++	str	r1, [r0]
++	ldr	r0, =0x1e6ed010
++	ldr	r1, =0x27040fe1
++	str	r1, [r0]
++	ldr	r0, =0x1e6ed068
++	ldr	r1, =0xc81f0a
++	str	r1, [r0]
++	ldr	r0, =0x1e6ed07c
++	mov	r1, #0
++	str	r1, [r0]
++
+ 	/* MMIO decode setting */
+ 	ldr	r0, =AST_SCU_MMIO_DEC_SET
+ 	mov	r1, #0x2000
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch
new file mode 100644
index 000000000..119db1318
--- /dev/null
+++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch
@@ -0,0 +1,44 @@
+From 298f34e528c3e64e5e10403380832df91f986f12 Mon Sep 17 00:00:00 2001
+From: Chalapathi Venkataramashetty <chalapathix.venkataramashetty@intel.com>
+Date: Tue, 8 Dec 2020 10:44:53 +0000
+Subject: [PATCH] ast2600:PFR platform - EXTRST# reset mask selection
+
+This is a fix taken from Purely PFR.
+This commit will enable specific reset mask for EXTRST# signal.
+On PFR platforms, EXTRST# signal is used by PFR CPLD to put BMC
+in reset during firmware authentications, recovery and firmware
+update flow, during which certain modules of BMC should be chosen
+to be reset so that Host functionality would be intact.
+
+Signed-off-by: Chalapathi Venkataramashetty <chalapathix.venkataramashetty@intel.com>
+---
+ arch/arm/mach-aspeed/ast2600/platform.S | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S
+index cd8a57edd7..6756aee804 100644
+--- a/arch/arm/mach-aspeed/ast2600/platform.S
++++ b/arch/arm/mach-aspeed/ast2600/platform.S
+@@ -39,6 +39,7 @@
+ #define AST_SCU_REV_ID			(AST_SCU_BASE + 0x014)
+ #define AST_SCU_SYSRST_CTRL		(AST_SCU_BASE + 0x040)
+ #define AST_SCU_SYSRST_CTRL_CLR		(AST_SCU_BASE + 0x044)
++#define AST_SCU_EXTRST_SEL		(AST_SCU_BASE + 0x060)
+ #define AST_SCU_DEBUG_CTRL              (AST_SCU_BASE + 0x0C8)
+ #define AST_SCU_DEBUG_CTRL2             (AST_SCU_BASE + 0x0D8)
+ #define AST_SCU_HPLL_PARAM		(AST_SCU_BASE + 0x200)
+@@ -285,6 +286,11 @@ wait_lock:
+ 	str	r1, [r0]
+ 
+ 1:
++	/* SCU060:EXTRST# reset mask selection */
++	ldr 	r0, =AST_SCU_EXTRST_SEL
++	ldr 	r1, =0x00FF1FF5
++	str 	r1, [r0]
++
+ 	/* disable eSPI, LPC and PWM resets on WDT1 reset */
+ 	ldr	r0, =AST_WDT1_RESET_MASK2
+ 	ldr	r1, [r0]
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend
index 4f0d75c12..3747fbdfb 100644
--- a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend
+++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend
@@ -30,6 +30,8 @@ SRC_URI_append_intel-ast2600 = " \
     file://0022-Reboot-into-UBOOT-on-Watchdog-Failures.patch \
     file://0023-Add-WDT-to-u-boot-to-cover-booting-failures.patch \
     file://0024-fix-SUS_WARN-handling-logic.patch \
+    file://0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch \
+    file://0025-Enable-PCIe-L1-support.patch \
     "
 
 # CVE-2020-10648 vulnerability fix