summaryrefslogtreecommitdiff
path: root/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch
diff options
context:
space:
mode:
authorJason M. Bills <jason.m.bills@linux.intel.com>2020-05-06 01:31:17 +0300
committerJason M. Bills <jason.m.bills@linux.intel.com>2020-05-14 21:54:34 +0300
commiteda2c7c523d858d25fe25052254a7f393767310b (patch)
tree7c14ec3de42b7fc6c86bc3b0f9ecb4b9f21a5d14 /meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch
parent794d26fa53ad7e8cb54a3a5773436b1d8e813f35 (diff)
downloadopenbmc-eda2c7c523d858d25fe25052254a7f393767310b.tar.xz
Update to internal 0.53
Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>
Diffstat (limited to 'meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch')
-rw-r--r--meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch36
1 files changed, 0 insertions, 36 deletions
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch
deleted file mode 100644
index 6949856db..000000000
--- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 647cc2538ed6b64054c742b4668386fda9394221 Mon Sep 17 00:00:00 2001
-From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
-Date: Tue, 8 Jan 2019 13:33:15 -0800
-Subject: [PATCH] Enable PCIe L1 support
-
-This commit enables PCIe L1 support using magic registers.
-
-Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
-
----
- arch/arm/mach-aspeed/platform_g5.S | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S
-index 66427b6..b404353 100644
---- a/arch/arm/mach-aspeed/platform_g5.S
-+++ b/arch/arm/mach-aspeed/platform_g5.S
-@@ -2432,6 +2432,18 @@ spi_cbr_end:
- bic r1, r1, #0x00400000
- str r1, [r0]
-
-+ ldr r0, =0x1e6ed07c @ Enable PCIe L1 support
-+ ldr r1, =0xa8
-+ str r1, [r0]
-+
-+ ldr r0, =0x1e6ed068
-+ ldr r1, =0xc81f0a
-+ str r1, [r0]
-+
-+ ldr r0, =0x1e6ed07c
-+ mov r1, #0
-+ str r1, [r0]
-+
- /******************************************************************************
- Configure MAC timing
- ******************************************************************************/