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authorEd Tanous <ed.tanous@intel.com>2019-08-19 21:16:19 +0300
committerEd Tanous <ed@tanous.net>2019-08-20 18:56:17 +0300
commit35e295e2a161fcf146ea031de53431b2888521fa (patch)
treea0c78943fef5c085f371aaa840d46edecc1f2e95 /meta-openbmc-mods/meta-common/recipes-bsp/u-boot
parent9856ac69064742544fafad307d3ee4544385ffa2 (diff)
downloadopenbmc-35e295e2a161fcf146ea031de53431b2888521fa.tar.xz
Sync to internal 8-19-2019
Signed-off-by: Ed Tanous <ed.tanous@intel.com>
Diffstat (limited to 'meta-openbmc-mods/meta-common/recipes-bsp/u-boot')
-rw-r--r--meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0025-Manufacturing-mode-physical-presence-detection.patch39
-rw-r--r--meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0032-Adding-PFR-boot-flow-checkpoint-in-u-boot.patch102
-rw-r--r--meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch (renamed from meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0033-PFR-firmware-update-support-in-u-boot.patch)81
-rw-r--r--meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0033-Reboot-into-UBOOT-on-Watchdog-Failures.patch110
-rw-r--r--meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend4
-rw-r--r--meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-fw-utils-aspeed_%.bbappend4
6 files changed, 205 insertions, 135 deletions
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0025-Manufacturing-mode-physical-presence-detection.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0025-Manufacturing-mode-physical-presence-detection.patch
index 7e75acb02..2d63314af 100644
--- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0025-Manufacturing-mode-physical-presence-detection.patch
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0025-Manufacturing-mode-physical-presence-detection.patch
@@ -1,17 +1,23 @@
-From 0e83d58efe5bd34430c953713285293cd0756b69 Mon Sep 17 00:00:00 2001
+From 4c87d6074fb36d423f135392983d225785abf43a Mon Sep 17 00:00:00 2001
From: AppaRao Puli <apparao.puli@linux.intel.com>
Date: Thu, 20 Jun 2019 18:11:43 +0530
Subject: [PATCH] Manufacturing mode physical presence detection
Support for physical presence of manufacturing mode added.
-Front panel power button press for 8 seconds will be detected
-and marked as special mode for manufacturing request
+Front panel power button press for 15 seconds will be detected
+and marked as special mode for manufacturing request.
+There will be 10 second Status LED blink for 10 seconds to
+do the physical indication to the user. This indicates the
+user that he has pressed power button long enough for
+manufacturing mode detection.
Tested:
1. Verified by holding the power button when u-boot boots for
-8 seconds, and confirmed that bootargs passed to linux has
-special=mfg string
-2. Verified in normal condition special=mfg string is not passed.
+15 seconds, and confirmed that bootargs passed to linux has
+special=mfg string and status led blink physical indication
+has been provided
+2. Verified in normal condition special=mfg string is not passed
+and no physical indication has been provided
Change-Id: Id7e7c7e7860c7ef3ae8e3a7a7cfda7ff506c0f2b
Signed-off-by: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com>
@@ -19,8 +25,8 @@ Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com>
---
board/aspeed/ast-g5/ast-g5-gpio.h | 2 +-
- board/aspeed/ast-g5/ast-g5-intel.c | 31 +++++++++++++++++++++++++++++++
- 2 files changed, 32 insertions(+), 1 deletion(-)
+ board/aspeed/ast-g5/ast-g5-intel.c | 35 +++++++++++++++++++++++++++++++++++
+ 2 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/board/aspeed/ast-g5/ast-g5-gpio.h b/board/aspeed/ast-g5/ast-g5-gpio.h
index a820c0f..ed2499f 100644
@@ -36,7 +42,7 @@ index a820c0f..ed2499f 100644
// GPIO Configuration Register bits
#define GPCFG_EVENT_TO_SMI (1 << 7) // 1 == enabled
diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
-index 55afa09..812e3ef 100644
+index 55afa09..452cb5c 100644
--- a/board/aspeed/ast-g5/ast-g5-intel.c
+++ b/board/aspeed/ast-g5/ast-g5-intel.c
@@ -24,6 +24,7 @@ enum gpio_names {
@@ -58,7 +64,7 @@ index 55afa09..812e3ef 100644
};
#define LPC_SNOOP_ADDR 0x80
-@@ -373,6 +378,26 @@ static void update_bootargs_cmd(const char *key, const char *value)
+@@ -373,6 +378,30 @@ static void update_bootargs_cmd(const char *key, const char *value)
free(buf);
}
@@ -66,11 +72,12 @@ index 55afa09..812e3ef 100644
+{
+ /*
+ * Assume mfg mode physical request is made, if power button
-+ * is pressed continously for 8 seconds, indicate the
++ * is pressed continously for 15 seconds, indicate the
+ * same in bootargs
+ */
+ const uint32_t delay_in_ms = 100;
-+ const uint32_t read_count = ((8 * 1000) / delay_in_ms);
++ const uint32_t read_count = ((15 * 1000) / delay_in_ms);
++ const uint32_t delay_for_indication = 10 * 1000;
+ for (uint32_t count = 0; count < read_count; ++count) {
+ if (!gpio_get_value(GPIO_FP_PWR_BTN))
+ return false;
@@ -78,6 +85,9 @@ index 55afa09..812e3ef 100644
+ mdelay(delay_in_ms);
+ }
+ debug("is_mfg_mode_phy_req : detected mfg mode request\n");
++ id_led_control(GPIO_GREEN_LED, EIDLED_Blink_3HZ);
++ /* Delay the boot to do physical indication for mfg mode */
++ mdelay(delay_for_indication);
+
+ return true;
+}
@@ -85,7 +95,7 @@ index 55afa09..812e3ef 100644
void ast_g5_intel_late_init(void)
{
char value[32];
-@@ -420,6 +445,12 @@ void ast_g5_intel_late_init(void)
+@@ -420,6 +449,12 @@ void ast_g5_intel_late_init(void)
ast_scu_write(0, AST_SCU_SYS_CTRL);
update_bootargs_cmd("resetreason", value);
@@ -98,3 +108,6 @@ index 55afa09..812e3ef 100644
}
static void pwm_init(void)
+--
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0032-Adding-PFR-boot-flow-checkpoint-in-u-boot.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0032-Adding-PFR-boot-flow-checkpoint-in-u-boot.patch
deleted file mode 100644
index b76a3dba0..000000000
--- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0032-Adding-PFR-boot-flow-checkpoint-in-u-boot.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From dda24946edd0a4ec54e3ecaa8bd493cce9bdfa15 Mon Sep 17 00:00:00 2001
-From: AppaRao Puli <apparao.puli@linux.intel.com>
-Date: Mon, 22 Jul 2019 08:26:15 +0530
-Subject: [PATCH] Adding PFR boot flow checkpoint in u-boot
-
-Added two PFR boot flow check points in u-boot
-1) Set the booting starts checkpoint(0x01)
-2) Set FFUJ checkpoint(0x07) when jumper on.
-
-Tested:
-Loaded the image, dumped all cpld registers and
-cross verified the check-points properly set or not.
-
-Change-Id: I3c725b0e15c1fea5bdb7b085826bdabad19bda80
-Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com>
----
- board/aspeed/ast-g5/ast-g5-intel.c | 46 ++++++++++++++++++++++++++++++++++++++
- 1 file changed, 46 insertions(+)
-
-diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
-index e68ab85..9f0a64d 100644
---- a/board/aspeed/ast-g5/ast-g5-intel.c
-+++ b/board/aspeed/ast-g5/ast-g5-intel.c
-@@ -12,11 +12,21 @@
- #include <asm/arch/regs-scu.h>
- #include <asm/arch/ast_scu.h>
- #include <asm/arch/aspeed.h>
-+#include <i2c.h>
-
- #include "ast-g5.h"
- #include "ast-g5-gpio.h"
- #include "ast-g5-timer.h"
-
-+/* PFR Specific defines */
-+#define PFR_CPLD_I2C_BUSNO 4
-+#define PFR_CPLD_SLAVE_ADDR 0xE0
-+#define PFR_CPLD_BOOT_CHECKPOINT_REG 0x13
-+
-+#define PFR_CPLD_CHKPOINT_START 0x01
-+#define PFR_CPLD_CHKPOINT_FFUJ 0x07
-+#define PFR_CPLD_CHKPOINT_FINISHED 0x09
-+
- /* Names to match the GPIOs */
- enum gpio_names {
- GPIO_ID_LED = 0,
-@@ -537,10 +547,42 @@ static void pwm_init(void)
- writel(val, PWM_BASE_ADDR + PWM_CONTROL);
- }
-
-+static void set_boot_checkpoint(u8 chk_point)
-+{
-+ int ret = 0;
-+ int chip = (PFR_CPLD_SLAVE_ADDR >> 1);
-+ u32 reg_addr = PFR_CPLD_BOOT_CHECKPOINT_REG;
-+
-+ /* Get current I2C bus number to restore later. */
-+ int current_bus_no = i2c_get_bus_num();
-+
-+ /* Set I2C bus number to PFR CPLD I2C bus. */
-+ ret = i2c_set_bus_num(PFR_CPLD_I2C_BUSNO);
-+ if (ret) {
-+ printf("Failed to change I2C bus number (%d)\n", ret);
-+ goto done;
-+ }
-+
-+ ret = i2c_write(chip, reg_addr, 1, &chk_point, 1);
-+ if (ret) {
-+ printf("Error writing the chip: %d\n", ret);
-+ goto done;
-+ }
-+
-+done:
-+ /* Restore I2C bus number */
-+ if (i2c_set_bus_num(current_bus_no))
-+ printf("Failed to restore I2C bus number.\n");
-+}
-+
- extern void espi_init(void);
- extern void kcs_init(void);
- void ast_g5_intel(void)
- {
-+ /* To notify the CPLD about the start of bootloader
-+ * and hardware initialization */
-+ set_boot_checkpoint(PFR_CPLD_CHKPOINT_START);
-+
- uart_init();
- pwm_init();
- gpio_init(gpio_table, ARRAY_SIZE(gpio_table));
-@@ -551,6 +593,10 @@ void ast_g5_intel(void)
- if (intel_force_firmware_jumper_enabled()) {
- id_led_control(GPIO_AMBER_LED, EIDLED_On);
- kcs_init();
-+ /* Notify CPLD about FFUJ jumper set and pause
-+ * of booting for indefinitely time. It will be
-+ * resumed once reset is done. */
-+ set_boot_checkpoint(PFR_CPLD_CHKPOINT_FFUJ);
- /* TODO: need to stop the booting here. */
- } else {
- id_led_control(GPIO_GREEN_LED, EIDLED_On);
---
-2.7.4
-
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0033-PFR-firmware-update-support-in-u-boot.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch
index 80a949a87..7700e067f 100644
--- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0033-PFR-firmware-update-support-in-u-boot.patch
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch
@@ -1,28 +1,36 @@
-From d9287ee5f3b797fd492ec78617c174ad20e85bc4 Mon Sep 17 00:00:00 2001
+From 0c975e64ca8bd5fdaf12f15b4dbc9ceaa942c36c Mon Sep 17 00:00:00 2001
From: AppaRao Puli <apparao.puli@linux.intel.com>
Date: Wed, 24 Jul 2019 20:11:30 +0530
-Subject: [PATCH] PFR firmware update support in u-boot
+Subject: [PATCH] PFR FW update and checkpoint support in u-boot
-Added firmware update ipmi commands support
+1) Added firmware update ipmi commands support
for PFR images. This enables PFR based firmware
updates for components BMC, BIOS and CPLD during
FFUJ mode.
+2) Added two PFR boot flow checkpoint in u-boot
+ - Set the booting starts checkpoint(0x01)
+ - Set FFUJ checkpoint(0x07) when jumper on.
+
+Tested:
+
Tested:
-Using debug fwpiaupd.efi utility, validated the PFR
-BMC image update.
+1) Using debug fwpiaupd.efi utility, validated the PFR
+BMC image update via KCS ( In FFUJ mode).
+2) Loaded the image, dumped all cpld registers and
+cross verified the check-points properly set or not.
-Change-Id: Ic2b550c42208f52ec865da463e6518bf8c503c15
Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com>
---
- board/aspeed/ast-g5/Makefile | 1 +
- board/aspeed/ast-g5/fw-update.c | 112 ++++++++++++++++++++-------------------
- board/aspeed/ast-g5/fw-update.h | 7 +++
- board/aspeed/ast-g5/ipmi-fwupd.c | 37 +++++++++++++
- board/aspeed/ast-g5/ipmi-fwupd.h | 6 ---
- board/aspeed/ast-g5/pfr-mgr.c | 73 +++++++++++++++++++++++++
- board/aspeed/ast-g5/pfr-mgr.h | 67 +++++++++++++++++++++++
- 7 files changed, 242 insertions(+), 61 deletions(-)
+ board/aspeed/ast-g5/Makefile | 1 +
+ board/aspeed/ast-g5/ast-g5-intel.c | 10 ++++
+ board/aspeed/ast-g5/fw-update.c | 112 +++++++++++++++++++------------------
+ board/aspeed/ast-g5/fw-update.h | 7 +++
+ board/aspeed/ast-g5/ipmi-fwupd.c | 37 ++++++++++++
+ board/aspeed/ast-g5/ipmi-fwupd.h | 6 --
+ board/aspeed/ast-g5/pfr-mgr.c | 73 ++++++++++++++++++++++++
+ board/aspeed/ast-g5/pfr-mgr.h | 73 ++++++++++++++++++++++++
+ 8 files changed, 258 insertions(+), 61 deletions(-)
create mode 100644 board/aspeed/ast-g5/pfr-mgr.c
create mode 100644 board/aspeed/ast-g5/pfr-mgr.h
@@ -35,6 +43,41 @@ index 0b2d936..9021d7f 100644
obj-y += ipmi-fwupd.o
obj-y += fw-update.o
+obj-y += pfr-mgr.o
+diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
+index e68ab85..cd359ce 100644
+--- a/board/aspeed/ast-g5/ast-g5-intel.c
++++ b/board/aspeed/ast-g5/ast-g5-intel.c
+@@ -16,6 +16,7 @@
+ #include "ast-g5.h"
+ #include "ast-g5-gpio.h"
+ #include "ast-g5-timer.h"
++#include "pfr-mgr.h"
+
+ /* Names to match the GPIOs */
+ enum gpio_names {
+@@ -541,6 +542,10 @@ extern void espi_init(void);
+ extern void kcs_init(void);
+ void ast_g5_intel(void)
+ {
++ /* To notify the CPLD about the start of bootloader
++ * and hardware initialization */
++ set_cpld_reg(PFR_CPLD_BOOT_CHECKPOINT_REG, PFR_CPLD_CHKPOINT_START);
++
+ uart_init();
+ pwm_init();
+ gpio_init(gpio_table, ARRAY_SIZE(gpio_table));
+@@ -551,6 +556,11 @@ void ast_g5_intel(void)
+ if (intel_force_firmware_jumper_enabled()) {
+ id_led_control(GPIO_AMBER_LED, EIDLED_On);
+ kcs_init();
++ /* Notify CPLD about FFUJ jumper set and pause
++ * of booting for indefinitely time. It will be
++ * resumed once reset is done. */
++ set_cpld_reg(PFR_CPLD_BOOT_CHECKPOINT_REG,
++ PFR_CPLD_CHKPOINT_FFUJ);
+ /* TODO: need to stop the booting here. */
+ } else {
+ id_led_control(GPIO_GREEN_LED, EIDLED_On);
diff --git a/board/aspeed/ast-g5/fw-update.c b/board/aspeed/ast-g5/fw-update.c
index 9923993..89fe5fd 100644
--- a/board/aspeed/ast-g5/fw-update.c
@@ -404,10 +447,10 @@ index 0000000..7713168
+
diff --git a/board/aspeed/ast-g5/pfr-mgr.h b/board/aspeed/ast-g5/pfr-mgr.h
new file mode 100644
-index 0000000..b2368e1
+index 0000000..6cf8c6d
--- /dev/null
+++ b/board/aspeed/ast-g5/pfr-mgr.h
-@@ -0,0 +1,67 @@
+@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018-2019 Intel Corporation
+
@@ -418,8 +461,14 @@ index 0000000..b2368e1
+#define PFR_CPLD_SLAVE_ADDR 0xE0
+
+/* CPLD registers */
++#define PFR_CPLD_BOOT_CHECKPOINT_REG 0x0F
+#define PFR_CPLD_BMC_UPDATE_INTENT_REG 0x13
+
++/* PFR checkpoints */
++#define PFR_CPLD_CHKPOINT_START 0x01
++#define PFR_CPLD_CHKPOINT_FFUJ 0x07
++#define PFR_CPLD_CHKPOINT_FINISHED 0x09
++
+#define PFR_BLOCK0_MAGIC_NUM 0xB6EAFD19
+#define PFR_AUTH_DATA_STRUCT_LEN 1024 /* Block0 & Block1 */
+
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0033-Reboot-into-UBOOT-on-Watchdog-Failures.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0033-Reboot-into-UBOOT-on-Watchdog-Failures.patch
new file mode 100644
index 000000000..e673da7ee
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0033-Reboot-into-UBOOT-on-Watchdog-Failures.patch
@@ -0,0 +1,110 @@
+From c82bf9de515cbbdb4ea1a350be83fb89f4a83631 Mon Sep 17 00:00:00 2001
+From: James Feist <james.feist@linux.intel.com>
+Date: Wed, 31 Jul 2019 16:01:49 -0700
+Subject: [PATCH 1/1] Reboot into UBOOT on Watchdog Failures
+
+We use watchdog1 to reboot when there is a watchdog
+error. Reboot into u-boot as we are using that as
+safe mode.
+
+Tested: watchdog -T 0 -F /dev/watchdog1 reboots into
+uboot after 3 times
+
+Signed-off-by: James Feist <james.feist@linux.intel.com>
+---
+ .../include/asm/arch-aspeed/ast-g5-intel.h | 1 +
+ board/aspeed/ast-g5/ast-g5-intel.c | 31 +++++++++++++++++++
+ common/autoboot.c | 2 ++
+ 3 files changed, 34 insertions(+)
+
+diff --git a/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h
+index a88521a1b3..64f4ed17bf 100644
+--- a/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h
++++ b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h
+@@ -14,6 +14,7 @@
+
+ #ifndef __ASSEMBLY__
+ int intel_force_firmware_jumper_enabled(void);
++int intel_failed_boot(void);
+ void start_fw_update_loop(void);
+ #endif
+
+diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
+index e68ab8546a..c003d9a7bc 100644
+--- a/board/aspeed/ast-g5/ast-g5-intel.c
++++ b/board/aspeed/ast-g5/ast-g5-intel.c
+@@ -111,6 +111,24 @@ static const GPIOValue gpio_table[] = {
+ #define HOST_SERIAL_A_HIGH_SPEED (1 << 0)
+ #define HOST_SERIAL_B_HIGH_SPEED (1 << 1)
+
++#define WATCHDOG_RESET_BIT 0x8
++#define BOOT_FAILURE_LIMIT 0x3
++
++static int get_boot_failures(void)
++{
++ return getenv_ulong("bootfailures", 10, 0);
++}
++
++static void set_boot_failures(u32 count)
++{
++ if (count > BOOT_FAILURE_LIMIT)
++ return;
++
++ setenv_ulong("bootfailures", count);
++ saveenv();
++}
++
++
+ static void sgpio_init(void)
+ {
+ uint32_t value;
+@@ -270,6 +288,11 @@ int intel_force_firmware_jumper_enabled(void)
+ return gpio_get_value(GPIO_FF_UPD_JUMPER);
+ }
+
++int intel_failed_boot(void)
++{
++ return get_boot_failures() >= BOOT_FAILURE_LIMIT;
++}
++
+ void arch_preboot_os(void)
+ {
+ // last second before booting... set the LEDs
+@@ -402,6 +425,7 @@ void ast_g5_intel_late_init(void)
+ {
+ char value[32];
+ u32 reset_reason = 0;
++ u32 boot_failures = 0;
+
+ /* By default host serail A and B use normal speed */
+ uint32_t host_serial_cfg = 0;
+@@ -446,6 +470,13 @@ void ast_g5_intel_late_init(void)
+
+ update_bootargs_cmd("resetreason", value);
+
++ boot_failures = get_boot_failures();
++
++ if (reset_reason & WATCHDOG_RESET_BIT)
++ set_boot_failures(boot_failures + 1);
++ else
++ set_boot_failures(0);
++
+ /* Update the special mode in bootargs */
+ if (is_mfg_mode_phy_req())
+ update_bootargs_cmd("special", "mfg");
+diff --git a/common/autoboot.c b/common/autoboot.c
+index 45a600e663..03fd164501 100644
+--- a/common/autoboot.c
++++ b/common/autoboot.c
+@@ -263,6 +263,8 @@ static int abortboot(int bootdelay)
+ # ifdef AST_G5_INTEL
+ if (intel_force_firmware_jumper_enabled())
+ return 1;
++ if (intel_failed_boot())
++ return 1;
+ # endif
+
+ if (bootdelay >= 0)
+--
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
index 5d8c10a76..09544cfb2 100644
--- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
@@ -33,11 +33,11 @@ SRC_URI_append_intel-ast2500 = " \
file://0029-FFUJ-FW-IPMI-commands-and-flash-support-in-u-boot.patch \
file://0030-Support-Get-Set-Security-mode-command.patch \
file://0031-Make-it-so-TFTP-port-can-be-modified.patch \
+ file://0033-Reboot-into-UBOOT-on-Watchdog-Failures.patch \
"
PFR_SRC_URI = " \
file://0022-u-boot-env-change-for-PFR-image.patch \
- file://0032-Adding-PFR-boot-flow-checkpoint-in-u-boot.patch \
- file://0033-PFR-firmware-update-support-in-u-boot.patch \
+ file://0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch \
"
SRC_URI_append_intel-ast2500 += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', PFR_SRC_URI, '', d)}"
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-fw-utils-aspeed_%.bbappend b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-fw-utils-aspeed_%.bbappend
index 5d8c10a76..09544cfb2 100644
--- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-fw-utils-aspeed_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-fw-utils-aspeed_%.bbappend
@@ -33,11 +33,11 @@ SRC_URI_append_intel-ast2500 = " \
file://0029-FFUJ-FW-IPMI-commands-and-flash-support-in-u-boot.patch \
file://0030-Support-Get-Set-Security-mode-command.patch \
file://0031-Make-it-so-TFTP-port-can-be-modified.patch \
+ file://0033-Reboot-into-UBOOT-on-Watchdog-Failures.patch \
"
PFR_SRC_URI = " \
file://0022-u-boot-env-change-for-PFR-image.patch \
- file://0032-Adding-PFR-boot-flow-checkpoint-in-u-boot.patch \
- file://0033-PFR-firmware-update-support-in-u-boot.patch \
+ file://0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch \
"
SRC_URI_append_intel-ast2500 += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', PFR_SRC_URI, '', d)}"