diff options
author | jmbills <42755197+jmbills@users.noreply.github.com> | 2020-09-08 23:40:52 +0300 |
---|---|---|
committer | GitHub <noreply@github.com> | 2020-09-08 23:40:52 +0300 |
commit | c16fb8893b19075db4bcf3b5bf33c1db8c3ca2bd (patch) | |
tree | ca75379d317be9cc1757a00e0352a048b5d3200b /meta-openbmc-mods/meta-common/recipes-kernel | |
parent | d81f2708c4462a62e3b5e8d08643eb2b8895dde7 (diff) | |
parent | f99301c1a626951ee7feee081a1494e795d0e243 (diff) | |
download | openbmc-c16fb8893b19075db4bcf3b5bf33c1db8c3ca2bd.tar.xz |
Merge pull request #47 from Intel-BMC/update
Update to internal 0.74
Diffstat (limited to 'meta-openbmc-mods/meta-common/recipes-kernel')
6 files changed, 547 insertions, 14 deletions
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0001-arm-dts-intel-s2600wf-dts-fixups.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0001-arm-dts-intel-s2600wf-dts-fixups.patch new file mode 100644 index 000000000..d88fc2383 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0001-arm-dts-intel-s2600wf-dts-fixups.patch @@ -0,0 +1,477 @@ +From 92c28f515166e4478dd447eb1d33409d14aed954 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Tue, 7 Jul 2020 22:27:10 -0700 +Subject: [PATCH] arm: dts: intel s2600wf dts fixups + +Add fixups for Intel S2600WF dts. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + .../arm/boot/dts/aspeed-bmc-intel-s2600wf.dts | 362 +++++++++++++++++- + 1 file changed, 343 insertions(+), 19 deletions(-) + +diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts b/arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts +index 1deb30ec912c..daa85e947d48 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts +@@ -3,14 +3,20 @@ + /dts-v1/; + + #include "aspeed-g5.dtsi" ++#include <dt-bindings/gpio/aspeed-gpio.h> ++#include <dt-bindings/i2c/i2c.h> + + / { +- model = "S2600WF BMC"; ++ model = "Intel S2600WF BMC"; + compatible = "intel,s2600wf-bmc", "aspeed,ast2500"; + ++ aliases { ++ serial4 = &uart5; ++ }; ++ + chosen { + stdout-path = &uart5; +- bootargs = "earlyprintk"; ++ bootargs = "console=ttyS4,115200 earlyprintk"; + }; + + memory@80000000 { +@@ -26,6 +32,32 @@ + no-map; + reg = <0x7f000000 0x01000000>; + }; ++ ++ gfx_memory: framebuffer { ++ size = <0x01000000>; ++ alignment = <0x01000000>; ++ compatible = "shared-dma-pool"; ++ reusable; ++ }; ++ ++ video_engine_memory: jpegbuffer { ++ size = <0x02000000>; /* 32M */ ++ alignment = <0x01000000>; ++ compatible = "shared-dma-pool"; ++ reusable; ++ }; ++ ++ ramoops@9eff0000{ ++ compatible = "ramoops"; ++ reg = <0x9eff0000 0x10000>; ++ record-size = <0x2000>; ++ console-size = <0x2000>; ++ }; ++ }; ++ ++ vga-shared-memory { ++ compatible = "aspeed,ast2500-vga-sharedmem"; ++ reg = <0x9ff00000 0x100000>; + }; + + iio-hwmon { +@@ -36,6 +68,29 @@ + <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>; + }; + ++ leds { ++ compatible = "gpio-leds"; ++ ++ identify { ++ default-state = "on"; ++ gpios = <&gpio ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>; ++ }; ++ ++ status_amber { ++ default-state = "off"; ++ gpios = <&gpio ASPEED_GPIO(S, 5) GPIO_ACTIVE_LOW>; ++ }; ++ ++ status_green { ++ default-state = "keep"; ++ gpios = <&gpio ASPEED_GPIO(S, 4) GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ beeper { ++ compatible = "pwm-beeper"; ++ pwms = <&timer 5 1000000 0>; ++ }; + }; + + &fmc { +@@ -44,35 +99,204 @@ + status = "okay"; + m25p,fast-read; + label = "bmc"; +-#include "openbmc-flash-layout.dtsi" ++#include "openbmc-flash-layout-intel-64MB.dtsi" + }; + }; + +-&spi1 { ++&espi { + status = "okay"; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_spi1_default>; ++}; + +- flash@0 { +- status = "okay"; +- m25p,fast-read; +- label = "pnor"; ++&jtag { ++ status = "okay"; ++}; ++ ++&peci0 { ++ status = "okay"; ++ gpios = <&gpio ASPEED_GPIO(F, 6) 0>; ++}; ++ ++&syscon { ++ uart-clock-high-speed; ++ status = "okay"; ++ ++ misc_control { ++ compatible = "aspeed,bmc-misc"; ++ uart_port_debug { ++ offset = <0x2c>; ++ bit-mask = <0x1>; ++ bit-shift = <10>; ++ read-only; ++ }; ++ p2a-bridge { ++ offset = <0x180>; ++ bit-mask = <0x1>; ++ bit-shift = <1>; ++ read-only; ++ }; ++ boot-2nd-flash { ++ offset = <0x70>; ++ bit-mask = <0x1>; ++ bit-shift = <17>; ++ read-only; ++ }; ++ chip_id { ++ offset = <0x150>; ++ bit-mask = <0x0fffffff 0xffffffff>; ++ bit-shift = <0>; ++ read-only; ++ reg-width = <64>; ++ hash-data = "d44f9b804976fa23c2e25d62f16154d26520a7e24c5555095fd1b55c027804f1570dcd16189739c640cd7d9a6ce14944a2c4eaf1dc429eed6940e8a83498a474"; ++ }; + }; + }; + +-&uart5 { ++&adc { + status = "okay"; + }; + +-&mac0 { ++&gpio { ++ status = "okay"; ++ /* Enable GPIOE0 and GPIOE2 pass-through by default */ ++ pinctrl-names = "pass-through"; ++ pinctrl-0 = <&pinctrl_gpie0_default ++ &pinctrl_gpie2_default>; ++ gpio-line-names = ++ /*A0-A7*/ "","","","","","","","", ++ /*B0-B7*/ "","","","","","","","", ++ /*C0-C7*/ "","","","","","","","", ++ /*D0-D7*/ "","","","","","","","", ++ /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","","","", ++ /*F0-F7*/ "NMI_OUT","","","","CPU_ERR0","CPU_ERR1","","", ++ /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","LCP_ENTER_BUTTON","LCP_LEFT_BUTTON","FM_BMC_BOARD_SKU_ID5_N","","", ++ /*H0-H7*/ "","","","FM_NODE_ID_1","FM_NODE_ID_2","FM_NODE_ID_3","FM_NODE_ID_4","FM_240VA_STATUS", ++ /*I0-I7*/ "FM_SYS_FAN0_PRSNT_D_N","FM_SYS_FAN1_PRSNT_D_N","FM_SYS_FAN2_PRSNT_D_N","FM_SYS_FAN3_PRSNT_D_N","FM_SYS_FAN4_PRSNT_D_N","FM_SYS_FAN5_PRSNT_D_N","","", ++ /*J0-J7*/ "","","","","","","","", ++ /*K0-K7*/ "","","","","","","","", ++ /*L0-L7*/ "","","","","","","","", ++ /*M0-M7*/ "","","","","","","","", ++ /*N0-N7*/ "","","","","","","","", ++ /*O0-O7*/ "","","","","","","","", ++ /*P0-P7*/ "","","","","","","","", ++ /*Q0-Q7*/ "","","","","","","","PWR_DEBUG_N", ++ /*R0-R7*/ "","XDP_PRST_N","","","","","","CHASSIS_INTRUSION", ++ /*S0-S7*/ "REMOTE_DEBUG_ENABLE","SYSPWROK","RSMRST_N","","","","","", ++ /*T0-T7*/ "","","","","","","","", ++ /*U0-U7*/ "","","","","","","","", ++ /*V0-V7*/ "","","","","","","","", ++ /*W0-W7*/ "","","","","","","","", ++ /*X0-X7*/ "","","","","","","","", ++ /*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","", ++ /*Z0-Z7*/ "","SIO_POWER_GOOD","","","","","","", ++ /*AA0-AA7*/ "P3VBAT_BRIDGE_EN","","","","PREQ_N","TCK_MUX_SEL","SMI","POST_COMPLETE", ++ /*AB0-AB7*/ "","NMI_BUTTON","ID_BUTTON","PS_PWROK","","","","", ++ /*AC0-AC7*/ "","","","","","","",""; ++}; ++ ++&sgpio { + status = "okay"; ++ gpio-line-names = ++ /* SGPIO output lines */ ++ /*OA0-OA7*/ "","","","","","","","", ++ /*OB0-OB7*/ "LED_CPU1_CH1_DIMM1_FAULT","LED_CPU1_CH1_DIMM2_FAULT","LED_CPU1_CH2_DIMM1_FAULT","LED_CPU1_CH2_DIMM2_FAULT","LED_CPU1_CH3_DIMM1_FAULT","LED_CPU1_CH3_DIMM2_FAULT","LED_CPU1_CH4_DIMM1_FAULT","LED_CPU1_CH4_DIMM2_FAULT", ++ /*OC0-OC7*/ "LED_CPU1_CH5_DIMM1_FAULT","LED_CPU1_CH5_DIMM2_FAULT","LED_CPU1_CH6_DIMM1_FAULT","LED_CPU1_CH6_DIMM2_FAULT","LED_FAN1_FAULT","LED_FAN2_FAULT","LED_FAN3_FAULT","LED_FAN4_FAULT", ++ /*OD0-OD7*/ "LED_FAN5_FAULT","LED_FAN6_FAULT","LED_FAN7_FAULT","LED_FAN8_FAULT","LED_CPU2_CH1_DIMM1_FAULT","LED_CPU1_CH1_DIMM2_FAULT","LED_CPU2_CH2_DIMM1_FAULT","LED_CPU2_CH2_DIMM2_FAULT", ++ /*OE0-OE7*/ "LED_CPU2_CH3_DIMM1_FAULT","LED_CPU2_CH3_DIMM2_FAULT","LED_CPU2_CH4_DIMM1_FAULT","LED_CPU2_CH4_DIMM2_FAULT","LED_CPU2_CH5_DIMM1_FAULT","LED_CPU2_CH5_DIMM2_FAULT","LED_CPU2_CH6_DIMM1_FAULT","LED_CPU2_CH6_DIMM2_FAULT", ++ /*OF0-OF7*/ "LED_CPU3_CH1_DIMM1_FAULT","LED_CPU3_CH1_DIMM2_FAULT","LED_CPU3_CH2_DIMM1_FAULT","LED_CPU3_CH2_DIMM2_FAULT","LED_CPU3_CH3_DIMM1_FAULT","LED_CPU3_CH3_DIMM2_FAULT","LED_CPU3_CH4_DIMM1_FAULT","LED_CPU3_CH4_DIMM2_FAULT", ++ /*OG0-OG7*/ "LED_CPU3_CH5_DIMM1_FAULT","LED_CPU3_CH5_DIMM2_FAULT","LED_CPU3_CH6_DIMM1_FAULT","LED_CPU3_CH6_DIMM2_FAULT","LED_CPU4_CH1_DIMM1_FAULT","LED_CPU4_CH1_DIMM2_FAULT","LED_CPU4_CH2_DIMM1_FAULT","LED_CPU4_CH2_DIMM2_FAULT", ++ /*OH0-OH7*/ "LED_CPU4_CH3_DIMM1_FAULT","LED_CPU4_CH3_DIMM2_FAULT","LED_CPU4_CH4_DIMM1_FAULT","LED_CPU4_CH4_DIMM2_FAULT","LED_CPU4_CH5_DIMM1_FAULT","LED_CPU4_CH5_DIMM2_FAULT","LED_CPU4_CH6_DIMM1_FAULT","LED_CPU4_CH6_DIMM2_FAULT", ++ /*OI0-OI7*/ "","","","","","","","", ++ /*OJ0-OJ7*/ "","","","","","","","", ++ /*DUMMY*/ "","","","","","","","", ++ /*DUMMY*/ "","","","","","","","", + ++ /* SGPIO input lines */ ++ /*IA0-IA7*/ "CPU1_PRESENCE","CPU1_THERMTRIP","CPU1_VRHOT","CPU1_FIVR_FAULT","CPU1_MEM_ABCD_VRHOT","CPU1_MEM_EFGH_VRHOT","","", ++ /*IB0-IB7*/ "CPU1_MISMATCH","CPU1_MEM_THERM_EVENT","CPU2_PRESENCE","CPU2_THERMTRIP","CPU2_VRHOT","CPU2_FIVR_FAULT","CPU2_MEM_ABCD_VRHOT","CPU2_MEM_EFGH_VRHOT", ++ /*IC0-IC7*/ "","","CPU2_MISMATCH","CPU2_MEM_THERM_EVENT","","","","", ++ /*ID0-ID7*/ "","","","","","","","", ++ /*IE0-IE7*/ "","","","","","","","", ++ /*IF0-IF7*/ "SGPIO_PLD_MINOR_REV_BIT0","SGPIO_PLD_MINOR_REV_BIT1","SGPIO_PLD_MINOR_REV_BIT2","SGPIO_PLD_MINOR_REV_BIT3","SGPIO_PLD_MAJOR_REV_BIT0","SGPIO_PLD_MAJOR_REV_BIT1","SGPIO_PLD_MAJOR_REV_BIT2","SGPIO_PLD_MAJOR_REV_BIT3", ++ /*IG0-IG7*/ "MAIN_PLD_MINOR_REV_BIT0","MAIN_PLD_MINOR_REV_BIT1","MAIN_PLD_MINOR_REV_BIT2","MAIN_PLD_MINOR_REV_BIT3","MAIN_PLD_MAJOR_REV_BIT0","MAIN_PLD_MAJOR_REV_BIT1","MAIN_PLD_MAJOR_REV_BIT2","MAIN_PLD_MAJOR_REV_BIT3", ++ /*IH0-IH7*/ "","","","","","","","", ++ /*II0-II7*/ "","","","","","","","", ++ /*IJ0-IJ7*/ "","","","","","","",""; ++}; ++ ++&kcs3 { ++ kcs_addr = <0xCA2>; ++ status = "okay"; ++}; ++ ++&kcs4 { ++ kcs_addr = <0xCA4>; ++ status = "okay"; ++}; ++ ++&sio_regs { ++ status = "okay"; ++ sio_status { ++ offset = <0x8C>; ++ bit-mask = <0x1F>; ++ bit-shift = <4>; ++ }; ++}; ++ ++&lpc_sio { ++ status = "okay"; ++}; ++ ++&lpc_snoop { ++ snoop-ports = <0x80>; ++ status = "okay"; ++}; ++ ++&mbox { ++ status = "okay"; ++}; ++ ++&uart_routing { ++ status = "okay"; ++}; ++ ++&uart1 { ++ status = "okay"; + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_rmii1_default>; +- clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, +- <&syscon ASPEED_CLK_MAC1RCLK>; +- clock-names = "MACCLK", "RCLK"; +- use-ncsi; ++ pinctrl-0 = <&pinctrl_txd1_default ++ &pinctrl_rxd1_default ++ &pinctrl_nrts1_default ++ &pinctrl_ndtr1_default ++ &pinctrl_ndsr1_default ++ &pinctrl_ncts1_default ++ &pinctrl_ndcd1_default ++ &pinctrl_nri1_default>; ++}; ++ ++&uart2 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_txd2_default ++ &pinctrl_rxd2_default ++ &pinctrl_nrts2_default ++ &pinctrl_ndtr2_default ++ &pinctrl_ndsr2_default ++ &pinctrl_ncts2_default ++ &pinctrl_ndcd2_default ++ &pinctrl_nri2_default>; ++}; ++ ++&uart3 { ++ status = "okay"; ++}; ++ ++&uart4 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <>; ++}; ++ ++&uart5 { ++ status = "okay"; + }; + + &mac1 { +@@ -82,44 +306,87 @@ + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; + }; + ++&mac0 { ++ status = "okay"; ++ use-ncsi; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_rmii1_default>; ++}; ++ ++&i2c0 { ++ multi-master; ++ general-call; ++ aspeed,dma-buf-size = <4095>; ++ aspeed,hw-timeout-ms = <300>; ++ status = "okay"; ++}; ++ + &i2c1 { ++ multi-master; ++ aspeed,dma-buf-size = <4095>; ++ aspeed,hw-timeout-ms = <300>; + status = "okay"; + }; + + &i2c2 { ++ multi-master; ++ aspeed,dma-buf-size = <4095>; ++ aspeed,hw-timeout-ms = <300>; + status = "okay"; + }; + + &i2c3 { ++ multi-master; ++ aspeed,dma-buf-size = <4095>; ++ aspeed,hw-timeout-ms = <300>; + status = "okay"; + }; + + &i2c4 { ++ multi-master; ++ aspeed,dma-buf-size = <4095>; ++ aspeed,hw-timeout-ms = <300>; + status = "okay"; + }; + + &i2c5 { ++ bus-frequency = <1000000>; ++ multi-master; ++ aspeed,dma-buf-size = <4095>; ++ aspeed,hw-timeout-ms = <300>; + status = "okay"; + }; + + &i2c6 { ++ multi-master; ++ aspeed,dma-buf-size = <4095>; ++ aspeed,hw-timeout-ms = <300>; + status = "okay"; + }; + + &i2c7 { ++ multi-master; ++ #retries = <3>; ++ aspeed,dma-buf-size = <4095>; ++ aspeed,hw-timeout-ms = <300>; + status = "okay"; + }; + + &i2c13 { ++ multi-master; ++ aspeed,dma-buf-size = <4095>; ++ aspeed,hw-timeout-ms = <300>; + status = "okay"; + }; + + &gfx { + status = "okay"; ++ memory-region = <&gfx_memory>; + }; + +-&pinctrl { +- aspeed,external-nodes = <&gfx &lhc>; ++&vuart { ++ status = "okay"; + }; + + &pwm_tacho { +@@ -129,4 +396,61 @@ + &pinctrl_pwm2_default &pinctrl_pwm3_default + &pinctrl_pwm4_default &pinctrl_pwm5_default + &pinctrl_pwm6_default &pinctrl_pwm7_default>; ++ ++ fan@0 { ++ reg = <0x00>; ++ aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>; ++ }; ++ fan@1 { ++ reg = <0x01>; ++ aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>; ++ }; ++ fan@2 { ++ reg = <0x02>; ++ aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>; ++ }; ++ fan@3 { ++ reg = <0x03>; ++ aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>; ++ }; ++ fan@4 { ++ reg = <0x04>; ++ aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>; ++ }; ++ fan@5 { ++ reg = <0x05>; ++ aspeed,fan-tach-ch = /bits/ 8 <0x0A 0x0B>; ++ }; ++ fan@6 { ++ reg = <0x06>; ++ aspeed,fan-tach-ch = /bits/ 8 <0x0C 0x0D>; ++ }; ++ fan@7 { ++ reg = <0x07>; ++ aspeed,fan-tach-ch = /bits/ 8 <0x0E 0x0F>; ++ }; ++ ++}; ++ ++&timer { ++/* ++ * Available settings: ++ * fttmr010,pwm-outputs = <5>, <6>, <7>, <8>; ++ * pinctrl-0 = <&pinctrl_timer5_default &pinctrl_timer6_default ++ * &pinctrl_timer7_default &pinctrl_timer8_default>; ++ */ ++ fttmr010,pwm-outputs = <6>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_timer6_default>; ++ #pwm-cells = <3>; ++ status = "okay"; ++}; ++ ++&video { ++ status = "okay"; ++ memory-region = <&video_engine_memory>; ++}; ++ ++&vhub { ++ status = "okay"; + }; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0095-pwm-and-tach-driver-changes-for-ast2600.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0095-pwm-and-tach-driver-changes-for-ast2600.patch index 2d624d10f..badda2d60 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0095-pwm-and-tach-driver-changes-for-ast2600.patch +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0095-pwm-and-tach-driver-changes-for-ast2600.patch @@ -21,7 +21,7 @@ index 1894f6ad5edb..9551a17e7f55 100644 #define PWM_RISING_RISING_BIT (0) //pwm rising point bit [7:0] +#define PWM_PERIOD_MAX 255 -+#define PWM_FALLING_DEFAULT 150 /* 58% */ ++#define PWM_FALLING_DEFAULT 255 /* 100% */ + #define ASPEED_TACHO_CTRL 0x08 //TACH0 General Register #define ASPEED_TACHO_CTRL_CH(x) ((x * 0x10) + 0x08) diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0116-watchdog-aspeed-fix-AST2600-support.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0116-watchdog-aspeed-fix-AST2600-support.patch index 3f71219de..33e142c30 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0116-watchdog-aspeed-fix-AST2600-support.patch +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0116-watchdog-aspeed-fix-AST2600-support.patch @@ -1,31 +1,50 @@ -From f911c7c994bf57685254f3b92e03e999d9cf058a Mon Sep 17 00:00:00 2001 +From 02acccc7dd2ade8cf48aff2312ebb8752c8c98eb Mon Sep 17 00:00:00 2001 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Date: Thu, 25 Jun 2020 23:56:15 -0700 Subject: [PATCH] watchdog: aspeed: fix AST2600 support AST2600 provides different function of WDT0C[4] and it doesn't -provides WDT10[1] so this commit fixes driver to make it don't -use these register bits in case of AST2600. +provides WDT10[1] so this commit fixes driver to make it available +on AST2600. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> --- - drivers/watchdog/aspeed_wdt.c | 13 +++++++------ - 1 file changed, 7 insertions(+), 6 deletions(-) + drivers/watchdog/aspeed_wdt.c | 21 ++++++++++++--------- + 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c -index 7e00960651fa..5a74b439e3b1 100644 +index 7e00960651fa..b0afeb939686 100644 --- a/drivers/watchdog/aspeed_wdt.c +++ b/drivers/watchdog/aspeed_wdt.c -@@ -279,6 +279,8 @@ static int aspeed_wdt_probe(struct platform_device *pdev) +@@ -47,7 +47,8 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table); + #define WDT_CTRL_RESET_MODE_SOC (0x00 << 5) + #define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5) + #define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5) +-#define WDT_CTRL_1MHZ_CLK BIT(4) ++#define WDT_CTRL_1MHZ_CLK BIT(4) /* ast2400/2500 */ ++#define WDT_CTRL_WDT_RST_BY_SOC_RST BIT(4) /* ast2600 */ + #define WDT_CTRL_WDT_EXT BIT(3) + #define WDT_CTRL_WDT_INTR BIT(2) + #define WDT_CTRL_RESET_SYSTEM BIT(1) +@@ -277,12 +278,15 @@ static int aspeed_wdt_probe(struct platform_device *pdev) + * On clock rates: + * - ast2400 wdt can run at PCLK, or 1MHz * - ast2500 only runs at 1MHz, hard coding bit 4 to 1 - * - ast2600 always runs at 1MHz +- * - ast2600 always runs at 1MHz ++ * - ast2600 uses WDT0C[4] as 'Enable WDT to be reset by SOC reset' * -+ * Note: ast2600 uses WDT0C[4] as 'Enable WDT to be reset by SOC reset' -+ * * Set the ast2400 to run at 1MHz as it simplifies the driver. */ - if (of_device_is_compatible(np, "aspeed,ast2400-wdt")) -@@ -367,13 +369,12 @@ static int aspeed_wdt_probe(struct platform_device *pdev) +- if (of_device_is_compatible(np, "aspeed,ast2400-wdt")) ++ if (of_device_is_compatible(np, "aspeed,ast2400-wdt") || ++ of_device_is_compatible(np, "aspeed,ast2500-wdt")) + wdt->ctrl = WDT_CTRL_1MHZ_CLK; ++ else if (of_device_is_compatible(np, "aspeed,ast2600-wdt")) ++ wdt->ctrl = WDT_CTRL_WDT_RST_BY_SOC_RST; + + /* + * Control reset on a per-device basis to ensure the +@@ -367,13 +371,12 @@ static int aspeed_wdt_probe(struct platform_device *pdev) writel(duration - 1, wdt->base + WDT_RESET_WIDTH); } @@ -45,5 +64,5 @@ index 7e00960651fa..5a74b439e3b1 100644 dev_set_drvdata(dev, wdt); -- -2.7.4 +2.17.1 diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0118-Recalculate-AW-FCS-on-WrEndPointConfig-command.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0118-Recalculate-AW-FCS-on-WrEndPointConfig-command.patch new file mode 100644 index 000000000..af173e71d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0118-Recalculate-AW-FCS-on-WrEndPointConfig-command.patch @@ -0,0 +1,34 @@ +From 2453c89ead650ab8e21f13c1b0a1b4054e0e7067 Mon Sep 17 00:00:00 2001 +From: "Jason M. Bills" <jason.m.bills@linux.intel.com> +Date: Mon, 27 Jul 2020 11:27:47 -0700 +Subject: [PATCH] Recalculate AW FCS on WrEndPointConfig command + +The WrEndPointConfig command requires recalculating the AW FCS +on retry, so set the has_aw_fcs parameter to true. + +Tested: +Ran a WrEndPointConfig command with C-states enabled to confirm +that it correctly retries the command: +peci_cmds WrEndpointConfigPCILocal 0 13 12 0 0x2d4 0x601e0 + +Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com> +--- + drivers/peci/peci-core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/peci/peci-core.c b/drivers/peci/peci-core.c +index 426ee2be3271..ba561bf810f9 100644 +--- a/drivers/peci/peci-core.c ++++ b/drivers/peci/peci-core.c +@@ -1059,7 +1059,7 @@ static int peci_cmd_wr_end_pt_cfg(struct peci_adapter *adapter, void *vmsg) + return -EINVAL; + } + +- ret = peci_xfer_with_retries(adapter, msg, false); ++ ret = peci_xfer_with_retries(adapter, msg, true); + + out: + umsg->cc = msg->rx_buf[0]; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/intel.cfg b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/intel.cfg index 5f453510a..077b83bac 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/intel.cfg +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/intel.cfg @@ -13,6 +13,7 @@ CONFIG_PECI_ASPEED=y CONFIG_SENSORS_PECI_CPUTEMP=y CONFIG_SENSORS_PECI_DIMMTEMP=y CONFIG_SENSORS_PECI_CPUPOWER=y +CONFIG_SENSORS_PECI_DIMMPOWER=y CONFIG_CONFIGFS_FS=y CONFIG_BLK_DEV_RAM_SIZE=49152 CONFIG_MAGIC_SYSRQ=y diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend index b176446c3..8250ec919 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend @@ -8,6 +8,7 @@ do_compile_prepend(){ SRC_URI += " \ file://intel.cfg \ file://0001-arm-dts-add-DTS-for-Intel-ast2500-platforms.patch \ + file://0001-arm-dts-intel-s2600wf-dts-fixups.patch \ file://0001-arm-dts-add-DTS-for-Intel-ast2600-platforms.patch \ file://0001-arm-dts-base-aspeed-g6-dtsi-fixups.patch \ file://0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch \ @@ -84,6 +85,7 @@ SRC_URI += " \ file://0112-AST2600-enable-UART-routing.patch \ file://0116-watchdog-aspeed-fix-AST2600-support.patch \ file://0117-Copy-raw-PECI-response-to-user-space-on-timeout.patch \ + file://0118-Recalculate-AW-FCS-on-WrEndPointConfig-command.patch \ " SRC_URI += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', 'file://0005-128MB-flashmap-for-PFR.patch', '', d)}" |