Update to internal 6-6-19

Signed-off-by: Ed Tanous <ed.tanous@intel.com>

7 files changed, 0 insertions, 824 deletions

diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-arm-dts-add-DTS-for-Intel-platforms.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-arm-dts-add-DTS-for-Intel-platforms.patch
deleted file mode 100644
index 5f8e0fd5c..000000000
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-arm-dts-add-DTS-for-Intel-platforms.patch
+++ /dev/null
@@ -1,414 +0,0 @@
-From 429f3710a88d81d6875aec7a848dde96074ee8df Mon Sep 17 00:00:00 2001
-From: Yuan Li <yuan.li@linux.intel.com>
-Date: Tue, 19 Sep 2017 15:55:39 +0800
-Subject: [PATCH] arm: dts: add DTS for Intel platforms
-
-Add the DTS file for Intel systems.
-
-Signed-off-by: Yuan Li <yuan.li@linux.intel.com>
-Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
-Signed-off-by: James Feist <james.feist@linux.intel.com>
-Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
-Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>
----
- arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 388 ++++++++++++++++++++++++++
- 1 file changed, 388 insertions(+)
- create mode 100644 arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-
-diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-new file mode 100644
-index 0000000..20067f5
---- /dev/null
-+++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-@@ -0,0 +1,388 @@
-+/dts-v1/;
-+
-+#include "aspeed-g5.dtsi"
-+#include <dt-bindings/gpio/aspeed-gpio.h>
-+#include <dt-bindings/i2c/i2c.h>
-+
-+/ {
-+	model = "Purley BMC";
-+	compatible = "intel,purley-bmc", "aspeed,ast2500";
-+
-+	aliases {
-+		serial4 = &uart5;
-+	};
-+
-+	chosen {
-+		stdout-path = &uart5;
-+		bootargs = "console=ttyS4,115200 earlyprintk";
-+	};
-+
-+	memory@80000000 {
-+		reg = <0x80000000 0x20000000>;
-+	};
-+
-+	reserved-memory {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		ranges;
-+
-+		vga_memory: framebuffer@7f000000 {
-+			no-map;
-+			reg = <0x7f000000 0x01000000>;
-+		};
-+
-+		gfx_memory: framebuffer {
-+			size = <0x01000000>;
-+			alignment = <0x01000000>;
-+			compatible = "shared-dma-pool";
-+			reusable;
-+		};
-+
-+		video_engine_memory: jpegbuffer {
-+			size = <0x02000000>;	/* 32M */
-+			alignment = <0x01000000>;
-+			compatible = "shared-dma-pool";
-+			reusable;
-+		};
-+	};
-+
-+	vga-shared-memory {
-+		compatible = "aspeed,ast2500-vga-sharedmem";
-+		reg = <0x9ff00000 0x100000>;
-+	};
-+
-+	iio-hwmon {
-+		compatible = "iio-hwmon";
-+		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
-+			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
-+			<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
-+			<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
-+	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+
-+		identify {
-+			default-state = "off";
-+			gpios = <&gpio ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>;
-+		};
-+
-+		status_amber {
-+			default-state = "off";
-+			gpios = <&gpio ASPEED_GPIO(S, 5) GPIO_ACTIVE_LOW>;
-+		};
-+
-+		status_green {
-+			default-state = "keep";
-+			gpios = <&gpio ASPEED_GPIO(S, 4) GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+
-+	beeper {
-+		compatible = "pwm-beeper";
-+		pwms = <&timer 5 1000000 0>;
-+	};
-+};
-+
-+&fmc {
-+	status = "okay";
-+	flash@0 {
-+		status = "okay";
-+		m25p,fast-read;
-+#include "openbmc-flash-layout-intel-64MB.dtsi"
-+	};
-+};
-+
-+&espi {
-+	status = "okay";
-+};
-+
-+&jtag {
-+	status = "okay";
-+};
-+
-+&peci0 {
-+	status = "okay";
-+};
-+
-+&syscon {
-+	uart-clock-high-speed;
-+	status = "okay";
-+};
-+
-+&adc {
-+	status = "okay";
-+};
-+
-+&gpio {
-+	status = "okay";
-+	gpio-line-names =
-+	/*A0-A7*/	"","","","","","","","",
-+	/*B0-B7*/	"","","","","","","","",
-+	/*C0-C7*/	"","","","","","","","",
-+	/*D0-D7*/	"","","","","","","","",
-+	/*E0-E7*/	"RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","","","",
-+	/*F0-F7*/	"","","","","","","","",
-+	/*G0-G7*/	"","","","","","","","",
-+	/*H0-H7*/	"","","","","","","","",
-+	/*I0-I7*/	"","","","","","","","",
-+	/*J0-J7*/	"","","","","","","","",
-+	/*K0-K7*/	"","","","","","","","",
-+	/*L0-L7*/	"","","","","","","","",
-+	/*M0-M7*/	"","","","","","","","",
-+	/*N0-N7*/	"","","","","","","","",
-+	/*O0-O7*/	"","","","","","","","",
-+	/*P0-P7*/	"","","","","","","","",
-+	/*Q0-Q7*/	"","","","","","","","",
-+	/*R0-R7*/	"","","","","","","","",
-+	/*S0-S7*/	"","","","","","","ID_BUTTON","",
-+	/*T0-T7*/	"","","","","","","","",
-+	/*U0-U7*/	"","","","","","","","",
-+	/*V0-V7*/	"","","","","","","","",
-+	/*W0-W7*/	"","","","","","","","",
-+	/*X0-X7*/	"","","","","","","","",
-+	/*Y0-Y7*/	"","","","","","","","",
-+	/*Z0-Z7*/	"","","","","","","","",
-+	/*AA0-AA7*/	"","","","","","","","POST_COMPLETE",
-+	/*AB0-AB7*/	"","","","PGOOD","","","","",
-+	/*AC0-AC7*/	"","","","","","","","";
-+};
-+
-+&kcs3 {
-+	kcs_addr = <0xCA2>;
-+	status = "okay";
-+};
-+
-+&kcs4 {
-+	kcs_addr = <0xCA4>;
-+	status = "okay";
-+};
-+
-+&lpc_sio {
-+	status = "okay";
-+};
-+
-+&lpc_snoop {
-+	snoop-ports = <0x80>;
-+	status = "okay";
-+};
-+
-+&mbox {
-+	status = "okay";
-+};
-+
-+/**
-+ * SAFS through SPI1 is available only on Wilson Point.
-+ * These pins are used as fan presence checking gpios in WFP
-+ * so commenting it out for now.
-+ * &spi1 {
-+ *	status = "okay";
-+ *
-+ *	flash@0 {
-+ *		m25p,fast-read;
-+ *		status = "okay";
-+ *	};
-+ *};
-+ */
-+
-+&sgpio {
-+	status = "okay";
-+};
-+
-+&uart1 {
-+	status = "okay";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_txd1_default
-+			&pinctrl_rxd1_default
-+			&pinctrl_nrts1_default
-+			&pinctrl_ndtr1_default
-+			&pinctrl_ndsr1_default
-+			&pinctrl_ncts1_default
-+			&pinctrl_ndcd1_default
-+			&pinctrl_nri1_default>;
-+};
-+
-+&uart2 {
-+	status = "okay";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_txd2_default
-+			&pinctrl_rxd2_default
-+			&pinctrl_nrts2_default
-+			&pinctrl_ndtr2_default
-+			&pinctrl_ndsr2_default
-+			&pinctrl_ncts2_default
-+			&pinctrl_ndcd2_default
-+			&pinctrl_nri2_default>;
-+};
-+
-+&uart3 {
-+	status = "okay";
-+};
-+
-+&uart4 {
-+	status = "okay";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <>;
-+};
-+
-+&uart5 {
-+	status = "okay";
-+};
-+
-+&mac1 {
-+	status = "okay";
-+
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
-+};
-+
-+&mac0 {
-+	status = "okay";
-+	use-ncsi;
-+
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_rmii1_default>;
-+};
-+
-+&i2c0 {
-+	multi-master;
-+	general-call;
-+	status = "okay";
-+
-+	ipmb0@10 {
-+		compatible = "slave-mqueue";
-+		reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
-+	};
-+};
-+
-+&i2c1 {
-+	multi-master;
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	multi-master;
-+	status = "okay";
-+};
-+
-+&i2c3 {
-+	multi-master;
-+	status = "okay";
-+};
-+
-+&i2c4 {
-+	multi-master;
-+	status = "okay";
-+
-+	hsbp0@10 {
-+		compatible = "slave-mqueue";
-+		reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
-+	};
-+};
-+
-+&i2c5 {
-+	bus-frequency = <1000000>;
-+	multi-master;
-+	status = "okay";
-+
-+	smlink0@10 {
-+		compatible = "slave-mqueue";
-+		reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
-+	};
-+};
-+
-+&i2c6 {
-+	multi-master;
-+	status = "okay";
-+};
-+
-+&i2c7 {
-+	multi-master;
-+	#retries = <3>;
-+	status = "okay";
-+};
-+
-+&i2c9 {
-+	multi-master;
-+	status = "okay";
-+};
-+
-+&i2c13 {
-+	multi-master;
-+	status = "okay";
-+};
-+
-+&gfx {
-+	status = "okay";
-+	memory-region = <&gfx_memory>;
-+};
-+
-+&vuart {
-+	status = "okay";
-+};
-+
-+&pwm_tacho {
-+	status = "okay";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
-+			 &pinctrl_pwm2_default &pinctrl_pwm3_default
-+			 &pinctrl_pwm4_default &pinctrl_pwm5_default
-+			 &pinctrl_pwm6_default &pinctrl_pwm7_default>;
-+
-+	fan@0 {
-+		reg = <0x00>;
-+		aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
-+	};
-+	fan@1 {
-+		reg = <0x01>;
-+		aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
-+	};
-+	fan@2 {
-+		reg = <0x02>;
-+		aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
-+	};
-+	fan@3 {
-+		reg = <0x03>;
-+		aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
-+	};
-+	fan@4 {
-+		reg = <0x04>;
-+		aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
-+	};
-+	fan@5 {
-+		reg = <0x05>;
-+		aspeed,fan-tach-ch = /bits/ 8 <0x0A 0x0B>;
-+	};
-+	fan@6 {
-+		reg = <0x06>;
-+		aspeed,fan-tach-ch = /bits/ 8 <0x0C 0x0D>;
-+	};
-+	fan@7 {
-+		reg = <0x07>;
-+		aspeed,fan-tach-ch = /bits/ 8 <0x0E 0x0F>;
-+	};
-+
-+};
-+
-+&timer {
-+/*
-+ *	Available settings:
-+ *	fttmr010,pwm-outputs = <5>, <6>, <7>, <8>;
-+ *	pinctrl-0 = <&pinctrl_timer5_default &pinctrl_timer6_default
-+ *			&pinctrl_timer7_default &pinctrl_timer8_default>;
-+ */
-+	fttmr010,pwm-outputs = <5>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_timer5_default>;
-+	#pwm-cells = <3>;
-+	status = "okay";
-+};
-+
-+&video {
-+	status = "okay";
-+	memory-region = <&video_engine_memory>;
-+};
-+
-+&vhub {
-+	status = "okay";
-+};
--- 
-2.7.4
-
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch
deleted file mode 100644
index b05ad2502..000000000
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 9537923d6e6a793cb2bf3c1daacd12562263bc0a Mon Sep 17 00:00:00 2001
-From: "Jason M. Bills" <jason.m.bills@linux.intel.com>
-Date: Fri, 3 May 2019 16:12:39 -0700
-Subject: [PATCH] Enable pass-through on GPIOE1 and GPIOE3 free
-
-This change adds a gpio_disable_free() implementation that checks
-if the GPIO being freed is GPIOE1 (33) or GPIOE3 (35) and will
-re-enable the pass-through mux.
-
-Tested:
-Requested GPIOs 33 and 35 and used devmem to check that pass-through
-was disabled. Then freed them and checked that pass-through was
-enabled again.
-
-Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>
----
- drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c |  1 +
- drivers/pinctrl/aspeed/pinctrl-aspeed.c    | 60 ++++++++++++++++++++++++++++++
- drivers/pinctrl/aspeed/pinctrl-aspeed.h    |  3 ++
- 3 files changed, 64 insertions(+)
-
-diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
-index 187abd7..beb0729 100644
---- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
-+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
-@@ -2498,6 +2498,7 @@ static const struct pinmux_ops aspeed_g5_pinmux_ops = {
- 	.get_function_groups = aspeed_pinmux_get_fn_groups,
- 	.set_mux = aspeed_pinmux_set_mux,
- 	.gpio_request_enable = aspeed_gpio_request_enable,
-+	.gpio_disable_free = aspeed_gpio_disable_free,
- 	.strict = true,
- };
- 
-diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
-index eb87ab7..f06d752 100644
---- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
-+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
-@@ -538,6 +538,66 @@ int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev,
- 	return aspeed_sig_expr_enable(expr, pdata->maps);
- }
- 
-+void aspeed_gpio_disable_free(struct pinctrl_dev *pctldev,
-+			      struct pinctrl_gpio_range *range,
-+			      unsigned int offset)
-+{
-+	const struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-+	const struct aspeed_pin_desc *pdesc = pdata->pins[offset].drv_data;
-+	const struct aspeed_sig_expr ***prios, **funcs, *expr;
-+	int ret;
-+
-+	/*
-+	 * If we're freeing GPIOE1 (33) or GPIOE3 (35) then re-enable the
-+	 * pass-through mux setting; otherwise, do nothing.
-+	 */
-+	if (offset != 33 && offset != 35)
-+		return;
-+
-+	dev_dbg(pctldev->dev,
-+		"Freeing pass-through pin %s (%d). Re-enabling pass-through.\n",
-+		pdesc->name, offset);
-+
-+	if (!pdesc)
-+		return;
-+
-+	prios = pdesc->prios;
-+
-+	if (!prios)
-+		return;
-+
-+	/* Disable any functions of higher priority than GPIO just in case */
-+	while (funcs = *prios) {
-+		if (aspeed_gpio_in_exprs(funcs))
-+			break;
-+
-+		ret = aspeed_disable_sig(funcs, pdata->maps);
-+		if (ret)
-+			return;
-+
-+		prios++;
-+	}
-+
-+	if (!funcs) {
-+		char *signals = get_defined_signals(pdesc);
-+
-+		pr_warn("No GPIO signal type found on pin %s (%d). Found: %s\n",
-+			pdesc->name, offset, signals);
-+		kfree(signals);
-+
-+		return;
-+	}
-+
-+	/*
-+	 * Pass-through should be one priority higher than the GPIO function,
-+	 * so decrement our prios and enable that function
-+	 */
-+	prios--;
-+	funcs = *prios;
-+	expr = *funcs;
-+	aspeed_sig_expr_enable(expr, pdata->maps);
-+}
-+
- int aspeed_pinctrl_probe(struct platform_device *pdev,
- 			 struct pinctrl_desc *pdesc,
- 			 struct aspeed_pinctrl_data *pdata)
-diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h
-index d4d7f03..0037b11 100644
---- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h
-+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h
-@@ -595,6 +595,9 @@ int aspeed_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function,
- int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev,
- 		struct pinctrl_gpio_range *range,
- 		unsigned int offset);
-+void aspeed_gpio_disable_free(struct pinctrl_dev *pctldev,
-+		struct pinctrl_gpio_range *range,
-+		unsigned int offset);
- int aspeed_pinctrl_probe(struct platform_device *pdev,
- 		struct pinctrl_desc *pdesc,
- 		struct aspeed_pinctrl_data *pdata);
--- 
-2.7.4
-
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch
deleted file mode 100644
index 1d26b9667..000000000
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From d26dd7c4ef1a2cb88440420deccc54eb88129c60 Mon Sep 17 00:00:00 2001
-From: "Jason M. Bills" <jason.m.bills@linux.intel.com>
-Date: Mon, 6 May 2019 14:18:27 -0700
-Subject: [PATCH] Enable GPIOE0 and GPIOE2 pass-through by default
-
-This change sets the gpio DT pinctrl default configuration to
-enable GPIOE0 and GPIOE2 pass-through.  Since this causes
-pinctrl_get_select_default() to be called automatically for
-the gpio driver to claim the GPIO pins in those groups, we
-also need to call pinctrl_put() to release claim on the
-pass-through GPIOs so they can be requested at runtime.
-
-Tested:
-Disabled pass-through in uboot and confirmed that after booting
-Linux, pass-through is enabled and 'cat /sys/kernel/debug/pinctrl/
-1e6e2000.syscon\:pinctrl-aspeed-g5-pinctrl/pinmux-pins' shows that
-the pass-through GPIOs are UNCLAIMED.
-
-Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>
----
- arch/arm/boot/dts/aspeed-bmc-intel-purley.dts |  4 ++++
- drivers/gpio/gpio-aspeed.c                    | 10 ++++++++++
- 2 files changed, 14 insertions(+)
-
-diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-index 45556ac..051e927 100644
---- a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-+++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-@@ -124,6 +124,10 @@
- 
- &gpio {
- 	status = "okay";
-+	/* Enable GPIOE0 and GPIOE2 pass-through by default */
-+	pinctrl-names = "pass-through";
-+	pinctrl-0 = <&pinctrl_gpie0_default
-+			&pinctrl_gpie2_default>;
- 	gpio-line-names =
- 	/*A0-A8*/	"","","","","","","","",
- 	/*B0-B8*/	"","","","","","","","",
-diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
-index 2175070..f47d139 100644
---- a/drivers/gpio/gpio-aspeed.c
-+++ b/drivers/gpio/gpio-aspeed.c
-@@ -1157,6 +1157,7 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev)
- 	const struct of_device_id *gpio_id;
- 	struct aspeed_gpio *gpio;
- 	struct resource *res;
-+	struct pinctrl *pinctrl;
- 	int rc, i, banks;
- 
- 	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
-@@ -1205,6 +1206,15 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev)
- 		return -ENOMEM;
- 
- 	/*
-+	 * Select the pass-through pinctrl config to enable the pass-through
-+	 * mux for GPIOs E0 and E2. Then call pinctrl_put() to release claim
-+	 * of the GPIO pins, so they can be requested at runtime.
-+	 */
-+	pinctrl = pinctrl_get_select(&pdev->dev, "pass-through");
-+	if (pinctrl)
-+		pinctrl_put(pinctrl);
-+
-+	/*
- 	 * Populate it with initial values read from the HW and switch
- 	 * all command sources to the ARM by default
- 	 */
--- 
-2.7.4
-
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0004-Test-code-for-LPC-MBOX.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0004-Test-code-for-LPC-MBOX.patch
deleted file mode 100644
index dbb163d20..000000000
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0004-Test-code-for-LPC-MBOX.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From 2f3587cf9e44f261fe74413ef6a54467686c910b Mon Sep 17 00:00:00 2001
-From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
-Date: Tue, 20 Nov 2018 15:49:15 -0800
-Subject: [PATCH] Test code for LPC MBOX
-
-Blocked interrupt driven code for test.
-
-Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
----
- drivers/misc/aspeed-lpc-mbox.c | 21 ++++++++++++++++++++-
- 1 file changed, 20 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/misc/aspeed-lpc-mbox.c b/drivers/misc/aspeed-lpc-mbox.c
-index 0f0c711bafee..0933e0553953 100644
---- a/drivers/misc/aspeed-lpc-mbox.c
-+++ b/drivers/misc/aspeed-lpc-mbox.c
-@@ -19,6 +19,8 @@
- 
- #define DEVICE_NAME	"aspeed-mbox"
- 
-+#define MBX_USE_INTERRUPT 0
-+
- #define ASPEED_MBOX_NUM_REGS 16
- 
- #define ASPEED_MBOX_DATA_0 0x00
-@@ -79,12 +81,14 @@ static int aspeed_mbox_open(struct inode *inode, struct file *file)
- 	struct aspeed_mbox *mbox = file_mbox(file);
- 
- 	if (atomic_inc_return(&aspeed_mbox_open_count) == 1) {
-+#if MBX_USE_INTERRUPT
- 		/*
- 		 * Clear the interrupt status bit if it was left on and unmask
- 		 * interrupts.
- 		 * ASPEED_MBOX_CTRL_RECV bit is W1C, this also unmasks in 1 step
- 		 */
- 		aspeed_mbox_outb(mbox, ASPEED_MBOX_CTRL_RECV, ASPEED_MBOX_BMC_CTRL);
-+#endif
- 		return 0;
- 	}
- 
-@@ -106,6 +110,7 @@ static ssize_t aspeed_mbox_read(struct file *file, char __user *buf,
- 	if (count + *ppos > ASPEED_MBOX_NUM_REGS)
- 		return -EINVAL;
- 
-+#if MBX_USE_INTERRUPT
- 	if (file->f_flags & O_NONBLOCK) {
- 		if (!(aspeed_mbox_inb(mbox, ASPEED_MBOX_BMC_CTRL) &
- 				ASPEED_MBOX_CTRL_RECV))
-@@ -115,6 +120,7 @@ static ssize_t aspeed_mbox_read(struct file *file, char __user *buf,
- 				ASPEED_MBOX_CTRL_RECV)) {
- 		return -ERESTARTSYS;
- 	}
-+#endif
- 
- 	mutex_lock(&mbox->mutex);
- 
-@@ -129,8 +135,10 @@ static ssize_t aspeed_mbox_read(struct file *file, char __user *buf,
- 		count--;
- 	}
- 
-+#if MBX_USE_INTERRUPT
- 	/* ASPEED_MBOX_CTRL_RECV bit is write to clear, this also unmasks in 1 step */
- 	aspeed_mbox_outb(mbox, ASPEED_MBOX_CTRL_RECV, ASPEED_MBOX_BMC_CTRL);
-+#endif
- 	ret = p - buf;
- 
- out_unlock:
-@@ -180,7 +188,9 @@ static unsigned int aspeed_mbox_poll(struct file *file, poll_table *wait)
- 
- 	poll_wait(file, &mbox->queue, wait);
- 
-+#if MBX_USE_INTERRUPT
- 	if (aspeed_mbox_inb(mbox, ASPEED_MBOX_BMC_CTRL) & ASPEED_MBOX_CTRL_RECV)
-+#endif
- 		mask |= POLLIN;
- 
- 	return mask;
-@@ -206,6 +216,7 @@ static irqreturn_t aspeed_mbox_irq(int irq, void *arg)
- {
- 	struct aspeed_mbox *mbox = arg;
- 
-+#if MBX_USE_INTERRUPT
- 	if (!(aspeed_mbox_inb(mbox, ASPEED_MBOX_BMC_CTRL) & ASPEED_MBOX_CTRL_RECV))
- 		return IRQ_NONE;
- 
-@@ -216,6 +227,7 @@ static irqreturn_t aspeed_mbox_irq(int irq, void *arg)
- 
- 	/* Mask it off, we'll clear it when we the data gets read */
- 	aspeed_mbox_outb(mbox, ASPEED_MBOX_CTRL_MASK, ASPEED_MBOX_BMC_CTRL);
-+#endif
- 
- 	wake_up(&mbox->queue);
- 	return IRQ_HANDLED;
-@@ -248,7 +260,14 @@ static int aspeed_mbox_config_irq(struct aspeed_mbox *mbox,
- 	aspeed_mbox_outb(mbox, 0xff, ASPEED_MBOX_STATUS_0);
- 	aspeed_mbox_outb(mbox, 0xff, ASPEED_MBOX_STATUS_1);
- 
--	aspeed_mbox_outb(mbox, ASPEED_MBOX_CTRL_RECV, ASPEED_MBOX_BMC_CTRL);
-+	aspeed_mbox_outb(mbox, aspeed_mbox_inb(mbox, ASPEED_MBOX_BMC_CTRL) | ASPEED_MBOX_CTRL_MASK, ASPEED_MBOX_BMC_CTRL);
-+
-+	/*
-+	 * Because mailbox data register init value is random, need to give a
-+	 * init value to mailbox data register.
-+	 */
-+	aspeed_mbox_outb(mbox, 0x00, ASPEED_MBOX_DATA_0);
-+
- 	return 0;
- }
- 
--- 
-2.7.4
-
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch
deleted file mode 100644
index 03b4f4da4..000000000
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From ddfbe1364c6ecf77f06990e6550dfe5a3791e6bf Mon Sep 17 00:00:00 2001
-From: Vikram Bodireddy <vikram.bodireddy@intel.com>
-Date: Wed, 6 Feb 2019 15:59:34 +0530
-Subject: [PATCH] Selecting 128MB for PFR
-
-PFR platforms requires 128MB flash mapping.
-This will override the existing 64MB flash map
-and loads 128MB flash map.
-
-Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com>
----
- arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-index 8aba46cdce46..6959a06d04e2 100644
---- a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-+++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-@@ -90,7 +90,7 @@
- 	flash@0 {
- 		status = "okay";
- 		m25p,fast-read;
--#include "openbmc-flash-layout-intel-64MB.dtsi"
-+#include "openbmc-flash-layout-intel-128MB.dtsi"
- 	};
- };
- 
--- 
-2.7.4
-
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/wolfpass.cfg b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/wolfpass.cfg
deleted file mode 100644
index 480d4cc18..000000000
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/wolfpass.cfg
+++ /dev/null
@@ -1,69 +0,0 @@
-CONFIG_HWMON=y
-CONFIG_SENSORS_ASPEED=y
-CONFIG_SPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_IIO=y
-CONFIG_SENSORS_IIO_HWMON=y
-CONFIG_ASPEED_ADC=y
-CONFIG_SGPIO_ASPEED=y
-CONFIG_CRC8=y
-CONFIG_PECI=y
-CONFIG_PECI_CHARDEV=y
-CONFIG_PECI_ASPEED=y
-CONFIG_SENSORS_PECI_CPUTEMP=y
-CONFIG_SENSORS_PECI_DIMMTEMP=y
-CONFIG_OF_CONFIGFS=y
-CONFIG_CONFIGFS_FS=y
-CONFIG_BLK_DEV_RAM_SIZE=49152
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x01
-CONFIG_MAGIC_SYSRQ_SERIAL=y
-CONFIG_ASPEED_ESPI_SLAVE=y
-CONFIG_ASPEED_KCS_IPMI_BMC=y
-CONFIG_I2C_SLAVE=y
-CONFIG_I2C_SLAVE_EEPROM=n
-CONFIG_I2C_SLAVE_MQUEUE=y
-CONFIG_I2C_SLAVE_MQUEUE_MESSAGE_SIZE=256
-CONFIG_I2C_SLAVE_MQUEUE_QUEUE_SIZE=32
-CONFIG_ASPEED_LPC_SIO=y
-CONFIG_JTAG=y
-CONFIG_JTAG_ASPEED=y
-CONFIG_FRAME_VECTOR=y
-CONFIG_MEDIA_SUPPORT=y
-CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_VIDEO_DEV=y
-CONFIG_VIDEO_V4L2=y
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_VIDEO_ASPEED=y
-CONFIG_VIDEOBUF2_CORE=y
-CONFIG_VIDEOBUF2_V4L2=y
-CONFIG_VIDEOBUF2_MEMOPS=y
-CONFIG_VIDEOBUF2_DMA_CONTIG=y
-CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
-CONFIG_USB_GADGET_VBUS_DRAW=2
-CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
-CONFIG_USB_LIBCOMPOSITE=y
-CONFIG_USB_F_HID=y
-CONFIG_USB_GADGET=y
-CONFIG_U_SERIAL_CONSOLE=y
-CONFIG_USB_ASPEED_VHUB=y
-CONFIG_USB_CONFIGFS=y
-CONFIG_USB_CONFIGFS_MASS_STORAGE=y
-CONFIG_USB_CONFIGFS_F_FS=y
-CONFIG_USB_CONFIGFS_F_HID=y
-CONFIG_ASPEED_UART_ROUTING=y
-CONFIG_DEVMEM=y
-CONFIG_ASPEED_VGA_SHAREDMEM=y
-CONFIG_DEVMEM_BOOTPARAM=n
-CONFIG_PWM=y
-CONFIG_PWM_FTTMR010=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_PWM_BEEPER=y
-CONFIG_VFAT_FS=y
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_UTF8=y
-
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed_%.bbappend b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed_%.bbappend
deleted file mode 100644
index 782fc6532..000000000
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed_%.bbappend
+++ /dev/null
@@ -1,8 +0,0 @@
-FILESEXTRAPATHS_prepend := "${THISDIR}/linux-aspeed:"
-SRC_URI += "file://wolfpass.cfg \
-            file://0001-arm-dts-add-DTS-for-Intel-platforms.patch \
-            file://0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch \
-            file://0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch \
-            file://0004-Test-code-for-LPC-MBOX.patch \
-            "
-SRC_URI += "${@bb.utils.contains('IMAGE_TYPE', 'pfr', 'file://0005-128MB-flashmap-for-PFR.patch', '', d)}"