summaryrefslogtreecommitdiff
path: root/meta-openbmc-mods/meta-wolfpass
diff options
context:
space:
mode:
authorEd Tanous <ed.tanous@intel.com>2019-04-15 23:42:44 +0300
committerEd Tanous <ed.tanous@intel.com>2019-04-17 19:13:25 +0300
commit816d793003e93c1e5eec0a2e90fbd8b9dde9f7a5 (patch)
tree341534fed9a2de460ded7f8231ca1cbb178bb2ca /meta-openbmc-mods/meta-wolfpass
parenta75bff085ba9443315222231c42692745e5781e9 (diff)
downloadopenbmc-816d793003e93c1e5eec0a2e90fbd8b9dde9f7a5.tar.xz
Update 4-15-19
Signed-off-by: Ed Tanous <ed.tanous@intel.com>
Diffstat (limited to 'meta-openbmc-mods/meta-wolfpass')
-rw-r--r--meta-openbmc-mods/meta-wolfpass/conf/layer.conf2
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-intel/temporary/set-passthrough/set-passthrough.sh3
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-Create-intel-purley-dts.patch61
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch10
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch10
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch7
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json26
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json10
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json11
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json3914
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json108
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json110
-rw-r--r--meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend3
13 files changed, 2244 insertions, 2031 deletions
diff --git a/meta-openbmc-mods/meta-wolfpass/conf/layer.conf b/meta-openbmc-mods/meta-wolfpass/conf/layer.conf
index a9a90e1ae..2d85bfdce 100644
--- a/meta-openbmc-mods/meta-wolfpass/conf/layer.conf
+++ b/meta-openbmc-mods/meta-wolfpass/conf/layer.conf
@@ -9,4 +9,4 @@ BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
BBFILE_COLLECTIONS += "wolfpass"
BBFILE_PATTERN_wolfpass = ""
BBFILE_PRIORITY_wolfpass = "6"
-LAYERSERIES_COMPAT_wolfpass = "thud"
+LAYERSERIES_COMPAT_wolfpass = "warrior"
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-intel/temporary/set-passthrough/set-passthrough.sh b/meta-openbmc-mods/meta-wolfpass/recipes-intel/temporary/set-passthrough/set-passthrough.sh
index 3fbe5e7c6..2b9ef6876 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-intel/temporary/set-passthrough/set-passthrough.sh
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-intel/temporary/set-passthrough/set-passthrough.sh
@@ -23,6 +23,9 @@ typeset -i value=$( echo $(( $var )) )
if [[ $1 == "0" ]]; then
value=$((value & ~PASSTHROUGH_ENABLE))
+ # Mark the gpio reset out & power up pin as released
+ echo "1" > /sys/class/gpio/gpio33/value
+ echo "1" > /sys/class/gpio/gpio35/value
fi
if [[ $1 == "1" ]]; then
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-Create-intel-purley-dts.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-Create-intel-purley-dts.patch
index 9b4d9bbc7..2a3f547d5 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-Create-intel-purley-dts.patch
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-Create-intel-purley-dts.patch
@@ -1,4 +1,4 @@
-From f631d7dc034be1de17213b1498651ad37f3ce98b Mon Sep 17 00:00:00 2001
+From 7bee096fd87485d1095c6b6940b62681ff873045 Mon Sep 17 00:00:00 2001
From: Yuan Li <yuan.li@linux.intel.com>
Date: Tue, 19 Sep 2017 15:55:39 +0800
Subject: [PATCH] ARM: dts: purley: Merge all dts node in the unified patch.
@@ -22,22 +22,23 @@ The below changes to the dts file are merged together:
* enable high speed uart clock
* timer pwm
* cpu0/1fault LEDs
+* i2c9 for SPD on WP / Disable beeper and timer-pwm
Signed-off-by: Yuan Li <yuan.li@linux.intel.com>
Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
Signed-off-by: James Feist <james.feist@linux.intel.com>
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
---
- arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 346 ++++++++++++++++++++++++++
- 1 file changed, 346 insertions(+)
+ arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 358 ++++++++++++++++++++++++++
+ 1 file changed, 358 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
new file mode 100644
-index 000000000000..144d59642a71
+index 000000000000..432f10186547
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-@@ -0,0 +1,346 @@
+@@ -0,0 +1,358 @@
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
@@ -72,7 +73,14 @@ index 000000000000..144d59642a71
+ };
+
+ gfx_memory: framebuffer {
-+ size = <0x04000000>;
++ size = <0x01000000>;
++ alignment = <0x01000000>;
++ compatible = "shared-dma-pool";
++ reusable;
++ };
++
++ video_engine_memory: jpegbuffer {
++ size = <0x02000000>; /* 32MM */
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
@@ -119,10 +127,10 @@ index 000000000000..144d59642a71
+ };
+ };
+
-+ beeper {
-+ compatible = "pwm-beeper";
-+ pwms = <&timer 5 1000000 0>;
-+ };
++ //beeper {
++ // compatible = "pwm-beeper";
++ // pwms = <&timer 5 1000000 0>;
++ //};
+};
+
+&fmc {
@@ -310,6 +318,11 @@ index 000000000000..144d59642a71
+ status = "okay";
+};
+
++&i2c9 {
++ multi-master;
++ status = "okay";
++};
++
+&gfx {
+ status = "okay";
+ memory-region = <&gfx_memory>;
@@ -362,23 +375,23 @@ index 000000000000..144d59642a71
+
+};
+
-+&timer {
-+/*
-+ * Available settings:
-+ * fttmr010,pwm-outputs = <5>, <6>, <7>, <8>;
-+ * pinctrl-0 = <&pinctrl_timer5_default &pinctrl_timer6_default
-+ * &pinctrl_timer7_default &pinctrl_timer8_default>;
-+ */
-+ fttmr010,pwm-outputs = <5>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_timer5_default>;
-+ #pwm-cells = <3>;
-+ status = "okay";
-+};
++//&timer {
++///*
++// * Available settings:
++// * fttmr010,pwm-outputs = <5>, <6>, <7>, <8>;
++// * pinctrl-0 = <&pinctrl_timer5_default &pinctrl_timer6_default
++// * &pinctrl_timer7_default &pinctrl_timer8_default>;
++// */
++// fttmr010,pwm-outputs = <5>;
++// pinctrl-names = "default";
++// pinctrl-0 = <&pinctrl_timer5_default>;
++// #pwm-cells = <3>;
++// status = "okay";
++//};
+
+&video {
+ status = "okay";
-+ memory-region = <&gfx_memory>;
++ memory-region = <&video_engine_memory>;
+};
+
+&vhub {
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch
index 63e8b2006..7055ee575 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch
@@ -1,4 +1,4 @@
-From 971b69835fcafbac02adf828a744af541c7554d0 Mon Sep 17 00:00:00 2001
+From d36b385e17eb21c305200048007d3cc6ad38f072 Mon Sep 17 00:00:00 2001
From: Kuiying Wang <kuiying.wang@intel.com>
Date: Wed, 19 Sep 2018 17:51:06 +0800
Subject: [PATCH] Define the gpio-line-names property for purley platform
@@ -15,14 +15,14 @@ defined following gpios.
Signed-off-by: Kuiying Wang <kuiying.wang@intel.com>
---
- arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 29 +++++++++++++++++++
+ arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 29 +++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-index 1c9aed9fcf94..9e187453750f 100644
+index 144d59642a71..8aba46cdce46 100644
--- a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-@@ -91,6 +91,35 @@
+@@ -117,6 +117,35 @@
&gpio {
status = "okay";
@@ -59,5 +59,5 @@ index 1c9aed9fcf94..9e187453750f 100644
&kcs3 {
--
-2.17.0
+2.7.4
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch
index dd56cab4b..2593ee8f6 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch
@@ -1,7 +1,7 @@
-From 769b30d1b5463291ddffd46f6039321d42f80417 Mon Sep 17 00:00:00 2001
+From c11a8ffcea24352579614d13d13ac4bda9a965cf Mon Sep 17 00:00:00 2001
From: James Feist <james.feist@linux.intel.com>
Date: Mon, 5 Nov 2018 15:38:19 -0800
-Subject: [PATCH 1/1] Leave GPIOE in passthrough after boot
+Subject: [PATCH] Leave GPIOE in passthrough after boot
This is a temporary patch that seems to leave exported
gpio in passthrough mode. It's hard to understand why this
@@ -16,11 +16,11 @@ change that can get us the correct result in the short term.
Signed-off-by: James Feist <james.feist@linux.intel.com>
---
- drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 8 ++++----
+ drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
-index 0c89647f166f..386ae967835d 100644
+index 187abd7693cf..4230e1038a88 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
@@ -246,7 +246,7 @@ FUNC_GROUP_DECL(GPID6, G18, C21);
@@ -42,5 +42,5 @@ index 0c89647f166f..386ae967835d 100644
#define F18 34
SIG_EXPR_LIST_DECL_SINGLE(NDSR3, NDSR3, SIG_DESC_SET(SCU80, 18));
--
-2.17.1
+2.7.4
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch
index 6d92227c7..03b4f4da4 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch
@@ -1,4 +1,4 @@
-From 0b3a20690483d3a04cb10d785b33f01b9bf4079d Mon Sep 17 00:00:00 2001
+From ddfbe1364c6ecf77f06990e6550dfe5a3791e6bf Mon Sep 17 00:00:00 2001
From: Vikram Bodireddy <vikram.bodireddy@intel.com>
Date: Wed, 6 Feb 2019 15:59:34 +0530
Subject: [PATCH] Selecting 128MB for PFR
@@ -7,17 +7,16 @@ PFR platforms requires 128MB flash mapping.
This will override the existing 64MB flash map
and loads 128MB flash map.
-Change-Id: If42805139d86061bd409915e8fc6374d6cf69147
Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com>
---
arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-index 20cc204..aab14fd 100644
+index 8aba46cdce46..6959a06d04e2 100644
--- a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-@@ -79,7 +79,7 @@
+@@ -90,7 +90,7 @@
flash@0 {
status = "okay";
m25p,fast-read;
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json
new file mode 100644
index 000000000..48cb80795
--- /dev/null
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json
@@ -0,0 +1,26 @@
+{
+ "Exposes": [
+ {
+ "Direction": "Input",
+ "Index": 143,
+ "Name": "Chassis Intrusion GPIO",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "BindGpioIntrusion": "Chassis Intrusion GPIO",
+ "Class": "Gpio",
+ "Name": "Chassis Intrusion Sensor",
+ "Type": "ChassisIntrusionSensor"
+ }
+ ],
+ "Name": "CYP Baseboard",
+ "Probe": "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*CYP'})",
+ "Type": "Board",
+ "xyz.openbmc_project.Inventory.Decorator.Asset": {
+ "Manufacturer": "$PRODUCT_MANUFACTURER",
+ "Model": "$PRODUCT_PRODUCT_NAME",
+ "PartNumber": "$PRODUCT_PART_NUMBER",
+ "SerialNumber": "$PRODUCT_SERIAL_NUMBER"
+ }
+} \ No newline at end of file
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json
index 726ff100c..be0d583a6 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json
@@ -66,6 +66,12 @@
"Type": "TMP75"
},
{
+ "Address": "0x18",
+ "Bus": "$bus",
+ "Name": "Multi Node Presence Detector",
+ "Type": "MultiNode"
+ },
+ {
"Address": "$address",
"Bus": "$bus",
"Name": "FCXXPDBASSMBL Fru",
@@ -73,8 +79,8 @@
}
],
"Name": "FCXXPDBASSMBL PDB",
- "Type": "Board",
"Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'FCXXPDBASSMBL', 'ADDRESS' : 85})",
+ "Type": "Board",
"xyz.openbmc_project.Inventory.Decorator.Asset": {
"Manufacturer": "$BOARD_MANUFACTURER",
"Model": "$BOARD_PRODUCT_NAME",
@@ -82,4 +88,4 @@
"SerialNumber": "$BOARD_SERIAL_NUMBER"
}
}
-]
+] \ No newline at end of file
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json
index 38c661ed6..7b86bfae0 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json
@@ -1,18 +1,19 @@
{
"Exposes": [
-
+ {
+ "Name": "Multi Node Supported",
+ "Type": "MultiNode"
+ }
],
"Name": "OPB2RH Chassis",
- "Type": "Chassis",
"Probe": [
- "FOUND('TNP Baseboard')",
- "AND",
"xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'FCXXPDBASSMBL'})"
],
+ "Type": "Chassis",
"xyz.openbmc_project.Inventory.Decorator.Asset": {
"Manufacturer": "Intel Corporation",
"Model": "OPB2RH",
"PartNumber": "R1234",
"SerialNumber": "12345"
}
-}
+} \ No newline at end of file
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json
index 01b899061..44590788d 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json
@@ -1,1945 +1,1969 @@
-{
- "Exposes": [
- {
- "Address": "0x4A",
- "Bus": 6,
- "Name": "BMC Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "TMP75"
- },
- {
- "Index": 0,
- "Name": "Baseboard 12 Volt",
- "PowerState": "On",
- "ScaleFactor": 0.1124,
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 13.494
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 13.101
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 10.945
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 10.616
- }
- ],
- "Type": "ADC"
- },
- {
- "Name": "CPU 1 Fan Connector",
- "Pwm": 7,
- "Status": "disabled",
- "Tachs": [
- 13
- ],
- "Type": "IntelFanConnector"
- },
- {
- "Name": "CPU 2 Fan Connector",
- "Pwm": 8,
- "Status": "disabled",
- "Tachs": [
- 14
- ],
- "Type": "IntelFanConnector"
- },
- {
- "Address": "0x49",
- "Bus": 6,
- "Name": "Left Rear Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "TMP75"
- },
- {
- "Index": 4,
- "Name": "P0V83_LAN_AUX",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 0.901
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 0.875
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 0.786
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0.763
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 3,
- "Name": "P105_PCH_AUX",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 1.139
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 1.106
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 0.995
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0.966
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 5,
- "Name": "P12V_AUX",
- "ScaleFactor": 0.1124,
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 13.494
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 13.101
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 10.945
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 10.616
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 6,
- "Name": "P1V8_PCH",
- "ScaleFactor": 0.7505,
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 1.961
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 1.904
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 1.699
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 1.648
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 1,
- "Name": "P3V3",
- "PowerState": "On",
- "ScaleFactor": 0.4107,
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 3.647
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 3.541
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 3.066
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 2.974
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 7,
- "Name": "P3VBAT",
- "ScaleFactor": 0.3333,
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 3.296
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 3.263
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 2.457
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 2.138
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 8,
- "Name": "PVCCIN_CPU0",
- "PowerState": "On",
- "ScaleFactor": 0.7505,
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 2.151
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 2.088
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 1.418
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 1.376
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 9,
- "Name": "PVCCIN_CPU1",
- "PowerState": "On",
- "ScaleFactor": 0.7505,
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 2.151
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 2.088
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 1.418
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 1.376
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 14,
- "Name": "PVCCIO_CPU0",
- "PowerState": "On",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 1.19
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 1.155
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 0.752
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0.729
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 15,
- "Name": "PVCCIO_CPU1",
- "PowerState": "On",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 1.19
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 1.155
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 0.752
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0.729
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 10,
- "Name": "PVDQ_ABCD_CPU0",
- "PowerState": "On",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 1.301
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 1.263
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 1.138
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 1.104
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 12,
- "Name": "PVDQ_ABCD_CPU1",
- "PowerState": "On",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 1.301
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 1.263
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 1.138
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 1.104
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 11,
- "Name": "PVDQ_EFGH_CPU0",
- "PowerState": "On",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 1.301
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 1.263
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 1.138
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 1.104
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 13,
- "Name": "PVDQ_EFGH_CPU1",
- "PowerState": "On",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 1.301
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 1.263
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 1.138
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 1.104
- }
- ],
- "Type": "ADC"
- },
- {
- "Index": 2,
- "Name": "PVNN_PCH_AUX",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 1.081
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 1.049
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 0.807
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0.783
- }
- ],
- "Type": "ADC"
- },
- {
- "Address": "0x4D",
- "Bus": 6,
- "Name": "Right Rear Board Temp",
- "Name1": "Right Rear TMP421 Internal Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "TMP421"
- },
- {
- "Address": "0x48",
- "Bus": 6,
- "Name": "Voltage Regulator 1 Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "TMP75"
- },
- {
- "Address": "0x4B",
- "Bus": 6,
- "Name": "Voltage Regulator 2 Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "TMP75"
- },
- {
- "Address": "0x30",
- "Bus": 0,
- "CpuID": 0,
- "Name": "Skylake CPU 0",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Label": "DIMM",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 99
- },
- {
- "Direction": "greater than",
- "Label": "DIMM",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 89
- }
- ],
- "Type": "SkylakeCPU"
- },
- {
- "Address": "0x31",
- "Bus": 0,
- "CpuID": 1,
- "Name": "Skylake CPU 1",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Label": "DIMM",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 99
- },
- {
- "Direction": "greater than",
- "Label": "DIMM",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 89
- }
- ],
- "Type": "SkylakeCPU"
- },
- {
- "Direction": "In",
- "Index": 32,
- "Name": "Reset Button",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 33,
- "Name": "Reset Out",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Both",
- "Index": 34,
- "Name": "Power Button",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Both",
- "Index": 35,
- "Name": "Power Up",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 40,
- "Name": "NMI Out",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 50,
- "Name": "PCH Thermaltrip",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 51,
- "Name": "Lcp Enter Button",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 52,
- "Name": "Lcp Left Button",
- "Polarity": "High",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 53,
- "Name": "Lcp Right Button",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 49,
- "Name": "Cpu Caterr",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 48,
- "Name": "Cpu Err2",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 63,
- "Name": "PU 240VA Status",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 208,
- "Name": "P3v3bat BridgeEn",
- "Polarity": "High",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 214,
- "Name": "Nmi Button",
- "Polarity": "High",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 215,
- "Name": "Post complete",
- "Polarity": "High",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 217,
- "Name": "Nmi Button",
- "Polarity": "High",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 218,
- "Name": "ID Button",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 219,
- "Name": "Power Good",
- "Polarity": "High",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 232,
- "Name": "Post Complete led0",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 233,
- "Name": "Post Complete led1",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 233,
- "Name": "CPU1 Thermaltrip",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 234,
- "Name": "Post Complete led2",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 234,
- "Name": "CPU1 VR Hot",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 235,
- "Name": "Post Complete led3",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 236,
- "Name": "Post Complete led4",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 236,
- "Name": "CPU1 Mem VR Hot1",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 237,
- "Name": "Post Complete led5",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 237,
- "Name": "CPU1 Mem VR Hot2",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 238,
- "Name": "Post Complete led6",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 239,
- "Name": "Post Complete led7",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 232,
- "Name": "CPU1 Present",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 235,
- "Name": "CPU1 FIVR Fault",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 238,
- "Name": "CPU1 ID0",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 240,
- "Name": "CPU1 CH1 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 240,
- "Name": "CPU1 Mismatch",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 241,
- "Name": "CPU1 CH1 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 241,
- "Name": "CPU1 DIMM Thermaltrip",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 242,
- "Name": "CPU1 CH2 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 242,
- "Name": "CPU2 Present",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 243,
- "Name": "CPU1 CH2 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 243,
- "Name": "CPU2 Thermaltrip",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 244,
- "Name": "CPU1 CH3 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 244,
- "Name": "CPU2 VR Hot",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 245,
- "Name": "CPU1 CH3 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 245,
- "Name": "CPU2 FIVR Fault",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 246,
- "Name": "CPU1 CH4 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 246,
- "Name": "CPU2 Mem VR Hot1",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 247,
- "Name": "CPU1 CH4 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 247,
- "Name": "CPU1 Mem VR Hot2",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 248,
- "Name": "CPU1 CH5 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 248,
- "Name": "CPU2 ID0",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 249,
- "Name": "CPU1 CH5 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 250,
- "Name": "CPU1 CH6 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 250,
- "Name": "CPU2 Mismatch",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 251,
- "Name": "CPU1 CH6 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 251,
- "Name": "CPU2 DIMM Thermaltrip",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 252,
- "Name": "Fan1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 253,
- "Name": "Fan2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 254,
- "Name": "Fan3 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 255,
- "Name": "Fan4 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 256,
- "Name": "Fan5 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 257,
- "Name": "Fan6 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 258,
- "Name": "Fan7 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 259,
- "Name": "Fan8 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 260,
- "Name": "CPU2 CH1 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 261,
- "Name": "CPU1 CH1 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 262,
- "Name": "CPU2 CH2 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 263,
- "Name": "CPU2 CH2 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 264,
- "Name": "CPU2 CH3 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 265,
- "Name": "CPU2 CH3 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 266,
- "Name": "CPU2 CH4 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 267,
- "Name": "CPU2 CH4 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 268,
- "Name": "CPU2 CH5 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 269,
- "Name": "CPU2 CH5 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 270,
- "Name": "CPU2 CH6 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 271,
- "Name": "CPU2 CH6 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 272,
- "Name": "CPU3 CH1 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 272,
- "Name": "PLD Minor Revison Bit 0",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 273,
- "Name": "CPU3 CH1 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 273,
- "Name": "PLD Minor Revison Bit 1",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 274,
- "Name": "CPU3 CH2 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 274,
- "Name": "PLD Minor Revison Bit 2",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 275,
- "Name": "CPU3 CH2 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 275,
- "Name": "PLD Minor Revison Bit 3",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 276,
- "Name": "CPU3 CH3 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 276,
- "Name": "PLD Major Revison Bit 0",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 277,
- "Name": "CPU3 CH3 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 277,
- "Name": "PLD Major Revison Bit 1",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 278,
- "Name": "CPU3 CH4 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 278,
- "Name": "PLD Major Revison Bit 2",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 279,
- "Name": "CPU3 CH4 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 279,
- "Name": "PLD Major Revison Bit 2",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 280,
- "Name": "CPU3 CH5 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 280,
- "Name": "Main PLD Minor Revison Bit 0",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 281,
- "Name": "CPU3 CH5 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 281,
- "Name": "Main PLD Minor Revison Bit 1",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 282,
- "Name": "CPU3 CH6 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 282,
- "Name": "Main PLD Minor Revison Bit 2",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 283,
- "Name": "CPU3 CH6 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 283,
- "Name": "Main PLD Minor Revison Bit 3",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 284,
- "Name": "CPU4 CH1 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 284,
- "Name": "Main PLD Major Revison Bit 0",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 285,
- "Name": "CPU4 CH1 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 285,
- "Name": "Main PLD Major Revison Bit 1",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 286,
- "Name": "CPU4 CH2 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 286,
- "Name": "Main PLD Major Revison Bit 2",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 287,
- "Name": "CPU4 CH2 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 287,
- "Name": "Main PLD Major Revison Bit 3",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 288,
- "Name": "CPU4 CH3 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 289,
- "Name": "CPU4 CH3 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 289,
- "Name": "Memory Pwr Fault",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 290,
- "Name": "CPU4 CH4 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 290,
- "Name": "CPU Pwr Fault",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 291,
- "Name": "CPU4 CH4 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 291,
- "Name": "P5V P3V3 Pwr Fault",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 292,
- "Name": "CPU4 CH5 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 292,
- "Name": "PSU Pwr Fault",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 293,
- "Name": "CPU4 CH5 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 293,
- "Name": "SAS Pwr Fault",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 294,
- "Name": "CPU4 CH6 DIMM1 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 294,
- "Name": "Lan Aux Pwr Fault",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Out",
- "Index": 295,
- "Name": "CPU4 CH6 DIMM2 FAULT",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Direction": "Input",
- "Index": 295,
- "Name": "PCH Pwr Fault",
- "Polarity": "Low",
- "Type": "Gpio"
- },
- {
- "Address": "0x8",
- "Class": "METemp",
- "Name": "SSB Temp",
- "PowerState": "BiosPost",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 103
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 98
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "IpmbSensor"
- },
- {
- "Address": "0x7c",
- "Class": "PxeBridgeTemp",
- "Name": "CPU1 P12V PVCCIO VR Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "IpmbSensor"
- },
- {
- "Address": "0x70",
- "Class": "PxeBridgeTemp",
- "Name": "CPU1 P12V PVCCIN VR Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "IpmbSensor"
- },
- {
- "Address": "0x74",
- "Class": "PxeBridgeTemp",
- "Name": "CPU1 VR Mem ABC Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "IpmbSensor"
- },
- {
- "Address": "0x78",
- "Class": "PxeBridgeTemp",
- "Name": "CPU1 VR Mem DEF Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "IpmbSensor"
- },
- {
- "Address": "0x9c",
- "Class": "PxeBridgeTemp",
- "Name": "CPU2 P12V PVCCIO VR Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "IpmbSensor"
- },
- {
- "Address": "0x50",
- "Class": "PxeBridgeTemp",
- "Name": "CPU2 P12V PVCCIN VR Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "IpmbSensor"
- },
- {
- "Address": "0x94",
- "Class": "PxeBridgeTemp",
- "Name": "CPU2 VR Mem ABC Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "IpmbSensor"
- },
- {
- "Address": "0x98",
- "Class": "PxeBridgeTemp",
- "Name": "CPU2 VR Mem DEF Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "IpmbSensor"
- },
- {
- "Address": "0xAC",
- "Class": "PxeBridgeTemp",
- "Name": "VR P1V05 Temp",
- "Thresholds": [
- {
- "Direction": "greater than",
- "Name": "upper critical",
- "Severity": 1,
- "Value": 115
- },
- {
- "Direction": "greater than",
- "Name": "upper non critical",
- "Severity": 0,
- "Value": 110
- },
- {
- "Direction": "less than",
- "Name": "lower non critical",
- "Severity": 0,
- "Value": 5
- },
- {
- "Direction": "less than",
- "Name": "lower critical",
- "Severity": 1,
- "Value": 0
- }
- ],
- "Type": "IpmbSensor"
- },
- {
- "Address": "0x71",
- "Bus": 2,
- "ChannelNames": [
- "M2_Slot1",
- "M2_Slot2",
- "",
- ""
- ],
- "Name": "M.2 Mux",
- "Type": "PCA9543Mux"
- }
- ],
- "Name": "TNP Baseboard",
- "Probe": "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*TNP'})",
- "Type": "Board",
- "xyz.openbmc_project.Inventory.Decorator.Asset": {
- "Manufacturer": "$PRODUCT_MANUFACTURER",
- "Model": "$PRODUCT_PRODUCT_NAME",
- "PartNumber": "$PRODUCT_PART_NUMBER",
- "SerialNumber": "$PRODUCT_SERIAL_NUMBER"
- }
-}
+{
+ "Exposes": [
+ {
+ "Address": "0x4A",
+ "Bus": 6,
+ "Name": "BMC Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "TMP75"
+ },
+ {
+ "Index": 0,
+ "Name": "Baseboard 12 Volt",
+ "PowerState": "On",
+ "ScaleFactor": 0.1124,
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 13.494
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 13.101
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 10.945
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 10.616
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Name": "CPU 1 Fan Connector",
+ "Pwm": 7,
+ "Status": "disabled",
+ "Tachs": [
+ 13
+ ],
+ "Type": "IntelFanConnector"
+ },
+ {
+ "Name": "CPU 2 Fan Connector",
+ "Pwm": 8,
+ "Status": "disabled",
+ "Tachs": [
+ 14
+ ],
+ "Type": "IntelFanConnector"
+ },
+ {
+ "Address": "0x49",
+ "Bus": 6,
+ "Name": "Left Rear Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "TMP75"
+ },
+ {
+ "Index": 4,
+ "Name": "P0V83_LAN_AUX",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 0.901
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 0.875
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 0.786
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0.763
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 3,
+ "Name": "P105_PCH_AUX",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 1.139
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 1.106
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 0.995
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0.966
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 5,
+ "Name": "P12V_AUX",
+ "ScaleFactor": 0.1124,
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 13.494
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 13.101
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 10.945
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 10.616
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 6,
+ "Name": "P1V8_PCH",
+ "ScaleFactor": 0.7505,
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 1.961
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 1.904
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 1.699
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 1.648
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 1,
+ "Name": "P3V3",
+ "PowerState": "On",
+ "ScaleFactor": 0.4107,
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 3.647
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 3.541
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 3.066
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 2.974
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 7,
+ "Name": "P3VBAT",
+ "ScaleFactor": 0.3333,
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 3.296
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 3.263
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 2.457
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 2.138
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 8,
+ "Name": "PVCCIN_CPU1",
+ "PowerState": "On",
+ "ScaleFactor": 0.7505,
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 2.151
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 2.088
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 1.418
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 1.376
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 9,
+ "Name": "PVCCIN_CPU2",
+ "PowerState": "On",
+ "ScaleFactor": 0.7505,
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 2.151
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 2.088
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 1.418
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 1.376
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 14,
+ "Name": "PVCCIO_CPU1",
+ "PowerState": "On",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 1.19
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 1.155
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 0.752
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0.729
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 15,
+ "Name": "PVCCIO_CPU2",
+ "PowerState": "On",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 1.19
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 1.155
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 0.752
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0.729
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 10,
+ "Name": "PVDQ_ABCD_CPU1",
+ "PowerState": "On",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 1.301
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 1.263
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 1.138
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 1.104
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 12,
+ "Name": "PVDQ_ABCD_CPU2",
+ "PowerState": "On",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 1.301
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 1.263
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 1.138
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 1.104
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 11,
+ "Name": "PVDQ_EFGH_CPU1",
+ "PowerState": "On",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 1.301
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 1.263
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 1.138
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 1.104
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 13,
+ "Name": "PVDQ_EFGH_CPU2",
+ "PowerState": "On",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 1.301
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 1.263
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 1.138
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 1.104
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Index": 2,
+ "Name": "PVNN_PCH_AUX",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 1.081
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 1.049
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 0.807
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0.783
+ }
+ ],
+ "Type": "ADC"
+ },
+ {
+ "Address": "0x4D",
+ "Bus": 6,
+ "Name": "Right Rear Board Temp",
+ "Name1": "Right Rear TMP421 Internal Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "TMP421"
+ },
+ {
+ "Address": "0x48",
+ "Bus": 6,
+ "Name": "Voltage Regulator 1 Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "TMP75"
+ },
+ {
+ "Address": "0x4B",
+ "Bus": 6,
+ "Name": "Voltage Regulator 2 Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "TMP75"
+ },
+ {
+ "Address": "0x30",
+ "Bus": 0,
+ "CpuID": 1,
+ "Name": "Skylake CPU 1",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Label": "DIMM",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 99
+ },
+ {
+ "Direction": "greater than",
+ "Label": "DIMM",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 89
+ }
+ ],
+ "Type": "SkylakeCPU"
+ },
+ {
+ "Address": "0x31",
+ "Bus": 0,
+ "CpuID": 2,
+ "Name": "Skylake CPU 2",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Label": "DIMM",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 99
+ },
+ {
+ "Direction": "greater than",
+ "Label": "DIMM",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 89
+ }
+ ],
+ "Type": "SkylakeCPU"
+ },
+ {
+ "Direction": "Input",
+ "Index": 32,
+ "Name": "Reset Button",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 33,
+ "Name": "Reset Out",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Both",
+ "Index": 34,
+ "Name": "Power Button",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Both",
+ "Index": 35,
+ "Name": "Power Up",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 40,
+ "Name": "NMI Out",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 50,
+ "Name": "PCH Thermaltrip",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 51,
+ "Name": "Lcp Enter Button",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 52,
+ "Name": "Lcp Left Button",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 53,
+ "Name": "Lcp Right Button",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 49,
+ "Name": "Cpu Caterr",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 48,
+ "Name": "Cpu Err2",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 63,
+ "Name": "PU 240VA Status",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 208,
+ "Name": "P3v3bat BridgeEn",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 214,
+ "Name": "Nmi Button",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 215,
+ "Name": "Post complete",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 217,
+ "Name": "Nmi Button",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 218,
+ "Name": "ID Button",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 219,
+ "Name": "Power Good",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 232,
+ "Name": "Post Complete led0",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 233,
+ "Name": "Post Complete led1",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 233,
+ "Name": "CPU1 Thermaltrip",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 234,
+ "Name": "Post Complete led2",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 234,
+ "Name": "CPU1 VR Hot",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 235,
+ "Name": "Post Complete led3",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 236,
+ "Name": "Post Complete led4",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 236,
+ "Name": "CPU1 Mem VR Hot1",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 237,
+ "Name": "Post Complete led5",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 237,
+ "Name": "CPU1 Mem VR Hot2",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 238,
+ "Name": "Post Complete led6",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 239,
+ "Name": "Post Complete led7",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 232,
+ "Name": "CPU1 Present",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 235,
+ "Name": "CPU1 FIVR Fault",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 238,
+ "Name": "CPU1 ID0",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 240,
+ "Name": "CPU1 CH1 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 240,
+ "Name": "CPU1 Mismatch",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 241,
+ "Name": "CPU1 CH1 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 241,
+ "Name": "CPU1 DIMM Thermaltrip",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 242,
+ "Name": "CPU1 CH2 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 242,
+ "Name": "CPU2 Present",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 243,
+ "Name": "CPU1 CH2 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 243,
+ "Name": "CPU2 Thermaltrip",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 244,
+ "Name": "CPU1 CH3 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 244,
+ "Name": "CPU2 VR Hot",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 245,
+ "Name": "CPU1 CH3 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 245,
+ "Name": "CPU2 FIVR Fault",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 246,
+ "Name": "CPU1 CH4 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 246,
+ "Name": "CPU2 Mem VR Hot1",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 247,
+ "Name": "CPU1 CH4 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 247,
+ "Name": "CPU1 Mem VR Hot2",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 248,
+ "Name": "CPU1 CH5 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 248,
+ "Name": "CPU2 ID0",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 249,
+ "Name": "CPU1 CH5 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 250,
+ "Name": "CPU1 CH6 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 250,
+ "Name": "CPU2 Mismatch",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 251,
+ "Name": "CPU1 CH6 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 251,
+ "Name": "CPU2 DIMM Thermaltrip",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 252,
+ "Name": "Fan1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 253,
+ "Name": "Fan2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 254,
+ "Name": "Fan3 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 255,
+ "Name": "Fan4 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 256,
+ "Name": "Fan5 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 257,
+ "Name": "Fan6 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 258,
+ "Name": "Fan7 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 259,
+ "Name": "Fan8 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 260,
+ "Name": "CPU2 CH1 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 261,
+ "Name": "CPU2 CH1 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 262,
+ "Name": "CPU2 CH2 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 263,
+ "Name": "CPU2 CH2 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 264,
+ "Name": "CPU2 CH3 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 265,
+ "Name": "CPU2 CH3 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 266,
+ "Name": "CPU2 CH4 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 267,
+ "Name": "CPU2 CH4 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 268,
+ "Name": "CPU2 CH5 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 269,
+ "Name": "CPU2 CH5 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 270,
+ "Name": "CPU2 CH6 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 271,
+ "Name": "CPU2 CH6 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 272,
+ "Name": "CPU3 CH1 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 272,
+ "Name": "PLD Minor Revison Bit 0",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 273,
+ "Name": "CPU3 CH1 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 273,
+ "Name": "PLD Minor Revison Bit 1",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 274,
+ "Name": "CPU3 CH2 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 274,
+ "Name": "PLD Minor Revison Bit 2",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 275,
+ "Name": "CPU3 CH2 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 275,
+ "Name": "PLD Minor Revison Bit 3",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 276,
+ "Name": "CPU3 CH3 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 276,
+ "Name": "PLD Major Revison Bit 0",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 277,
+ "Name": "CPU3 CH3 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 277,
+ "Name": "PLD Major Revison Bit 1",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 278,
+ "Name": "CPU3 CH4 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 278,
+ "Name": "PLD Major Revison Bit 2",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 279,
+ "Name": "CPU3 CH4 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 279,
+ "Name": "PLD Major Revison Bit 2",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 280,
+ "Name": "CPU3 CH5 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 280,
+ "Name": "Main PLD Minor Revison Bit 0",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 281,
+ "Name": "CPU3 CH5 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 281,
+ "Name": "Main PLD Minor Revison Bit 1",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 282,
+ "Name": "CPU3 CH6 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 282,
+ "Name": "Main PLD Minor Revison Bit 2",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 283,
+ "Name": "CPU3 CH6 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 283,
+ "Name": "Main PLD Minor Revison Bit 3",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 284,
+ "Name": "CPU4 CH1 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 284,
+ "Name": "Main PLD Major Revison Bit 0",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 285,
+ "Name": "CPU4 CH1 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 285,
+ "Name": "Main PLD Major Revison Bit 1",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 286,
+ "Name": "CPU4 CH2 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 286,
+ "Name": "Main PLD Major Revison Bit 2",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 287,
+ "Name": "CPU4 CH2 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 287,
+ "Name": "Main PLD Major Revison Bit 3",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 288,
+ "Name": "CPU4 CH3 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 289,
+ "Name": "CPU4 CH3 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 289,
+ "Name": "Memory Pwr Fault",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 290,
+ "Name": "CPU4 CH4 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 290,
+ "Name": "CPU Pwr Fault",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 291,
+ "Name": "CPU4 CH4 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 291,
+ "Name": "P5V P3V3 Pwr Fault",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 292,
+ "Name": "CPU4 CH5 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 292,
+ "Name": "PSU Pwr Fault",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 293,
+ "Name": "CPU4 CH5 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 293,
+ "Name": "SAS Pwr Fault",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 294,
+ "Name": "CPU4 CH6 DIMM1 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 294,
+ "Name": "Lan Aux Pwr Fault",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 295,
+ "Name": "CPU4 CH6 DIMM2 FAULT",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 295,
+ "Name": "PCH Pwr Fault",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Address": "0x8",
+ "Class": "METemp",
+ "Name": "SSB Temp",
+ "PowerState": "BiosPost",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 103
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 98
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "IpmbSensor"
+ },
+ {
+ "Address": "0x7c",
+ "Class": "PxeBridgeTemp",
+ "Name": "CPU1 P12V PVCCIO VR Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "IpmbSensor"
+ },
+ {
+ "Address": "0x70",
+ "Class": "PxeBridgeTemp",
+ "Name": "CPU1 P12V PVCCIN VR Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "IpmbSensor"
+ },
+ {
+ "Address": "0x74",
+ "Class": "PxeBridgeTemp",
+ "Name": "CPU1 VR Mem ABC Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "IpmbSensor"
+ },
+ {
+ "Address": "0x78",
+ "Class": "PxeBridgeTemp",
+ "Name": "CPU1 VR Mem DEF Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "IpmbSensor"
+ },
+ {
+ "Address": "0x9c",
+ "Class": "PxeBridgeTemp",
+ "Name": "CPU2 P12V PVCCIO VR Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "IpmbSensor"
+ },
+ {
+ "Address": "0x50",
+ "Class": "PxeBridgeTemp",
+ "Name": "CPU2 P12V PVCCIN VR Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "IpmbSensor"
+ },
+ {
+ "Address": "0x94",
+ "Class": "PxeBridgeTemp",
+ "Name": "CPU2 VR Mem ABC Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "IpmbSensor"
+ },
+ {
+ "Address": "0x98",
+ "Class": "PxeBridgeTemp",
+ "Name": "CPU2 VR Mem DEF Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "IpmbSensor"
+ },
+ {
+ "Address": "0xAC",
+ "Class": "PxeBridgeTemp",
+ "Name": "VR P1V05 Temp",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 115
+ },
+ {
+ "Direction": "greater than",
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 110
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "IpmbSensor"
+ },
+ {
+ "Address": "0x71",
+ "Bus": 2,
+ "ChannelNames": [
+ "M2_Slot1",
+ "M2_Slot2",
+ "",
+ ""
+ ],
+ "Name": "M.2 Mux",
+ "Type": "PCA9543Mux"
+ },
+ {
+ "Direction": "Input",
+ "Index": 27,
+ "Name": "Node ID GPIO 0",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 26,
+ "Name": "Node ID GPIO 1",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "BindGpioNodeID": "Node ID GPIO 0",
+ "Name": "Multi Node ID 0",
+ "Type": "MultiNode"
+ },
+ {
+ "BindGpioNodeID": "Node ID GPIO 1",
+ "Name": "Multi Node ID 1",
+ "Type": "MultiNode"
+ }
+ ],
+ "Name": "TNP Baseboard",
+ "Probe": "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*TNP'})",
+ "Type": "Board",
+ "xyz.openbmc_project.Inventory.Decorator.Asset": {
+ "Manufacturer": "$PRODUCT_MANUFACTURER",
+ "Model": "$PRODUCT_PRODUCT_NAME",
+ "PartNumber": "$PRODUCT_PART_NUMBER",
+ "SerialNumber": "$PRODUCT_SERIAL_NUMBER"
+ }
+} \ No newline at end of file
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json
index 65f36ccab..7c58d6bb0 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json
@@ -330,7 +330,7 @@
},
{
"Index": 8,
- "Name": "PVCCIN_CPU0",
+ "Name": "PVCCIN_CPU1",
"PowerState": "On",
"ScaleFactor": 0.7505,
"Thresholds": [
@@ -363,7 +363,7 @@
},
{
"Index": 9,
- "Name": "PVCCIN_CPU1",
+ "Name": "PVCCIN_CPU2",
"PowerState": "On",
"ScaleFactor": 0.7505,
"Thresholds": [
@@ -396,7 +396,7 @@
},
{
"Index": 14,
- "Name": "PVCCIO_CPU0",
+ "Name": "PVCCIO_CPU1",
"PowerState": "On",
"Thresholds": [
{
@@ -428,7 +428,7 @@
},
{
"Index": 15,
- "Name": "PVCCIO_CPU1",
+ "Name": "PVCCIO_CPU2",
"PowerState": "On",
"Thresholds": [
{
@@ -460,7 +460,7 @@
},
{
"Index": 10,
- "Name": "PVDQ_ABC_CPU0",
+ "Name": "PVDQ_ABC_CPU1",
"PowerState": "On",
"Thresholds": [
{
@@ -492,7 +492,7 @@
},
{
"Index": 12,
- "Name": "PVDQ_ABC_CPU1",
+ "Name": "PVDQ_ABC_CPU2",
"PowerState": "On",
"Thresholds": [
{
@@ -524,7 +524,7 @@
},
{
"Index": 11,
- "Name": "PVDQ_DEF_CPU0",
+ "Name": "PVDQ_DEF_CPU1",
"PowerState": "On",
"Thresholds": [
{
@@ -556,7 +556,7 @@
},
{
"Index": 13,
- "Name": "PVDQ_DEF_CPU1",
+ "Name": "PVDQ_DEF_CPU2",
"PowerState": "On",
"Thresholds": [
{
@@ -748,8 +748,8 @@
{
"Address": "0x30",
"Bus": 0,
- "CpuID": 0,
- "Name": "Skylake CPU 0",
+ "CpuID": 1,
+ "Name": "Skylake CPU 1",
"Thresholds": [
{
"Direction": "greater than",
@@ -771,8 +771,8 @@
{
"Address": "0x31",
"Bus": 0,
- "CpuID": 1,
- "Name": "Skylake CPU 1",
+ "CpuID": 2,
+ "Name": "Skylake CPU 2",
"Thresholds": [
{
"Direction": "greater than",
@@ -1142,13 +1142,13 @@
},
{
"FailSafePercent": 100,
- "MinThermalRpm": 3000,
+ "MinThermalOutput": 30,
"Name": "Left",
"Type": "Pid.Zone"
},
{
"FailSafePercent": 100,
- "MinThermalRpm": 3000,
+ "MinThermalOutput": 30,
"Name": "Right",
"Type": "Pid.Zone"
},
@@ -1165,9 +1165,9 @@
"ILimitMax": 100,
"ILimitMin": 30,
"Inputs": [
- "Core \\d+ CPU0"
+ "Core \\d+ CPU1"
],
- "Name": "CPU0",
+ "Name": "CPU1",
"NegativeHysteresis": 2.0,
"OutLimitMax": 100,
"OutLimitMin": 30,
@@ -1190,9 +1190,9 @@
"ILimitMax": 100,
"ILimitMin": 30,
"Inputs": [
- "Core \\d+ CPU1"
+ "Core \\d+ CPU2"
],
- "Name": "CPU1",
+ "Name": "CPU2",
"NegativeHysteresis": 2.0,
"OutLimitMax": 100,
"OutLimitMin": 30,
@@ -1208,7 +1208,42 @@
]
},
{
- "Direction": "In",
+ "Direction": "Input",
+ "Index": 32,
+ "Name": "Reset Button",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 33,
+ "Name": "Reset Out",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 34,
+ "Name": "Power Button",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 35,
+ "Name": "Power Up",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 40,
+ "Name": "NMI Input",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
"Index": 48,
"Name": "CPU ERR2",
"Polarity": "High",
@@ -1222,6 +1257,41 @@
"Type": "Gpio"
},
{
+ "Direction": "Input",
+ "Index": 214,
+ "Name": "SMI Input",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 215,
+ "Name": "Post Complete",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 217,
+ "Name": "Nmi Button",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 218,
+ "Name": "ID Button",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 219,
+ "Name": "Power Good",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
"Class": "Floor",
"Inputs": [
"Front Panel Temp"
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json
index bd32ae60d..e1e877892 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json
@@ -330,7 +330,7 @@
},
{
"Index": 8,
- "Name": "PVCCIN_CPU0",
+ "Name": "PVCCIN_CPU1",
"PowerState": "On",
"ScaleFactor": 0.7505,
"Thresholds": [
@@ -363,7 +363,7 @@
},
{
"Index": 9,
- "Name": "PVCCIN_CPU1",
+ "Name": "PVCCIN_CPU2",
"PowerState": "On",
"ScaleFactor": 0.7505,
"Thresholds": [
@@ -396,7 +396,7 @@
},
{
"Index": 14,
- "Name": "PVCCIO_CPU0",
+ "Name": "PVCCIO_CPU1",
"PowerState": "On",
"Thresholds": [
{
@@ -428,7 +428,7 @@
},
{
"Index": 15,
- "Name": "PVCCIO_CPU1",
+ "Name": "PVCCIO_CPU2",
"PowerState": "On",
"Thresholds": [
{
@@ -460,7 +460,7 @@
},
{
"Index": 10,
- "Name": "PVDQ_ABC_CPU0",
+ "Name": "PVDQ_ABC_CPU1",
"PowerState": "On",
"Thresholds": [
{
@@ -492,7 +492,7 @@
},
{
"Index": 12,
- "Name": "PVDQ_ABC_CPU1",
+ "Name": "PVDQ_ABC_CPU2",
"PowerState": "On",
"Thresholds": [
{
@@ -524,7 +524,7 @@
},
{
"Index": 11,
- "Name": "PVDQ_DEF_CPU0",
+ "Name": "PVDQ_DEF_CPU1",
"PowerState": "On",
"Thresholds": [
{
@@ -556,7 +556,7 @@
},
{
"Index": 13,
- "Name": "PVDQ_DEF_CPU1",
+ "Name": "PVDQ_DEF_CPU2",
"PowerState": "On",
"Thresholds": [
{
@@ -748,8 +748,8 @@
{
"Address": "0x30",
"Bus": 0,
- "CpuID": 0,
- "Name": "Skylake CPU 0",
+ "CpuID": 1,
+ "Name": "Skylake CPU 1",
"Thresholds": [
{
"Direction": "greater than",
@@ -771,8 +771,8 @@
{
"Address": "0x31",
"Bus": 0,
- "CpuID": 1,
- "Name": "Skylake CPU 1",
+ "CpuID": 2,
+ "Name": "Skylake CPU 2",
"Thresholds": [
{
"Direction": "greater than",
@@ -1142,13 +1142,13 @@
},
{
"FailSafePercent": 100,
- "MinThermalRpm": 3000,
+ "MinThermalOutput": 30,
"Name": "Left",
"Type": "Pid.Zone"
},
{
"FailSafePercent": 100,
- "MinThermalRpm": 3000,
+ "MinThermalOutput": 30,
"Name": "Right",
"Type": "Pid.Zone"
},
@@ -1165,9 +1165,9 @@
"ILimitMax": 100,
"ILimitMin": 30,
"Inputs": [
- "Core \\d+ CPU0"
+ "Core \\d+ CPU1"
],
- "Name": "CPU0",
+ "Name": "CPU1",
"NegativeHysteresis": 2.0,
"OutLimitMax": 100,
"OutLimitMin": 30,
@@ -1190,9 +1190,9 @@
"ILimitMax": 100,
"ILimitMin": 30,
"Inputs": [
- "Core \\d+ CPU1"
+ "Core \\d+ CPU2"
],
- "Name": "CPU1",
+ "Name": "CPU2",
"OutLimitMax": 100,
"OutLimitMin": 30,
"Outputs": [],
@@ -1206,7 +1206,42 @@
]
},
{
- "Direction": "In",
+ "Direction": "Input",
+ "Index": 32,
+ "Name": "Reset Button",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 33,
+ "Name": "Reset Out",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 34,
+ "Name": "Power Button",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Out",
+ "Index": 35,
+ "Name": "Power Up",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 40,
+ "Name": "NMI Input",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
"Index": 48,
"Name": "CPU ERR2",
"Polarity": "High",
@@ -1220,6 +1255,41 @@
"Type": "Gpio"
},
{
+ "Direction": "Input",
+ "Index": 214,
+ "Name": "SMI Input",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 215,
+ "Name": "Post Complete",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 217,
+ "Name": "Nmi Button",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 218,
+ "Name": "ID Button",
+ "Polarity": "Low",
+ "Type": "Gpio"
+ },
+ {
+ "Direction": "Input",
+ "Index": 219,
+ "Name": "Power Good",
+ "Polarity": "High",
+ "Type": "Gpio"
+ },
+ {
"Class": "Floor",
"Inputs": [
"Front Panel Temp"
@@ -1731,4 +1801,4 @@
"PartNumber": "$PRODUCT_PART_NUMBER",
"SerialNumber": "$PRODUCT_SERIAL_NUMBER"
}
-} \ No newline at end of file
+}
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend
index a2861c4ca..758818748 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend
@@ -3,7 +3,8 @@ SRC_URI_append = " file://WC-Baseboard.json \
file://WP-Baseboard.json \
file://TNP-baseboard.json \
file://FCXXPDBASSMBL_PDB.json \
- file://OPB2RH-Chassis.json"
+ file://OPB2RH-Chassis.json \
+ file://CYP-baseboard.json"
RDEPENDS_${PN} += " default-fru"
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-01 04:29:22 +0300