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author | Andrew Geissler <geissonator@yahoo.com> | 2020-12-12 01:25:29 +0300 |
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committer | Andrew Geissler <geissonator@yahoo.com> | 2020-12-12 01:25:34 +0300 |
commit | 10fa14942b9cb27780f9496382107516639208b4 (patch) | |
tree | f4b195505178e47c4b21ece7b3a898d9402b2daa /meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-Microblaze-update-in-constraints-for-bitfield-.patch | |
parent | 6d8913e6c02e578d4e41b7fe88113f4e4822992d (diff) | |
download | openbmc-10fa14942b9cb27780f9496382107516639208b4.tar.xz |
meta-xilinx: subtree update:569f52f275..b3e37df5d9
Mark Hatle (11):
meta-microblaze: Move gcc patch that was missed in the prior work
Uprev standalone toolchain bbappends
pmu-firmware: Latest toolchain always treats 'assert' as a macro
binutils: update to early gatesgarth version
gdb: update to early gatesgarth version
gcc: update to early gatesgarth version
newlib: update to early gatesgarth version
machine/aarch64-tc.conf: Fix incorrect ilp32 pkgarch
libgcc.bbappend: Clear empty lib directory
newlib: Upstream now disabled builtin symbols
gdb: Fix on-target GDB compilation
Sai Hari Chandana Kalluri (5):
linux-xlnx_2020.2: Fix previous git cherry-pick
xrt: Remove stale patch to fix endian issues with latest version of boost
opencl-clhpp, ocl-icd: Remove recipes from meta-xilinx
esw.bbclass: Remove trailing / after S
Remove recipe bbappends pointing to older versions
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Change-Id: I18b028388a5b55a49ef135b98290228fa797e38d
Diffstat (limited to 'meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-Microblaze-update-in-constraints-for-bitfield-.patch')
-rw-r--r-- | meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-Microblaze-update-in-constraints-for-bitfield-.patch | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-Microblaze-update-in-constraints-for-bitfield-.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-Microblaze-update-in-constraints-for-bitfield-.patch new file mode 100644 index 000000000..7627b7651 --- /dev/null +++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-Microblaze-update-in-constraints-for-bitfield-.patch @@ -0,0 +1,84 @@ +From 336d984c580345eccdeb889af8ef8c986afc1dad Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati <mbodapat@xilinx.com> +Date: Mon, 19 Feb 2018 18:06:16 +0530 +Subject: [PATCH 27/54] [Patch,Microblaze]: update in constraints for bitfield + insert and extract instructions. + +Conflicts: + gcc/config/microblaze/microblaze.md +--- + gcc/config/microblaze/microblaze.md | 45 +++++------------------------ + 1 file changed, 8 insertions(+), 37 deletions(-) + +diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md +index d938efcd762..63ad94b972f 100644 +--- a/gcc/config/microblaze/microblaze.md ++++ b/gcc/config/microblaze/microblaze.md +@@ -2492,33 +2492,17 @@ + DONE; + }") + +-(define_expand "extvsi" ++(define_expand "extzvsi" + [(set (match_operand:SI 0 "register_operand" "r") + (zero_extract:SI (match_operand:SI 1 "register_operand" "r") + (match_operand:SI 2 "immediate_operand" "I") + (match_operand:SI 3 "immediate_operand" "I")))] ++"TARGET_HAS_BITFIELD" + "" +-" +-{ +- unsigned HOST_WIDE_INT len = UINTVAL (operands[2]); +- unsigned HOST_WIDE_INT pos = UINTVAL (operands[3]); +- +- if ((len == 0) || (pos + len > 32) ) +- FAIL; +- +- ;;if (!register_operand (operands[1], VOIDmode)) +- ;; FAIL; +- if (operands[0] == operands[1]) +- FAIL; +- if (GET_CODE (operands[1]) == ASHIFT) +- FAIL; +-;; operands[2] = GEN_INT(INTVAL(operands[2])+1 ); +- emit_insn (gen_extv_32 (operands[0], operands[1], +- operands[2], operands[3])); +- DONE; +-}") ++) + +-(define_insn "extv_32" ++ ++(define_insn "extzv_32" + [(set (match_operand:SI 0 "register_operand" "=r") + (zero_extract:SI (match_operand:SI 1 "register_operand" "r") + (match_operand:SI 2 "immediate_operand" "I") +@@ -2534,22 +2518,9 @@ + (match_operand:SI 1 "immediate_operand" "I") + (match_operand:SI 2 "immediate_operand" "I")) + (match_operand:SI 3 "register_operand" "r"))] +- "" +- " +-{ +- unsigned HOST_WIDE_INT len = UINTVAL (operands[1]); +- unsigned HOST_WIDE_INT pos = UINTVAL (operands[2]); +- +- if (len <= 0 || pos + len > 32) +- FAIL; +- +- ;;if (!register_operand (operands[0], VOIDmode)) +- ;; FAIL; +- +- emit_insn (gen_insv_32 (operands[0], operands[1], +- operands[2], operands[3])); +- DONE; +-}") ++ "TARGET_HAS_BITFIELD" ++"" ++) + + (define_insn "insv_32" + [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") +-- +2.17.1 + |