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author | Jason M. Bills <jason.m.bills@linux.intel.com> | 2020-12-08 00:38:17 +0300 |
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committer | Jason M. Bills <jason.m.bills@linux.intel.com> | 2020-12-08 00:38:17 +0300 |
commit | 8d6ae7f2a817751fad151168fa10ce28ee0869d8 (patch) | |
tree | 281032f7ec07c41589aa094bd165cc2a98f2d3a7 /meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch | |
parent | c16fb8893b19075db4bcf3b5bf33c1db8c3ca2bd (diff) | |
parent | 5da3c2284560a7e08ffafd03c5b5ba44a3242228 (diff) | |
download | openbmc-8d6ae7f2a817751fad151168fa10ce28ee0869d8.tar.xz |
Merge tag '0.26' of ssh://git-amr-1.devtools.intel.com:29418/openbmc-openbmc into update
Diffstat (limited to 'meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch')
-rw-r--r-- | meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch new file mode 100644 index 000000000..4ab3cec93 --- /dev/null +++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch @@ -0,0 +1,107 @@ +From 3198a31122bb0436d298d29e986bb69bc3c526a9 Mon Sep 17 00:00:00 2001 +From: Nagaraju <nmekala@xilinx.com> +Date: Fri, 23 Aug 2019 16:16:53 +0530 +Subject: [PATCH 55/58] Added new MB-64 single register arithmetic instructions + +--- + gcc/config/microblaze/microblaze.md | 56 +++++++++++++++++++++++++++++ + 1 file changed, 56 insertions(+) + +diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md +index 6cc62666269..696be7b300f 100644 +--- a/gcc/config/microblaze/microblaze.md ++++ b/gcc/config/microblaze/microblaze.md +@@ -654,6 +654,18 @@ + } + }) + ++(define_insn "adddi3_int" ++ [(set (match_operand:DI 0 "register_operand" "=d") ++ (plus:DI (match_operand:DI 1 "register_operand" "%0") ++ (match_operand:DI 2 "immediate_operand" "I")))] ++ "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767)" ++ "@ ++ addlik\t%0,%2" ++ [(set_attr "type" "darith") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4")] ++) ++ + (define_insn "*adddi3_long" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (plus:DI (match_operand:DI 1 "register_operand" "%d,d") +@@ -719,6 +731,18 @@ + { + }") + ++(define_insn "subdi316imm" ++ [(set (match_operand:DI 0 "register_operand" "=d") ++ (minus:DI (match_operand:DI 1 "register_operand" "d") ++ (match_operand:DI 2 "arith_operand" "K")))] ++ "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767) && (REGNO (operands[0]) == REGNO (operands[1]))" ++ "@ ++ addlik\t%0,-%2" ++ [(set_attr "type" "darith") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4")]) ++ ++ + (define_insn "subsidi3" + [(set (match_operand:DI 0 "register_operand" "=d,d,d") + (minus:DI (match_operand:DI 1 "register_operand" "d,d,d") +@@ -1015,6 +1039,17 @@ + ;; Logical + ;;---------------------------------------------------------------- + ++(define_insn "anddi3imm16" ++ [(set (match_operand:DI 0 "register_operand" "=d") ++ (and:DI (match_operand:DI 1 "arith_operand" "%0") ++ (match_operand:DI 2 "arith_operand" "K")))] ++ "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767)" ++ "@ ++ andli\t%0,%2" ++ [(set_attr "type" "darith") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4")]) ++ + (define_insn "anddi3" + [(set (match_operand:DI 0 "register_operand" "=d,d,d") + (and:DI (match_operand:DI 1 "arith_operand" "d,d,d") +@@ -1042,6 +1077,16 @@ + (set_attr "mode" "SI,SI,SI,SI") + (set_attr "length" "4,8,8,8")]) + ++(define_insn "iordi3imm16" ++ [(set (match_operand:DI 0 "register_operand" "=d") ++ (ior:DI (match_operand:DI 1 "arith_operand" "%0") ++ (match_operand:DI 2 "arith_operand" "K")))] ++ "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767)" ++ "@ ++ orli\t%0,%2" ++ [(set_attr "type" "darith") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4")]) + + (define_insn "iordi3" + [(set (match_operand:DI 0 "register_operand" "=d,d") +@@ -1069,6 +1114,17 @@ + (set_attr "mode" "SI,SI,SI,SI") + (set_attr "length" "4,8,8,8")]) + ++(define_insn "xordi3imm16" ++ [(set (match_operand:DI 0 "register_operand" "=d") ++ (xor:DI (match_operand:DI 1 "arith_operand" "%0") ++ (match_operand:DI 2 "arith_operand" "K")))] ++ "TARGET_MB_64 && ((long long)INTVAL(operands[2]) > (long long)-32768) && ((long long) INTVAL(operands[2]) < (long long)32767)" ++ "@ ++ xorli\t%0,%2" ++ [(set_attr "type" "darith") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4")]) ++ + (define_insn "xordi3" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (xor:DI (match_operand:DI 1 "arith_operand" "%d,d") +-- +2.17.1 + |